fw-api: Add new hardware header files napier and hawkeye

Add new lithium hardware header files. Following files are
being added:

qca6290/v1/rx_ppdu_end_user_stats.h
qca6290/v1/rx_ppdu_end_user_stats_ext.h
qca6290/v1/rx_ppdu_start.h
qca6290/v1/rx_ppdu_start_user_info.h
hw/qca6290/v1/receive_user_info.h
hw/qca6290/v1/rx_rxpcu_classification_overview.h

Change-Id: I7f2446f15c87c48e24774fa1ddd4a624fc832e33
CRs-Fixed: 2016192

hw/qca6290/v1/receive_user_info.h

@@ -0,0 +1,426 @@
+/*
+ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _RECEIVE_USER_INFO_H_
+#define _RECEIVE_USER_INFO_H_
+#if !defined(__ASSEMBLER__)
+#endif
+
+
+// ################ START SUMMARY #################
+//
+//	Dword	Fields
+//	0	phy_ppdu_id[15:0], user_rssi[23:16], pkt_type[27:24], stbc[28], sgi[30:29], reserved_0[31]
+//	1	rate_mcs[3:0], reception_type[5:4], receive_bandwidth[7:6], mimo_ss_bitmap[15:8], user_ru_allocation[23:16], nss[26:24], reserved_1b[31:27]
+//
+// ################ END SUMMARY #################
+
+#define NUM_OF_DWORDS_RECEIVE_USER_INFO 2
+
+struct receive_user_info {
+             uint32_t phy_ppdu_id                     : 16, //[15:0]
+                      user_rssi                       :  8, //[23:16]
+                      pkt_type                        :  4, //[27:24]
+                      stbc                            :  1, //[28]
+                      sgi                             :  2, //[30:29]
+                      reserved_0                      :  1; //[31]
+             uint32_t rate_mcs                        :  4, //[3:0]
+                      reception_type                  :  2, //[5:4]
+                      receive_bandwidth               :  2, //[7:6]
+                      mimo_ss_bitmap                  :  8, //[15:8]
+                      user_ru_allocation              :  8, //[23:16]
+                      nss                             :  3, //[26:24]
+                      reserved_1b                     :  5; //[31:27]
+};
+
+/*
+
+phy_ppdu_id
+			
+			A ppdu counter value that PHY increments for every PPDU
+			received. The counter value wraps around  
+			
+			<legal all>
+
+user_rssi
+			
+			RSSI for this user
+			
+			Frequency domain RSSI measurement for this user. Based
+			on the channel estimate.  
+			
+			
+			
+			If PHY implementation runs into difficulties, the backup
+			is to reuse the previously notified RSSI values.
+			
+			TODO PHY: request to update the text here based on the
+			latest design insights
+			
+			
+			
+			<legal all>
+
+pkt_type
+			
+			Packet type:
+			
+			
+			
+			<enum 0 dot11a>802.11a PPDU type
+			
+			<enum 1 dot11b>802.11b PPDU type
+			
+			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
+			
+			<enum 3 dot11ac>802.11ac PPDU type
+			
+			<enum 4 dot11ax>802.11ax PPDU type
+
+stbc
+			
+			When set, use STBC transmission rates
+
+sgi
+			
+			Field only valid when pkt type is HT, VHT or HE.
+			
+			
+			
+			<enum 0     gi_0_8_us > Legacy normal GI
+			
+			<enum 1     gi_0_4_us > Legacy short GI
+			
+			<enum 2     gi_1_6_us > HE related GI
+			
+			<enum 3     gi_3_2_us > HE related GI
+			
+			<legal 0 - 3>
+
+reserved_0
+			
+			<legal 0>
+
+rate_mcs
+			
+			For details, refer to  MCS_TYPE description
+			
+			<legal all>
+
+reception_type
+			
+			Indicates what type of reception this is.
+			
+			<enum 0     reception_type_SU > 
+			
+			<enum 1     reception_type_MU_MIMO > 
+			
+			<enum 2     reception_type_MU_OFDMA > 
+			
+			<enum 3     reception_type_MU_OFDMA_MIMO > 
+			
+			<legal all>
+
+receive_bandwidth
+			
+			Full receive Bandwidth
+			
+			
+			
+			<enum 0     full_rx_bw_20_mhz>
+			
+			<enum 1      full_rx_bw_40_mhz>
+			
+			<enum 2      full_rx_bw_80_mhz>
+			
+			<enum 3      full_rx_bw_160_mhz> 
+			
+			
+			
+			<legal 0-3>
+
+mimo_ss_bitmap
+			
+			Field only valid in case of MIMO type reception
+			
+			
+			
+			Bitmap, with each bit indicating if the related spatial
+			stream is used for this STA
+			
+			LSB related to SS 0
+			
+			
+			
+			0: spatial stream not used for this reception
+			
+			1: spatial stream used for this reception
+			
+			
+			
+			<legal all>
+
+user_ru_allocation
+			
+			Field only valid in case of OFDMA uplink type reception
+			
+			
+			
+			Indicates the RU number for this user
+			
+			<legal 0-73>
+
+nss
+			
+			Number of Spatial Streams occupied by the User
+			
+			<enum 0 1_spatial_stream>Single spatial stream
+			
+			<enum 1 2_spatial_streams>2 spatial streams
+			
+			<enum 2 3_spatial_streams>3 spatial streams
+			
+			<enum 3 4_spatial_streams>4 spatial streams
+			
+			<enum 4 5_spatial_streams>5 spatial streams
+			
+			<enum 5 6_spatial_streams>6 spatial streams
+			
+			<enum 6 7_spatial_streams>7 spatial streams
+			
+			<enum 7 8_spatial_streams>8 spatial streams
+
+reserved_1b
+			
+			<legal 0>
+*/
+
+
+/* Description		RECEIVE_USER_INFO_0_PHY_PPDU_ID
+			
+			A ppdu counter value that PHY increments for every PPDU
+			received. The counter value wraps around  
+			
+			<legal all>
+*/
+#define RECEIVE_USER_INFO_0_PHY_PPDU_ID_OFFSET                       0x00000000
+#define RECEIVE_USER_INFO_0_PHY_PPDU_ID_LSB                          0
+#define RECEIVE_USER_INFO_0_PHY_PPDU_ID_MASK                         0x0000ffff
+
+/* Description		RECEIVE_USER_INFO_0_USER_RSSI
+			
+			RSSI for this user
+			
+			Frequency domain RSSI measurement for this user. Based
+			on the channel estimate.  
+			
+			
+			
+			If PHY implementation runs into difficulties, the backup
+			is to reuse the previously notified RSSI values.
+			
+			TODO PHY: request to update the text here based on the
+			latest design insights
+			
+			
+			
+			<legal all>
+*/
+#define RECEIVE_USER_INFO_0_USER_RSSI_OFFSET                         0x00000000
+#define RECEIVE_USER_INFO_0_USER_RSSI_LSB                            16
+#define RECEIVE_USER_INFO_0_USER_RSSI_MASK                           0x00ff0000
+
+/* Description		RECEIVE_USER_INFO_0_PKT_TYPE
+			
+			Packet type:
+			
+			
+			
+			<enum 0 dot11a>802.11a PPDU type
+			
+			<enum 1 dot11b>802.11b PPDU type
+			
+			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
+			
+			<enum 3 dot11ac>802.11ac PPDU type
+			
+			<enum 4 dot11ax>802.11ax PPDU type
+*/
+#define RECEIVE_USER_INFO_0_PKT_TYPE_OFFSET                          0x00000000
+#define RECEIVE_USER_INFO_0_PKT_TYPE_LSB                             24
+#define RECEIVE_USER_INFO_0_PKT_TYPE_MASK                            0x0f000000
+
+/* Description		RECEIVE_USER_INFO_0_STBC
+			
+			When set, use STBC transmission rates
+*/
+#define RECEIVE_USER_INFO_0_STBC_OFFSET                              0x00000000
+#define RECEIVE_USER_INFO_0_STBC_LSB                                 28
+#define RECEIVE_USER_INFO_0_STBC_MASK                                0x10000000
+
+/* Description		RECEIVE_USER_INFO_0_SGI
+			
+			Field only valid when pkt type is HT, VHT or HE.
+			
+			
+			
+			<enum 0     gi_0_8_us > Legacy normal GI
+			
+			<enum 1     gi_0_4_us > Legacy short GI
+			
+			<enum 2     gi_1_6_us > HE related GI
+			
+			<enum 3     gi_3_2_us > HE related GI
+			
+			<legal 0 - 3>
+*/
+#define RECEIVE_USER_INFO_0_SGI_OFFSET                               0x00000000
+#define RECEIVE_USER_INFO_0_SGI_LSB                                  29
+#define RECEIVE_USER_INFO_0_SGI_MASK                                 0x60000000
+
+/* Description		RECEIVE_USER_INFO_0_RESERVED_0
+			
+			<legal 0>
+*/
+#define RECEIVE_USER_INFO_0_RESERVED_0_OFFSET                        0x00000000
+#define RECEIVE_USER_INFO_0_RESERVED_0_LSB                           31
+#define RECEIVE_USER_INFO_0_RESERVED_0_MASK                          0x80000000
+
+/* Description		RECEIVE_USER_INFO_1_RATE_MCS
+			
+			For details, refer to  MCS_TYPE description
+			
+			<legal all>
+*/
+#define RECEIVE_USER_INFO_1_RATE_MCS_OFFSET                          0x00000004
+#define RECEIVE_USER_INFO_1_RATE_MCS_LSB                             0
+#define RECEIVE_USER_INFO_1_RATE_MCS_MASK                            0x0000000f
+
+/* Description		RECEIVE_USER_INFO_1_RECEPTION_TYPE
+			
+			Indicates what type of reception this is.
+			
+			<enum 0     reception_type_SU > 
+			
+			<enum 1     reception_type_MU_MIMO > 
+			
+			<enum 2     reception_type_MU_OFDMA > 
+			
+			<enum 3     reception_type_MU_OFDMA_MIMO > 
+			
+			<legal all>
+*/
+#define RECEIVE_USER_INFO_1_RECEPTION_TYPE_OFFSET                    0x00000004
+#define RECEIVE_USER_INFO_1_RECEPTION_TYPE_LSB                       4
+#define RECEIVE_USER_INFO_1_RECEPTION_TYPE_MASK                      0x00000030
+
+/* Description		RECEIVE_USER_INFO_1_RECEIVE_BANDWIDTH
+			
+			Full receive Bandwidth
+			
+			
+			
+			<enum 0     full_rx_bw_20_mhz>
+			
+			<enum 1      full_rx_bw_40_mhz>
+			
+			<enum 2      full_rx_bw_80_mhz>
+			
+			<enum 3      full_rx_bw_160_mhz> 
+			
+			
+			
+			<legal 0-3>
+*/
+#define RECEIVE_USER_INFO_1_RECEIVE_BANDWIDTH_OFFSET                 0x00000004
+#define RECEIVE_USER_INFO_1_RECEIVE_BANDWIDTH_LSB                    6
+#define RECEIVE_USER_INFO_1_RECEIVE_BANDWIDTH_MASK                   0x000000c0
+
+/* Description		RECEIVE_USER_INFO_1_MIMO_SS_BITMAP
+			
+			Field only valid in case of MIMO type reception
+			
+			
+			
+			Bitmap, with each bit indicating if the related spatial
+			stream is used for this STA
+			
+			LSB related to SS 0
+			
+			
+			
+			0: spatial stream not used for this reception
+			
+			1: spatial stream used for this reception
+			
+			
+			
+			<legal all>
+*/
+#define RECEIVE_USER_INFO_1_MIMO_SS_BITMAP_OFFSET                    0x00000004
+#define RECEIVE_USER_INFO_1_MIMO_SS_BITMAP_LSB                       8
+#define RECEIVE_USER_INFO_1_MIMO_SS_BITMAP_MASK                      0x0000ff00
+
+/* Description		RECEIVE_USER_INFO_1_USER_RU_ALLOCATION
+			
+			Field only valid in case of OFDMA uplink type reception
+			
+			
+			
+			Indicates the RU number for this user
+			
+			<legal 0-73>
+*/
+#define RECEIVE_USER_INFO_1_USER_RU_ALLOCATION_OFFSET                0x00000004
+#define RECEIVE_USER_INFO_1_USER_RU_ALLOCATION_LSB                   16
+#define RECEIVE_USER_INFO_1_USER_RU_ALLOCATION_MASK                  0x00ff0000
+
+/* Description		RECEIVE_USER_INFO_1_NSS
+			
+			Number of Spatial Streams occupied by the User
+			
+			<enum 0 1_spatial_stream>Single spatial stream
+			
+			<enum 1 2_spatial_streams>2 spatial streams
+			
+			<enum 2 3_spatial_streams>3 spatial streams
+			
+			<enum 3 4_spatial_streams>4 spatial streams
+			
+			<enum 4 5_spatial_streams>5 spatial streams
+			
+			<enum 5 6_spatial_streams>6 spatial streams
+			
+			<enum 6 7_spatial_streams>7 spatial streams
+			
+			<enum 7 8_spatial_streams>8 spatial streams
+*/
+#define RECEIVE_USER_INFO_1_NSS_OFFSET                               0x00000004
+#define RECEIVE_USER_INFO_1_NSS_LSB                                  24
+#define RECEIVE_USER_INFO_1_NSS_MASK                                 0x07000000
+
+/* Description		RECEIVE_USER_INFO_1_RESERVED_1B
+			
+			<legal 0>
+*/
+#define RECEIVE_USER_INFO_1_RESERVED_1B_OFFSET                       0x00000004
+#define RECEIVE_USER_INFO_1_RESERVED_1B_LSB                          27
+#define RECEIVE_USER_INFO_1_RESERVED_1B_MASK                         0xf8000000
+
+
+#endif // _RECEIVE_USER_INFO_H_

hw/qca6290/v1/rx_ppdu_end_user_stats.h

@@ -0,0 +1,1574 @@
+/*
+ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _RX_PPDU_END_USER_STATS_H_
+#define _RX_PPDU_END_USER_STATS_H_
+#if !defined(__ASSEMBLER__)
+#endif
+
+#include "rx_rxpcu_classification_overview.h"
+
+// ################ START SUMMARY #################
+//
+//	Dword	Fields
+//	0	struct rx_rxpcu_classification_overview rxpcu_classification_details;
+//	1	sta_full_aid[12:0], mcs[16:13], nss[19:17], odma_info_valid[20], ofdma_low_ru_index[27:21], reserved_1a[31:28]
+//	2	ofdma_high_ru_index[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29]
+//	3	mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], reserved_3a[15:13], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24]
+//	4	ast_index[15:0], frame_control_field[31:16]
+//	5	first_data_seq_ctrl[15:0], qos_control_field[31:16]
+//	6	ht_control_field[31:0]
+//	7	fcs_ok_bitmap_31_0[31:0]
+//	8	fcs_ok_bitmap_63_32[31:0]
+//	9	udp_msdu_count[15:0], tcp_msdu_count[31:16]
+//	10	other_msdu_count[15:0], tcp_ack_msdu_count[31:16]
+//	11	sw_response_reference_ptr[31:0]
+//	12	received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16]
+//	13	qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24]
+//	14	qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24]
+//	15	qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24]
+//	16	qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24]
+//
+// ################ END SUMMARY #################
+
+#define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 17
+
+struct rx_ppdu_end_user_stats {
+    struct            rx_rxpcu_classification_overview                       rxpcu_classification_details;
+             uint32_t sta_full_aid                    : 13, //[12:0]
+                      mcs                             :  4, //[16:13]
+                      nss                             :  3, //[19:17]
+                      odma_info_valid                 :  1, //[20]
+                      ofdma_low_ru_index              :  7, //[27:21]
+                      reserved_1a                     :  4; //[31:28]
+             uint32_t ofdma_high_ru_index             :  7, //[6:0]
+                      reserved_2a                     :  1, //[7]
+                      user_receive_quality            :  8, //[15:8]
+                      mpdu_cnt_fcs_err                : 10, //[25:16]
+                      wbm2rxdma_buf_source_used       :  1, //[26]
+                      fw2rxdma_buf_source_used        :  1, //[27]
+                      sw2rxdma_buf_source_used        :  1, //[28]
+                      reserved_2b                     :  3; //[31:29]
+             uint32_t mpdu_cnt_fcs_ok                 :  9, //[8:0]
+                      frame_control_info_valid        :  1, //[9]
+                      qos_control_info_valid          :  1, //[10]
+                      ht_control_info_valid           :  1, //[11]
+                      data_sequence_control_info_valid:  1, //[12]
+                      reserved_3a                     :  3, //[15:13]
+                      rxdma2reo_ring_used             :  1, //[16]
+                      rxdma2fw_ring_used              :  1, //[17]
+                      rxdma2sw_ring_used              :  1, //[18]
+                      rxdma_release_ring_used         :  1, //[19]
+                      ht_control_field_pkt_type       :  4, //[23:20]
+                      reserved_3b                     :  8; //[31:24]
+             uint32_t ast_index                       : 16, //[15:0]
+                      frame_control_field             : 16; //[31:16]
+             uint32_t first_data_seq_ctrl             : 16, //[15:0]
+                      qos_control_field               : 16; //[31:16]
+             uint32_t ht_control_field                : 32; //[31:0]
+             uint32_t fcs_ok_bitmap_31_0              : 32; //[31:0]
+             uint32_t fcs_ok_bitmap_63_32             : 32; //[31:0]
+             uint32_t udp_msdu_count                  : 16, //[15:0]
+                      tcp_msdu_count                  : 16; //[31:16]
+             uint32_t other_msdu_count                : 16, //[15:0]
+                      tcp_ack_msdu_count              : 16; //[31:16]
+             uint32_t sw_response_reference_ptr       : 32; //[31:0]
+             uint32_t received_qos_data_tid_bitmap    : 16, //[15:0]
+                      received_qos_data_tid_eosp_bitmap: 16; //[31:16]
+             uint32_t qosctrl_15_8_tid0               :  8, //[7:0]
+                      qosctrl_15_8_tid1               :  8, //[15:8]
+                      qosctrl_15_8_tid2               :  8, //[23:16]
+                      qosctrl_15_8_tid3               :  8; //[31:24]
+             uint32_t qosctrl_15_8_tid4               :  8, //[7:0]
+                      qosctrl_15_8_tid5               :  8, //[15:8]
+                      qosctrl_15_8_tid6               :  8, //[23:16]
+                      qosctrl_15_8_tid7               :  8; //[31:24]
+             uint32_t qosctrl_15_8_tid8               :  8, //[7:0]
+                      qosctrl_15_8_tid9               :  8, //[15:8]
+                      qosctrl_15_8_tid10              :  8, //[23:16]
+                      qosctrl_15_8_tid11              :  8; //[31:24]
+             uint32_t qosctrl_15_8_tid12              :  8, //[7:0]
+                      qosctrl_15_8_tid13              :  8, //[15:8]
+                      qosctrl_15_8_tid14              :  8, //[23:16]
+                      qosctrl_15_8_tid15              :  8; //[31:24]
+};
+
+/*
+
+struct rx_rxpcu_classification_overview rxpcu_classification_details
+			
+			Details related to what RXPCU classification types of
+			MPDUs have been received
+
+sta_full_aid
+			
+			Consumer: FW
+			
+			Producer: RXPCU
+			
+			
+			
+			The full AID of this station. 
+			
+			
+			
+			<legal all>
+
+mcs
+			
+			MCS of the received frame
+			
+			
+			
+			For details, refer to  MCS_TYPE description
+			
+			<legal all>
+
+nss
+			
+			Number of spatial streams.
+			
+			
+			
+			<enum 0 1_spatial_stream>Single spatial stream
+			
+			<enum 1 2_spatial_streams>2 spatial streams
+			
+			<enum 2 3_spatial_streams>3 spatial streams
+			
+			<enum 3 4_spatial_streams>4 spatial streams
+			
+			<enum 4 5_spatial_streams>5 spatial streams
+			
+			<enum 5 6_spatial_streams>6 spatial streams
+			
+			<enum 6 7_spatial_streams>7 spatial streams
+			
+			<enum 7 8_spatial_streams>8 spatial streams
+
+odma_info_valid
+			
+			When set, ofdma RU related info in the following fields
+			is valid
+			
+			<legal all>
+
+ofdma_low_ru_index
+			
+			The index of the lowerest RU used by this STA.
+			
+			<legal all>
+
+reserved_1a
+			
+			<legal 0>
+
+ofdma_high_ru_index
+			
+			The index of the highest RU used by this STA.
+			
+			<legal all>
+
+reserved_2a
+			
+			<legal 0>
+
+user_receive_quality
+			
+			RSSI / EVM for this user ???
+			
+			
+			
+			Details TBD
+			
+			<legal all>
+
+mpdu_cnt_fcs_err
+			
+			The number of MPDUs received from this STA in this PPDU
+			with FCS errors
+			
+			<legal all>
+
+wbm2rxdma_buf_source_used
+			
+			Field filled in by RXDMA
+			
+			
+			
+			When set, RXDMA has used the wbm2rxdma_buf ring as
+			source for at least one of the frames in this PPDU.
+
+fw2rxdma_buf_source_used
+			
+			Field filled in by RXDMA
+			
+			
+			
+			When set, RXDMA has used the fw2rxdma_buf ring as source
+			for at least one of the frames in this PPDU.
+
+sw2rxdma_buf_source_used
+			
+			Field filled in by RXDMA
+			
+			
+			
+			When set, RXDMA has used the sw2rxdma_buf ring as source
+			for at least one of the frames in this PPDU.
+
+reserved_2b
+			
+			<legal 0>
+
+mpdu_cnt_fcs_ok
+			
+			The number of MPDUs received from this STA in this PPDU
+			with correct FCS
+			
+			<legal all>
+
+frame_control_info_valid
+			
+			When set, the frame_control_info field contains valid
+			information
+			
+			<legal all>
+
+qos_control_info_valid
+			
+			When set, the QoS_control_info field contains valid
+			information
+			
+			<legal all>
+
+ht_control_info_valid
+			
+			When set, the HT_control_info field contains valid
+			information
+			
+			<legal all>
+
+data_sequence_control_info_valid
+			
+			When set, the First_data_seq_ctrl field contains valid
+			information
+			
+			<legal all>
+
+reserved_3a
+			
+			<legal 0>
+
+rxdma2reo_ring_used
+			
+			Field filled in by RXDMA
+			
+			
+			
+			Set when at least one frame during this PPDU got pushed
+			to this ring by RXDMA
+
+rxdma2fw_ring_used
+			
+			Field filled in by RXDMA
+			
+			
+			
+			Set when at least one frame during this PPDU got pushed
+			to this ring by RXDMA
+
+rxdma2sw_ring_used
+			
+			Field filled in by RXDMA
+			
+			
+			
+			Set when at least one frame during this PPDU got pushed
+			to this ring by RXDMA
+
+rxdma_release_ring_used
+			
+			Field filled in by RXDMA
+			
+			
+			
+			Set when at least one frame during this PPDU got pushed
+			to this ring by RXDMA
+
+ht_control_field_pkt_type
+			
+			Field only valid when HT_control_info_valid  is set.
+			
+			
+			
+			Indicates what the PHY receive type was for receiving
+			this frame. Can help determine if the HT_CONTROL field shall
+			be interpreted as HT/VHT or HE.
+			
+			
+			
+			<enum 0 dot11a>802.11a PPDU type
+			
+			<enum 1 dot11b>802.11b PPDU type
+			
+			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
+			
+			<enum 3 dot11ac>802.11ac PPDU type
+			
+			<enum 4 dot11ax>802.11ax PPDU type
+
+reserved_3b
+			
+			<legal 0>
+
+ast_index
+			
+			This field indicates the index of the AST entry
+			corresponding to this MPDU. It is provided by the GSE module
+			instantiated in RXPCU.
+			
+			A value of 0xFFFF indicates an invalid AST index,
+			meaning that No AST entry was found or NO AST search was
+			performed
+			
+			<legal all>
+
+frame_control_field
+			
+			Field only valid when Frame_control_info_valid is set.
+			
+			
+			
+			Last successfully received Frame_control field of data
+			frame (excluding Data NULL/ QoS Null) for this user
+			
+			Mainly used to track the PM state of the transmitted
+			device
+			
+			
+			
+			NOTE: only data frame info is needed, as control and
+			management frames are already routed to the FW.
+			
+			<legal all>
+
+first_data_seq_ctrl
+			
+			Field only valid when Data_sequence_control_info_valid
+			is set.
+			
+			
+			
+			Sequence control field of the first data frame
+			(excluding Data NULL or QoS Data null) received for this
+			user with correct FCS
+			
+			
+			
+			NOTE: only data frame info is needed, as control and
+			management frames are already routed to the FW.
+			
+			<legal all>
+
+qos_control_field
+			
+			Field only valid when QoS_control_info_valid is set.
+			
+			
+			
+			Last successfully received QoS_control field of data
+			frame (excluding Data NULL/ QoS Null) for this user
+			
+			
+			
+			Note that in case of multi TID, this field can only
+			reflect the last properly received MPDU, and thus can not
+			indicate all potentially different TIDs that had been
+			received earlier. 
+			
+			
+			
+			There are however per TID fields, that will contain
+			among other things all buffer status info: See
+			
+			QoSCtrl_15_8_tid???
+			
+			<legal all>
+
+ht_control_field
+			
+			Field only valid when HT_control_info_valid is set.
+			
+			
+			
+			Last successfully received
+			HT_CONTROL/VHT_CONTROL/HE_CONTROL  field of data frames,
+			excluding Data NULL/ QoS Null, for this user. Data NULL/ QoS
+			Null are excluded here because these frames are always
+			already routed to the FW by RXDMA.
+			
+			
+			
+			See field HT_control_field_pkt_type in case pkt_type
+			influences if this fields interpretation as HT/VHT/HE
+			CONTROL
+			
+			<legal all>
+
+fcs_ok_bitmap_31_0
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+
+fcs_ok_bitmap_63_32
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			
+			
+			NOTE: for users 0, 1, 2 and 3, additional bitmap info
+			(up to 256 bitmap window) is provided in
+			RX_PPDU_END_USER_STATS_EXT TLV
+			
+			<legal all>
+
+udp_msdu_count
+			
+			Field filled in by RX OLE
+			
+			Set to 0 by RXPCU
+			
+			
+			
+			The number of MSDUs that are part of MPDUs without FCS
+			error, that contain UDP frames.
+			
+			<legal all>
+
+tcp_msdu_count
+			
+			Field filled in by RX OLE
+			
+			Set to 0 by RXPCU
+			
+			
+			
+			The number of MSDUs that are part of MPDUs without FCS
+			error, that contain TCP frames.
+			
+			
+			
+			(Note: This does NOT include TCP-ACK)
+			
+			<legal all>
+
+other_msdu_count
+			
+			Field filled in by RX OLE
+			
+			Set to 0 by RXPCU
+			
+			
+			
+			The number of MSDUs that are part of MPDUs without FCS
+			error, that contain neither UDP or TCP frames.
+			
+			
+			
+			Includes Management and control frames.
+			
+			
+			
+			<legal all>
+
+tcp_ack_msdu_count
+			
+			Field filled in by RX OLE
+			
+			Set to 0 by RXPCU
+			
+			
+			
+			The number of MSDUs that are part of MPDUs without FCS
+			error, that contain TCP ack frames.
+			
+			<legal all>
+
+sw_response_reference_ptr
+			
+			Pointer that SW uses to refer back to an expected
+			response reception. Used for Rate adaptation purposes.
+			
+			When a reception occurrs that is not tied to an expected
+			response, this field is set to 0x0
+			
+			<legal all>
+
+received_qos_data_tid_bitmap
+			
+			Whenever a QoS Data frame is received, the bit in this
+			field that corresponds to the received TID shall be set.
+			
+			...Bitmap[0] = TID0
+			
+			...Bitmap[1] = TID1
+			
+			Etc.
+			
+			<legal all>
+
+received_qos_data_tid_eosp_bitmap
+			
+			Field initialized to 0
+			
+			For every QoS Data frame that is correctly received, the
+			EOSP bit of that frame is copied over into the corresponding
+			TID related field.
+			
+			Note that this implies that the bits here represent the
+			EOSP bit status for each TID of the last MPDU received for
+			that TID.
+			
+			
+			
+			received TID shall be set.
+			
+			...eosp_bitmap[0] = eosp of TID0
+			
+			...eosp_bitmap[1] = eosp of TID1
+			
+			Etc.
+			
+			<legal all>
+
+qosctrl_15_8_tid0
+			
+			Field only valid when Received_qos_data_tid_bitmap[0] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID0
+
+qosctrl_15_8_tid1
+			
+			Field only valid when Received_qos_data_tid_bitmap[1] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID1
+
+qosctrl_15_8_tid2
+			
+			Field only valid when Received_qos_data_tid_bitmap[2] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID2
+
+qosctrl_15_8_tid3
+			
+			Field only valid when Received_qos_data_tid_bitmap[3] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID3
+
+qosctrl_15_8_tid4
+			
+			Field only valid when Received_qos_data_tid_bitmap[4] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID4
+
+qosctrl_15_8_tid5
+			
+			Field only valid when Received_qos_data_tid_bitmap[5] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID5
+
+qosctrl_15_8_tid6
+			
+			Field only valid when Received_qos_data_tid_bitmap[6] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID6
+
+qosctrl_15_8_tid7
+			
+			Field only valid when Received_qos_data_tid_bitmap[7] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID7
+
+qosctrl_15_8_tid8
+			
+			Field only valid when Received_qos_data_tid_bitmap[8] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID8
+
+qosctrl_15_8_tid9
+			
+			Field only valid when Received_qos_data_tid_bitmap[9] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID9
+
+qosctrl_15_8_tid10
+			
+			Field only valid when Received_qos_data_tid_bitmap[10]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID10
+
+qosctrl_15_8_tid11
+			
+			Field only valid when Received_qos_data_tid_bitmap[11]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID11
+
+qosctrl_15_8_tid12
+			
+			Field only valid when Received_qos_data_tid_bitmap[12]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID12
+
+qosctrl_15_8_tid13
+			
+			Field only valid when Received_qos_data_tid_bitmap[13]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID13
+
+qosctrl_15_8_tid14
+			
+			Field only valid when Received_qos_data_tid_bitmap[14]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID14
+
+qosctrl_15_8_tid15
+			
+			Field only valid when Received_qos_data_tid_bitmap[15]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID15
+*/
+
+#define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_OFFSET 0x00000000
+#define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_LSB 24
+#define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_MASK 0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_1_STA_FULL_AID
+			
+			Consumer: FW
+			
+			Producer: RXPCU
+			
+			
+			
+			The full AID of this station. 
+			
+			
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET                 0x00000004
+#define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB                    0
+#define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK                   0x00001fff
+
+/* Description		RX_PPDU_END_USER_STATS_1_MCS
+			
+			MCS of the received frame
+			
+			
+			
+			For details, refer to  MCS_TYPE description
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_1_MCS_OFFSET                          0x00000004
+#define RX_PPDU_END_USER_STATS_1_MCS_LSB                             13
+#define RX_PPDU_END_USER_STATS_1_MCS_MASK                            0x0001e000
+
+/* Description		RX_PPDU_END_USER_STATS_1_NSS
+			
+			Number of spatial streams.
+			
+			
+			
+			<enum 0 1_spatial_stream>Single spatial stream
+			
+			<enum 1 2_spatial_streams>2 spatial streams
+			
+			<enum 2 3_spatial_streams>3 spatial streams
+			
+			<enum 3 4_spatial_streams>4 spatial streams
+			
+			<enum 4 5_spatial_streams>5 spatial streams
+			
+			<enum 5 6_spatial_streams>6 spatial streams
+			
+			<enum 6 7_spatial_streams>7 spatial streams
+			
+			<enum 7 8_spatial_streams>8 spatial streams
+*/
+#define RX_PPDU_END_USER_STATS_1_NSS_OFFSET                          0x00000004
+#define RX_PPDU_END_USER_STATS_1_NSS_LSB                             17
+#define RX_PPDU_END_USER_STATS_1_NSS_MASK                            0x000e0000
+
+/* Description		RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID
+			
+			When set, ofdma RU related info in the following fields
+			is valid
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_OFFSET              0x00000004
+#define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_LSB                 20
+#define RX_PPDU_END_USER_STATS_1_ODMA_INFO_VALID_MASK                0x00100000
+
+/* Description		RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX
+			
+			The index of the lowerest RU used by this STA.
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_OFFSET           0x00000004
+#define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_LSB              21
+#define RX_PPDU_END_USER_STATS_1_OFDMA_LOW_RU_INDEX_MASK             0x0fe00000
+
+/* Description		RX_PPDU_END_USER_STATS_1_RESERVED_1A
+			
+			<legal 0>
+*/
+#define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET                  0x00000004
+#define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB                     28
+#define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK                    0xf0000000
+
+/* Description		RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX
+			
+			The index of the highest RU used by this STA.
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_OFFSET          0x00000008
+#define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_LSB             0
+#define RX_PPDU_END_USER_STATS_2_OFDMA_HIGH_RU_INDEX_MASK            0x0000007f
+
+/* Description		RX_PPDU_END_USER_STATS_2_RESERVED_2A
+			
+			<legal 0>
+*/
+#define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET                  0x00000008
+#define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB                     7
+#define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK                    0x00000080
+
+/* Description		RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY
+			
+			RSSI / EVM for this user ???
+			
+			
+			
+			Details TBD
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET         0x00000008
+#define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB            8
+#define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK           0x0000ff00
+
+/* Description		RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR
+			
+			The number of MPDUs received from this STA in this PPDU
+			with FCS errors
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET             0x00000008
+#define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB                16
+#define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK               0x03ff0000
+
+/* Description		RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED
+			
+			Field filled in by RXDMA
+			
+			
+			
+			When set, RXDMA has used the wbm2rxdma_buf ring as
+			source for at least one of the frames in this PPDU.
+*/
+#define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET    0x00000008
+#define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB       26
+#define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK      0x04000000
+
+/* Description		RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED
+			
+			Field filled in by RXDMA
+			
+			
+			
+			When set, RXDMA has used the fw2rxdma_buf ring as source
+			for at least one of the frames in this PPDU.
+*/
+#define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET     0x00000008
+#define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB        27
+#define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK       0x08000000
+
+/* Description		RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED
+			
+			Field filled in by RXDMA
+			
+			
+			
+			When set, RXDMA has used the sw2rxdma_buf ring as source
+			for at least one of the frames in this PPDU.
+*/
+#define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET     0x00000008
+#define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB        28
+#define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK       0x10000000
+
+/* Description		RX_PPDU_END_USER_STATS_2_RESERVED_2B
+			
+			<legal 0>
+*/
+#define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET                  0x00000008
+#define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB                     29
+#define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK                    0xe0000000
+
+/* Description		RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK
+			
+			The number of MPDUs received from this STA in this PPDU
+			with correct FCS
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET              0x0000000c
+#define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB                 0
+#define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK                0x000001ff
+
+/* Description		RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID
+			
+			When set, the frame_control_info field contains valid
+			information
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET     0x0000000c
+#define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB        9
+#define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK       0x00000200
+
+/* Description		RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID
+			
+			When set, the QoS_control_info field contains valid
+			information
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET       0x0000000c
+#define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB          10
+#define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK         0x00000400
+
+/* Description		RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID
+			
+			When set, the HT_control_info field contains valid
+			information
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET        0x0000000c
+#define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB           11
+#define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK          0x00000800
+
+/* Description		RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID
+			
+			When set, the First_data_seq_ctrl field contains valid
+			information
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c
+#define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12
+#define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000
+
+/* Description		RX_PPDU_END_USER_STATS_3_RESERVED_3A
+			
+			<legal 0>
+*/
+#define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET                  0x0000000c
+#define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB                     13
+#define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK                    0x0000e000
+
+/* Description		RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED
+			
+			Field filled in by RXDMA
+			
+			
+			
+			Set when at least one frame during this PPDU got pushed
+			to this ring by RXDMA
+*/
+#define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET          0x0000000c
+#define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB             16
+#define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK            0x00010000
+
+/* Description		RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED
+			
+			Field filled in by RXDMA
+			
+			
+			
+			Set when at least one frame during this PPDU got pushed
+			to this ring by RXDMA
+*/
+#define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET           0x0000000c
+#define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB              17
+#define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK             0x00020000
+
+/* Description		RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED
+			
+			Field filled in by RXDMA
+			
+			
+			
+			Set when at least one frame during this PPDU got pushed
+			to this ring by RXDMA
+*/
+#define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET           0x0000000c
+#define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB              18
+#define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK             0x00040000
+
+/* Description		RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED
+			
+			Field filled in by RXDMA
+			
+			
+			
+			Set when at least one frame during this PPDU got pushed
+			to this ring by RXDMA
+*/
+#define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET      0x0000000c
+#define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB         19
+#define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK        0x00080000
+
+/* Description		RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE
+			
+			Field only valid when HT_control_info_valid  is set.
+			
+			
+			
+			Indicates what the PHY receive type was for receiving
+			this frame. Can help determine if the HT_CONTROL field shall
+			be interpreted as HT/VHT or HE.
+			
+			
+			
+			<enum 0 dot11a>802.11a PPDU type
+			
+			<enum 1 dot11b>802.11b PPDU type
+			
+			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
+			
+			<enum 3 dot11ac>802.11ac PPDU type
+			
+			<enum 4 dot11ax>802.11ax PPDU type
+*/
+#define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET    0x0000000c
+#define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB       20
+#define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK      0x00f00000
+
+/* Description		RX_PPDU_END_USER_STATS_3_RESERVED_3B
+			
+			<legal 0>
+*/
+#define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET                  0x0000000c
+#define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB                     24
+#define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK                    0xff000000
+
+/* Description		RX_PPDU_END_USER_STATS_4_AST_INDEX
+			
+			This field indicates the index of the AST entry
+			corresponding to this MPDU. It is provided by the GSE module
+			instantiated in RXPCU.
+			
+			A value of 0xFFFF indicates an invalid AST index,
+			meaning that No AST entry was found or NO AST search was
+			performed
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET                    0x00000010
+#define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB                       0
+#define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK                      0x0000ffff
+
+/* Description		RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD
+			
+			Field only valid when Frame_control_info_valid is set.
+			
+			
+			
+			Last successfully received Frame_control field of data
+			frame (excluding Data NULL/ QoS Null) for this user
+			
+			Mainly used to track the PM state of the transmitted
+			device
+			
+			
+			
+			NOTE: only data frame info is needed, as control and
+			management frames are already routed to the FW.
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET          0x00000010
+#define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB             16
+#define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK            0xffff0000
+
+/* Description		RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL
+			
+			Field only valid when Data_sequence_control_info_valid
+			is set.
+			
+			
+			
+			Sequence control field of the first data frame
+			(excluding Data NULL or QoS Data null) received for this
+			user with correct FCS
+			
+			
+			
+			NOTE: only data frame info is needed, as control and
+			management frames are already routed to the FW.
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET          0x00000014
+#define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB             0
+#define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK            0x0000ffff
+
+/* Description		RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD
+			
+			Field only valid when QoS_control_info_valid is set.
+			
+			
+			
+			Last successfully received QoS_control field of data
+			frame (excluding Data NULL/ QoS Null) for this user
+			
+			
+			
+			Note that in case of multi TID, this field can only
+			reflect the last properly received MPDU, and thus can not
+			indicate all potentially different TIDs that had been
+			received earlier. 
+			
+			
+			
+			There are however per TID fields, that will contain
+			among other things all buffer status info: See
+			
+			QoSCtrl_15_8_tid???
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET            0x00000014
+#define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB               16
+#define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK              0xffff0000
+
+/* Description		RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD
+			
+			Field only valid when HT_control_info_valid is set.
+			
+			
+			
+			Last successfully received
+			HT_CONTROL/VHT_CONTROL/HE_CONTROL  field of data frames,
+			excluding Data NULL/ QoS Null, for this user. Data NULL/ QoS
+			Null are excluded here because these frames are always
+			already routed to the FW by RXDMA.
+			
+			
+			
+			See field HT_control_field_pkt_type in case pkt_type
+			influences if this fields interpretation as HT/VHT/HE
+			CONTROL
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET             0x00000018
+#define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB                0
+#define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK               0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET           0x0000001c
+#define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB              0
+#define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK             0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			
+			
+			NOTE: for users 0, 1, 2 and 3, additional bitmap info
+			(up to 256 bitmap window) is provided in
+			RX_PPDU_END_USER_STATS_EXT TLV
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET          0x00000020
+#define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB             0
+#define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK            0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT
+			
+			Field filled in by RX OLE
+			
+			Set to 0 by RXPCU
+			
+			
+			
+			The number of MSDUs that are part of MPDUs without FCS
+			error, that contain UDP frames.
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET               0x00000024
+#define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB                  0
+#define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK                 0x0000ffff
+
+/* Description		RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT
+			
+			Field filled in by RX OLE
+			
+			Set to 0 by RXPCU
+			
+			
+			
+			The number of MSDUs that are part of MPDUs without FCS
+			error, that contain TCP frames.
+			
+			
+			
+			(Note: This does NOT include TCP-ACK)
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET               0x00000024
+#define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB                  16
+#define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK                 0xffff0000
+
+/* Description		RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT
+			
+			Field filled in by RX OLE
+			
+			Set to 0 by RXPCU
+			
+			
+			
+			The number of MSDUs that are part of MPDUs without FCS
+			error, that contain neither UDP or TCP frames.
+			
+			
+			
+			Includes Management and control frames.
+			
+			
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET            0x00000028
+#define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB               0
+#define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK              0x0000ffff
+
+/* Description		RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT
+			
+			Field filled in by RX OLE
+			
+			Set to 0 by RXPCU
+			
+			
+			
+			The number of MSDUs that are part of MPDUs without FCS
+			error, that contain TCP ack frames.
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET          0x00000028
+#define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB             16
+#define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK            0xffff0000
+
+/* Description		RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR
+			
+			Pointer that SW uses to refer back to an expected
+			response reception. Used for Rate adaptation purposes.
+			
+			When a reception occurrs that is not tied to an expected
+			response, this field is set to 0x0
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET   0x0000002c
+#define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB      0
+#define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK     0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP
+			
+			Whenever a QoS Data frame is received, the bit in this
+			field that corresponds to the received TID shall be set.
+			
+			...Bitmap[0] = TID0
+			
+			...Bitmap[1] = TID1
+			
+			Etc.
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030
+#define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB   0
+#define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK  0x0000ffff
+
+/* Description		RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP
+			
+			Field initialized to 0
+			
+			For every QoS Data frame that is correctly received, the
+			EOSP bit of that frame is copied over into the corresponding
+			TID related field.
+			
+			Note that this implies that the bits here represent the
+			EOSP bit status for each TID of the last MPDU received for
+			that TID.
+			
+			
+			
+			received TID shall be set.
+			
+			...eosp_bitmap[0] = eosp of TID0
+			
+			...eosp_bitmap[1] = eosp of TID1
+			
+			Etc.
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030
+#define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16
+#define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000
+
+/* Description		RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0
+			
+			Field only valid when Received_qos_data_tid_bitmap[0] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID0
+*/
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET           0x00000034
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB              0
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK             0x000000ff
+
+/* Description		RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1
+			
+			Field only valid when Received_qos_data_tid_bitmap[1] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID1
+*/
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET           0x00000034
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB              8
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK             0x0000ff00
+
+/* Description		RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2
+			
+			Field only valid when Received_qos_data_tid_bitmap[2] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID2
+*/
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET           0x00000034
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB              16
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK             0x00ff0000
+
+/* Description		RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3
+			
+			Field only valid when Received_qos_data_tid_bitmap[3] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID3
+*/
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET           0x00000034
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB              24
+#define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK             0xff000000
+
+/* Description		RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4
+			
+			Field only valid when Received_qos_data_tid_bitmap[4] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID4
+*/
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET           0x00000038
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB              0
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK             0x000000ff
+
+/* Description		RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5
+			
+			Field only valid when Received_qos_data_tid_bitmap[5] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID5
+*/
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET           0x00000038
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB              8
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK             0x0000ff00
+
+/* Description		RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6
+			
+			Field only valid when Received_qos_data_tid_bitmap[6] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID6
+*/
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET           0x00000038
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB              16
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK             0x00ff0000
+
+/* Description		RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7
+			
+			Field only valid when Received_qos_data_tid_bitmap[7] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID7
+*/
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET           0x00000038
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB              24
+#define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK             0xff000000
+
+/* Description		RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8
+			
+			Field only valid when Received_qos_data_tid_bitmap[8] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID8
+*/
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET           0x0000003c
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB              0
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK             0x000000ff
+
+/* Description		RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9
+			
+			Field only valid when Received_qos_data_tid_bitmap[9] is
+			set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID9
+*/
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET           0x0000003c
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB              8
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK             0x0000ff00
+
+/* Description		RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10
+			
+			Field only valid when Received_qos_data_tid_bitmap[10]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID10
+*/
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET          0x0000003c
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB             16
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK            0x00ff0000
+
+/* Description		RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11
+			
+			Field only valid when Received_qos_data_tid_bitmap[11]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID11
+*/
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET          0x0000003c
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB             24
+#define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK            0xff000000
+
+/* Description		RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12
+			
+			Field only valid when Received_qos_data_tid_bitmap[12]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID12
+*/
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET          0x00000040
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB             0
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK            0x000000ff
+
+/* Description		RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13
+			
+			Field only valid when Received_qos_data_tid_bitmap[13]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID13
+*/
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET          0x00000040
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB             8
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK            0x0000ff00
+
+/* Description		RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14
+			
+			Field only valid when Received_qos_data_tid_bitmap[14]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID14
+*/
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET          0x00000040
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB             16
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK            0x00ff0000
+
+/* Description		RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15
+			
+			Field only valid when Received_qos_data_tid_bitmap[15]
+			is set
+			
+			
+			
+			QoS control field bits 15-8 of the last properly
+			received MPDU with TID15
+*/
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET          0x00000040
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB             24
+#define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK            0xff000000
+
+
+#endif // _RX_PPDU_END_USER_STATS_H_

hw/qca6290/v1/rx_ppdu_end_user_stats_ext.h

@@ -0,0 +1,220 @@
+/*
+ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _RX_PPDU_END_USER_STATS_EXT_H_
+#define _RX_PPDU_END_USER_STATS_EXT_H_
+#if !defined(__ASSEMBLER__)
+#endif
+
+#include "rx_rxpcu_classification_overview.h"
+
+// ################ START SUMMARY #################
+//
+//	Dword	Fields
+//	0	struct rx_rxpcu_classification_overview rxpcu_classification_details;
+//	1	fcs_ok_bitmap_95_64[31:0]
+//	2	fcs_ok_bitmap_127_96[31:0]
+//	3	fcs_ok_bitmap_159_128[31:0]
+//	4	fcs_ok_bitmap_191_160[31:0]
+//	5	fcs_ok_bitmap_223_192[31:0]
+//	6	fcs_ok_bitmap_255_224[31:0]
+//
+// ################ END SUMMARY #################
+
+#define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS_EXT 7
+
+struct rx_ppdu_end_user_stats_ext {
+    struct            rx_rxpcu_classification_overview                       rxpcu_classification_details;
+             uint32_t fcs_ok_bitmap_95_64             : 32; //[31:0]
+             uint32_t fcs_ok_bitmap_127_96            : 32; //[31:0]
+             uint32_t fcs_ok_bitmap_159_128           : 32; //[31:0]
+             uint32_t fcs_ok_bitmap_191_160           : 32; //[31:0]
+             uint32_t fcs_ok_bitmap_223_192           : 32; //[31:0]
+             uint32_t fcs_ok_bitmap_255_224           : 32; //[31:0]
+};
+
+/*
+
+struct rx_rxpcu_classification_overview rxpcu_classification_details
+			
+			Details related to what RXPCU classification types of
+			MPDUs have been received
+
+fcs_ok_bitmap_95_64
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+
+fcs_ok_bitmap_127_96
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+
+fcs_ok_bitmap_159_128
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+
+fcs_ok_bitmap_191_160
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+
+fcs_ok_bitmap_223_192
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+
+fcs_ok_bitmap_255_224
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+*/
+
+#define RX_PPDU_END_USER_STATS_EXT_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_OFFSET 0x00000000
+#define RX_PPDU_END_USER_STATS_EXT_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_LSB 0
+#define RX_PPDU_END_USER_STATS_EXT_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_MASK 0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_EXT_1_FCS_OK_BITMAP_95_64
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_EXT_1_FCS_OK_BITMAP_95_64_OFFSET      0x00000004
+#define RX_PPDU_END_USER_STATS_EXT_1_FCS_OK_BITMAP_95_64_LSB         0
+#define RX_PPDU_END_USER_STATS_EXT_1_FCS_OK_BITMAP_95_64_MASK        0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_EXT_2_FCS_OK_BITMAP_127_96
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_EXT_2_FCS_OK_BITMAP_127_96_OFFSET     0x00000008
+#define RX_PPDU_END_USER_STATS_EXT_2_FCS_OK_BITMAP_127_96_LSB        0
+#define RX_PPDU_END_USER_STATS_EXT_2_FCS_OK_BITMAP_127_96_MASK       0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_EXT_3_FCS_OK_BITMAP_159_128
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_EXT_3_FCS_OK_BITMAP_159_128_OFFSET    0x0000000c
+#define RX_PPDU_END_USER_STATS_EXT_3_FCS_OK_BITMAP_159_128_LSB       0
+#define RX_PPDU_END_USER_STATS_EXT_3_FCS_OK_BITMAP_159_128_MASK      0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_EXT_4_FCS_OK_BITMAP_191_160
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_EXT_4_FCS_OK_BITMAP_191_160_OFFSET    0x00000010
+#define RX_PPDU_END_USER_STATS_EXT_4_FCS_OK_BITMAP_191_160_LSB       0
+#define RX_PPDU_END_USER_STATS_EXT_4_FCS_OK_BITMAP_191_160_MASK      0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_EXT_5_FCS_OK_BITMAP_223_192
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_EXT_5_FCS_OK_BITMAP_223_192_OFFSET    0x00000014
+#define RX_PPDU_END_USER_STATS_EXT_5_FCS_OK_BITMAP_223_192_LSB       0
+#define RX_PPDU_END_USER_STATS_EXT_5_FCS_OK_BITMAP_223_192_MASK      0xffffffff
+
+/* Description		RX_PPDU_END_USER_STATS_EXT_6_FCS_OK_BITMAP_255_224
+			
+			Bitmap indicates in order of received MPDUs, which MPDUs
+			had an passing FCS or had an error.
+			
+			1: FCS OK
+			
+			0: FCS error
+			
+			<legal all>
+*/
+#define RX_PPDU_END_USER_STATS_EXT_6_FCS_OK_BITMAP_255_224_OFFSET    0x00000018
+#define RX_PPDU_END_USER_STATS_EXT_6_FCS_OK_BITMAP_255_224_LSB       0
+#define RX_PPDU_END_USER_STATS_EXT_6_FCS_OK_BITMAP_255_224_MASK      0xffffffff
+
+
+#endif // _RX_PPDU_END_USER_STATS_EXT_H_

hw/qca6290/v1/rx_ppdu_start.h

@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _RX_PPDU_START_H_
+#define _RX_PPDU_START_H_
+#if !defined(__ASSEMBLER__)
+#endif
+
+
+// ################ START SUMMARY #################
+//
+//	Dword	Fields
+//	0	phy_ppdu_id[15:0], reserved_15[31:16]
+//	1	sw_phy_meta_data[31:0]
+//	2	ppdu_start_timestamp[31:0]
+//
+// ################ END SUMMARY #################
+
+#define NUM_OF_DWORDS_RX_PPDU_START 3
+
+struct rx_ppdu_start {
+             uint32_t phy_ppdu_id                     : 16, //[15:0]
+                      reserved_15                     : 16; //[31:16]
+             uint32_t sw_phy_meta_data                : 32; //[31:0]
+             uint32_t ppdu_start_timestamp            : 32; //[31:0]
+};
+
+/*
+
+phy_ppdu_id
+			
+			A ppdu counter value that PHY increments for every PPDU
+			received. The counter value wraps around  
+			
+			<legal all>
+
+reserved_15
+			
+			Reserved
+			
+			<legal 0>
+
+sw_phy_meta_data
+			
+			SW programmed Meta data provided by the PHY.
+			
+			
+			
+			Can be used for SW to indicate the channel the device is
+			on.
+
+ppdu_start_timestamp
+			
+			Timestamp that indicates when the PPDU that contained
+			this MPDU started on the medium.
+			
+			
+			
+			The timestamp is captured by the PHY ????TODO: Is this
+			comment correct ?
+			
+			<legal all>
+*/
+
+
+/* Description		RX_PPDU_START_0_PHY_PPDU_ID
+			
+			A ppdu counter value that PHY increments for every PPDU
+			received. The counter value wraps around  
+			
+			<legal all>
+*/
+#define RX_PPDU_START_0_PHY_PPDU_ID_OFFSET                           0x00000000
+#define RX_PPDU_START_0_PHY_PPDU_ID_LSB                              0
+#define RX_PPDU_START_0_PHY_PPDU_ID_MASK                             0x0000ffff
+
+/* Description		RX_PPDU_START_0_RESERVED_15
+			
+			Reserved
+			
+			<legal 0>
+*/
+#define RX_PPDU_START_0_RESERVED_15_OFFSET                           0x00000000
+#define RX_PPDU_START_0_RESERVED_15_LSB                              16
+#define RX_PPDU_START_0_RESERVED_15_MASK                             0xffff0000
+
+/* Description		RX_PPDU_START_1_SW_PHY_META_DATA
+			
+			SW programmed Meta data provided by the PHY.
+			
+			
+			
+			Can be used for SW to indicate the channel the device is
+			on.
+*/
+#define RX_PPDU_START_1_SW_PHY_META_DATA_OFFSET                      0x00000004
+#define RX_PPDU_START_1_SW_PHY_META_DATA_LSB                         0
+#define RX_PPDU_START_1_SW_PHY_META_DATA_MASK                        0xffffffff
+
+/* Description		RX_PPDU_START_2_PPDU_START_TIMESTAMP
+			
+			Timestamp that indicates when the PPDU that contained
+			this MPDU started on the medium.
+			
+			
+			
+			The timestamp is captured by the PHY ????TODO: Is this
+			comment correct ?
+			
+			<legal all>
+*/
+#define RX_PPDU_START_2_PPDU_START_TIMESTAMP_OFFSET                  0x00000008
+#define RX_PPDU_START_2_PPDU_START_TIMESTAMP_LSB                     0
+#define RX_PPDU_START_2_PPDU_START_TIMESTAMP_MASK                    0xffffffff
+
+
+#endif // _RX_PPDU_START_H_

hw/qca6290/v1/rx_ppdu_start_user_info.h

@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _RX_PPDU_START_USER_INFO_H_
+#define _RX_PPDU_START_USER_INFO_H_
+#if !defined(__ASSEMBLER__)
+#endif
+
+#include "receive_user_info.h"
+
+// ################ START SUMMARY #################
+//
+//	Dword	Fields
+//	0-1	struct receive_user_info receive_user_info_details;
+//
+// ################ END SUMMARY #################
+
+#define NUM_OF_DWORDS_RX_PPDU_START_USER_INFO 2
+
+struct rx_ppdu_start_user_info {
+    struct            receive_user_info                       receive_user_info_details;
+};
+
+/*
+
+struct receive_user_info receive_user_info_details
+			
+			Overview of receive parameters that the MAC needs to
+			prepend to every received MSDU/MPDU.
+*/
+
+#define RX_PPDU_START_USER_INFO_0_RECEIVE_USER_INFO_RECEIVE_USER_INFO_DETAILS_OFFSET 0x00000000
+#define RX_PPDU_START_USER_INFO_0_RECEIVE_USER_INFO_RECEIVE_USER_INFO_DETAILS_LSB 0
+#define RX_PPDU_START_USER_INFO_0_RECEIVE_USER_INFO_RECEIVE_USER_INFO_DETAILS_MASK 0xffffffff
+#define RX_PPDU_START_USER_INFO_1_RECEIVE_USER_INFO_RECEIVE_USER_INFO_DETAILS_OFFSET 0x00000004
+#define RX_PPDU_START_USER_INFO_1_RECEIVE_USER_INFO_RECEIVE_USER_INFO_DETAILS_LSB 0
+#define RX_PPDU_START_USER_INFO_1_RECEIVE_USER_INFO_RECEIVE_USER_INFO_DETAILS_MASK 0xffffffff
+
+
+#endif // _RX_PPDU_START_USER_INFO_H_

hw/qca6290/v1/rx_rxpcu_classification_overview.h

@@ -0,0 +1,188 @@
+/*
+ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
+#define _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
+#if !defined(__ASSEMBLER__)
+#endif
+
+
+// ################ START SUMMARY #################
+//
+//	Dword	Fields
+//	0	filter_pass_mpdus[0], filter_pass_mpdus_fcs_ok[1], monitor_direct_mpdus[2], monitor_direct_mpdus_fcs_ok[3], monitor_other_mpdus[4], monitor_other_mpdus_fcs_ok[5], reserved_0[15:6], phy_ppdu_id[31:16]
+//
+// ################ END SUMMARY #################
+
+#define NUM_OF_DWORDS_RX_RXPCU_CLASSIFICATION_OVERVIEW 1
+
+struct rx_rxpcu_classification_overview {
+             uint32_t filter_pass_mpdus               :  1, //[0]
+                      filter_pass_mpdus_fcs_ok        :  1, //[1]
+                      monitor_direct_mpdus            :  1, //[2]
+                      monitor_direct_mpdus_fcs_ok     :  1, //[3]
+                      monitor_other_mpdus             :  1, //[4]
+                      monitor_other_mpdus_fcs_ok      :  1, //[5]
+                      reserved_0                      : 10, //[15:6]
+                      phy_ppdu_id                     : 16; //[31:16]
+};
+
+/*
+
+filter_pass_mpdus
+			
+			When set, at least one Filter Pass MPDU has been
+			received. FCS might or might not have been passing
+			
+			<legal all>
+
+filter_pass_mpdus_fcs_ok
+			
+			When set, at least one Filter Pass MPDU has been
+			received that has a correct FCS.
+			
+			<legal all>
+
+monitor_direct_mpdus
+			
+			When set, at least one Monitor Direct MPDU has been
+			received. FCS might or might not have been passing
+			
+			<legal all>
+
+monitor_direct_mpdus_fcs_ok
+			
+			When set, at least one Monitor Direct MPDU has been
+			received that has a correct FCS.
+			
+			<legal all>
+
+monitor_other_mpdus
+			
+			When set, at least one Monitor Direct MPDU has been
+			received. FCS might or might not have been passing
+			
+			<legal all>
+
+monitor_other_mpdus_fcs_ok
+			
+			When set, at least one Monitor Direct MPDU has been
+			received that has a correct FCS.
+			
+			<legal all>
+
+reserved_0
+			
+			<legal 0>
+
+phy_ppdu_id
+			
+			A ppdu counter value that PHY increments for every PPDU
+			received. The counter value wraps around  
+			
+			<legal all>
+*/
+
+
+/* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS
+			
+			When set, at least one Filter Pass MPDU has been
+			received. FCS might or might not have been passing
+			
+			<legal all>
+*/
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_OFFSET  0x00000000
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_LSB     0
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_MASK    0x00000001
+
+/* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK
+			
+			When set, at least one Filter Pass MPDU has been
+			received that has a correct FCS.
+			
+			<legal all>
+*/
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_LSB 1
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002
+
+/* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS
+			
+			When set, at least one Monitor Direct MPDU has been
+			received. FCS might or might not have been passing
+			
+			<legal all>
+*/
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_LSB  2
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_MASK 0x00000004
+
+/* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK
+			
+			When set, at least one Monitor Direct MPDU has been
+			received that has a correct FCS.
+			
+			<legal all>
+*/
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008
+
+/* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS
+			
+			When set, at least one Monitor Direct MPDU has been
+			received. FCS might or might not have been passing
+			
+			<legal all>
+*/
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_OFFSET 0x00000000
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_LSB   4
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_MASK  0x00000010
+
+/* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK
+			
+			When set, at least one Monitor Direct MPDU has been
+			received that has a correct FCS.
+			
+			<legal all>
+*/
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020
+
+/* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0
+			
+			<legal 0>
+*/
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_OFFSET         0x00000000
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_LSB            6
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_RESERVED_0_MASK           0x0000ffc0
+
+/* Description		RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID
+			
+			A ppdu counter value that PHY increments for every PPDU
+			received. The counter value wraps around  
+			
+			<legal all>
+*/
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_OFFSET        0x00000000
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_LSB           16
+#define RX_RXPCU_CLASSIFICATION_OVERVIEW_0_PHY_PPDU_ID_MASK          0xffff0000
+
+
+#endif // _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_