qcacld-3.0: Update EHT capability and EHT Operation as per draft 3.0 spec

Update EHT capability and EHT Operation handling as per draft 3.0 spec.

Change-Id: Ie9bdbbb6777cf8dc7616595dff0909168de5fc56
CRs-Fixed: 3457024

core/mac/src/pe/include/lim_session.h

@@ -206,6 +206,8 @@ struct mld_capab_and_op {
  * @eml_capab_present: the present flag of EML capability
  * @mld_capab_and_op_present: the present flag of MLD capability and operation
  * @mld_id_present: the present flag of MLD ID
+ * @ext_mld_capab_and_op_present: Extended MLD Capabilities And
+ *                                Operations Present
  * @reserved_1: reserved
  * @common_info_length: common info length
  * @mld_mac_addr: MLD mac address
@@ -230,7 +232,8 @@ struct wlan_mlo_ie {
 	uint16_t eml_capab_present:1;
 	uint16_t mld_capab_and_op_present: 1;
 	uint16_t mld_id_present: 1;
-	uint16_t reserved_1:6;
+	uint16_t ext_mld_capab_and_op_present: 1;
+	uint16_t reserved_1:5;
 	uint8_t common_info_length;
 	uint8_t mld_mac_addr[6];
 	uint8_t link_id;
@@ -320,6 +323,8 @@ struct mlo_link_ie_info {
  * @medium_sync_delay_info_present: Medium sync delay information present
  * @bss_param_change_cnt_present: BSS parameter change count present
  * @link_id_info_present: Link ID information present
+ * @ext_mld_capab_and_op_present: Extended MLD Capabilities And
+ *                                Operations Present
  * @reserved: reserved bit
  * @type: Type bits
  */
@@ -327,7 +332,8 @@ struct wlan_mlo_ie_info {
 #ifndef ANI_LITTLE_BIT_ENDIAN
 	uint8_t mld_mac_addr[6];
 	uint8_t common_info_length;
-	uint16_t reserved_1:6;
+	uint16_t reserved_1:5;
+	uint16_t ext_mld_capab_and_op_present:1;
 	uint16_t mld_id_present:1;
 	uint16_t mld_capab_and_op_present:1;
 	uint16_t eml_capab_present:1;
@@ -345,7 +351,8 @@ struct wlan_mlo_ie_info {
 	uint16_t eml_capab_present:1;
 	uint16_t mld_capab_and_op_present:1;
 	uint16_t mld_id_present:1;
-	uint16_t reserved_1:6;
+	uint16_t ext_mld_capab_and_op_present:1;
+	uint16_t reserved_1:5;
 	uint8_t common_info_length;
 	uint8_t mld_mac_addr[6];
 #endif

core/mac/src/pe/lim/lim_utils.c

@@ -8201,6 +8201,8 @@ void lim_set_mlo_caps(struct mac_context *mac, struct pe_session *session,
 		mlo_ie_info->eml_capab_present = dot11_cap.eml_capab_present;
 		mlo_ie_info->mld_capab_and_op_present = dot11_cap.mld_capab_and_op_present;
 		mlo_ie_info->mld_id_present = dot11_cap.mld_id_present;
+		mlo_ie_info->ext_mld_capab_and_op_present =
+				dot11_cap.ext_mld_capab_and_op_present;
 		mlo_ie_info->reserved_1 = dot11_cap.reserved_1;
 		mlo_ie_info->common_info_length = dot11_cap.common_info_length;
 		qdf_mem_copy(&mlo_ie_info->mld_mac_addr,
@@ -8930,6 +8932,10 @@ void lim_set_eht_caps(struct mac_context *mac, struct pe_session *session,
 		eht_cap->eht_trs_support = dot11_cap.eht_trs_support;
 		eht_cap->txop_return_support_txop_share_m2 =
 			dot11_cap.txop_return_support_txop_share_m2;
+		eht_cap->two_bqrs_support =
+			dot11_cap.two_bqrs_support;
+		eht_cap->eht_link_adaptation_support =
+			dot11_cap.eht_link_adaptation_support;
 		eht_cap->support_320mhz_6ghz = dot11_cap.support_320mhz_6ghz;
 		eht_cap->ru_242tone_wt_20mhz = dot11_cap.ru_242tone_wt_20mhz;
 		eht_cap->ndp_4x_eht_ltf_3dot2_us_gi =
@@ -8995,6 +9001,12 @@ void lim_set_eht_caps(struct mac_context *mac, struct pe_session *session,
 			dot11_cap.rx_1k_qam_in_wider_bw_dl_ofdma;
 		eht_cap->rx_4k_qam_in_wider_bw_dl_ofdma =
 			dot11_cap.rx_4k_qam_in_wider_bw_dl_ofdma;
+		eht_cap->limited_cap_support_20mhz =
+			dot11_cap.limited_cap_support_20mhz;
+		eht_cap->triggered_mu_bf_full_bw_fb_and_dl_mumimo =
+			dot11_cap.triggered_mu_bf_full_bw_fb_and_dl_mumimo;
+		eht_cap->mru_support_20mhz =
+			dot11_cap.mru_support_20mhz;
 
 		if ((is_band_2g && !dot11_he_cap.chan_width_0) ||
 			(!is_band_2g && !dot11_he_cap.chan_width_1 &&

core/mac/src/sys/legacy/src/utils/src/parser_api.c

@@ -7771,6 +7771,27 @@ enum EHT_PER_BW_TXRX_MCS_NSS_MAP_IDX {
 				      EHTCAP_MAC_TXOP_RET_SUPPP_IN_SHARING_MODE2_IDX, \
 				      EHTCAP_MAC_TXOP_RET_SUPPP_IN_SHARING_MODE2_BITS, \
 				      value)
+
+#define EHTCAP_MAC_TWO_BQRS_SUPP_GET_FROM_IE(__eht_cap_mac) \
+			ehtcap_ie_get(__eht_cap_mac[EHTCAP_MACBYTE_IDX1], \
+				      EHTCAP_MAC_TWO_BQRS_SUPP_IDX, \
+				      EHTCAP_MAC_TWO_BQRS_SUPP_BITS)
+#define EHTCAP_MAC_TWO_BQRS_SUPP_SET_FROM_IE(__eht_cap_mac, value) \
+			ehtcap_ie_set(&__eht_cap_mac[EHTCAP_MACBYTE_IDX1], \
+				      EHTCAP_MAC_TWO_BQRS_SUPP_IDX, \
+				      EHTCAP_MAC_TWO_BQRS_SUPP_BITS, \
+				      value)
+
+#define EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_GET_FROM_IE(__eht_cap_mac) \
+			ehtcap_ie_get(__eht_cap_mac[EHTCAP_MACBYTE_IDX1], \
+				      EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_IDX, \
+				      EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_BITS)
+#define EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_SET_FROM_IE(__eht_cap_mac, value) \
+			ehtcap_ie_set(&__eht_cap_mac[EHTCAP_MACBYTE_IDX1], \
+				      EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_IDX, \
+				      EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_BITS, \
+				      value)
+
 /* byte 0 */
 #define EHTCAP_PHY_320MHZIN6GHZ_GET_FROM_IE(__eht_cap_phy) \
 			ehtcap_ie_get(__eht_cap_phy[EHTCAP_PHYBYTE_IDX0], \
@@ -8174,6 +8195,36 @@ enum EHT_PER_BW_TXRX_MCS_NSS_MAP_IDX {
 			      EHTCAP_PHY_RX_4K_QAM_IN_WIDER_BW_DL_OFDMA_BITS, \
 			      value)
 
+#define EHTCAP_PHY_20MHZ_ONLY_CAPS_GET_FROM_IE(__eht_cap_phy) \
+		ehtcap_ie_get(__eht_cap_phy[EHTCAP_PHYBYTE_IDX8], \
+			      EHTCAP_PHY_20MHZ_ONLY_CAPS_IDX, \
+			      EHTCAP_PHY_20MHZ_ONLY_CAPS_BITS)
+#define EHTCAP_PHY_20MHZ_ONLY_CAPS_SET_TO_IE(__eht_cap_phy, value) \
+		ehtcap_ie_set(&__eht_cap_phy[EHTCAP_PHYBYTE_IDX8], \
+			      EHTCAP_PHY_20MHZ_ONLY_CAPS_IDX, \
+			      EHTCAP_PHY_20MHZ_ONLY_CAPS_BITS, \
+			      value)
+
+#define EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FULL_BW_FB_AND_DLMUMIMO_GET_FROM_IE(__eht_cap_phy) \
+		ehtcap_ie_get(__eht_cap_phy[EHTCAP_PHYBYTE_IDX8], \
+			      EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FL_BW_FB_DLMUMIMO_IDX, \
+			      EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FL_BW_FB_DLMUMIMO_BITS)
+
+#define EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FULL_BW_FB_AND_DLMUMIMO_SET_TO_IE(__eht_cap_phy, value) \
+		ehtcap_ie_set(&__eht_cap_phy[EHTCAP_PHYBYTE_IDX8], \
+			      EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FL_BW_FB_DLMUMIMO_IDX, \
+			      EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FL_BW_FB_DLMUMIMO_BITS, \
+			      value)
+
+#define EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_GET_FROM_IE(__eht_cap_phy) \
+		ehtcap_ie_get(__eht_cap_phy[EHTCAP_PHYBYTE_IDX8], \
+			      EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_IDX, \
+			      EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_BITS)
+#define EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_SET_TO_IE(__eht_cap_phy, value) \
+		ehtcap_ie_set(&__eht_cap_phy[EHTCAP_PHYBYTE_IDX8], \
+			      EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_IDX, \
+			      EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_BITS, \
+			      value)
 static
 QDF_STATUS lim_ieee80211_unpack_ehtop(const uint8_t *eht_op_ie,
 				      tDot11fIEeht_op *dot11f_eht_op,
@@ -8315,6 +8366,13 @@ QDF_STATUS lim_ieee80211_unpack_ehtcap(const uint8_t *eht_cap_ie,
 	dot11f_eht_cap->txop_return_support_txop_share_m2 =
 		EHTCAP_MAC_TXOP_RETURN_SUPPORT_SHARE_M2_GET_FROM_IE(
 				ehtcap->eht_mac_cap);
+	dot11f_eht_cap->two_bqrs_support =
+			EHTCAP_MAC_TWO_BQRS_SUPP_GET_FROM_IE(
+					ehtcap->eht_mac_cap);
+
+	dot11f_eht_cap->eht_link_adaptation_support =
+			EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_GET_FROM_IE(
+					ehtcap->eht_mac_cap);
 
 	dot11f_eht_cap->support_320mhz_6ghz =
 			EHTCAP_PHY_320MHZIN6GHZ_GET_FROM_IE(
@@ -8485,6 +8543,18 @@ QDF_STATUS lim_ieee80211_unpack_ehtcap(const uint8_t *eht_cap_ie,
 			EHTCAP_PHY_RX_4K_QAM_IN_WIDER_BW_DL_OFDMA_GET_FROM_IE(
 					ehtcap->eht_phy_cap.phy_cap_bytes);
 
+	dot11f_eht_cap->limited_cap_support_20mhz =
+			EHTCAP_PHY_20MHZ_ONLY_CAPS_GET_FROM_IE(
+					ehtcap->eht_phy_cap.phy_cap_bytes);
+
+	dot11f_eht_cap->triggered_mu_bf_full_bw_fb_and_dl_mumimo =
+	EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FULL_BW_FB_AND_DLMUMIMO_GET_FROM_IE(
+					ehtcap->eht_phy_cap.phy_cap_bytes);
+
+	dot11f_eht_cap->mru_support_20mhz =
+			EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_GET_FROM_IE(
+					ehtcap->eht_phy_cap.phy_cap_bytes);
+
 	/* Fill EHT MCS and NSS set field */
 	if ((is_band_2g && !dot11f_he_cap.chan_width_0) ||
 	    (!is_band_2g && !dot11f_he_cap.chan_width_1 &&
@@ -8750,6 +8820,13 @@ void lim_ieee80211_pack_ehtcap(uint8_t *ie, tDot11fIEeht_cap dot11f_eht_cap,
 	val = dot11f_eht_cap.txop_return_support_txop_share_m2;
 	EHTCAP_MAC_TXOP_RETURN_SUPPORT_SHARE_M2_SET_FROM_IE(ehtcap->eht_mac_cap,
 							    val);
+	val = dot11f_eht_cap.two_bqrs_support;
+	EHTCAP_MAC_TWO_BQRS_SUPP_SET_FROM_IE(ehtcap->eht_mac_cap,
+					     val);
+
+	val = dot11f_eht_cap.eht_link_adaptation_support;
+	EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_SET_FROM_IE(ehtcap->eht_mac_cap,
+							val);
 
 	chwidth_320 = dot11f_eht_cap.support_320mhz_6ghz;
 	EHTCAP_PHY_320MHZIN6GHZ_SET_TO_IE(ehtcap->eht_phy_cap.phy_cap_bytes,
@@ -8915,6 +8992,18 @@ void lim_ieee80211_pack_ehtcap(uint8_t *ie, tDot11fIEeht_cap dot11f_eht_cap,
 	EHTCAP_PHY_RX_4K_QAM_IN_WIDER_BW_DL_OFDMA_SET_TO_IE(
 				     ehtcap->eht_phy_cap.phy_cap_bytes, val);
 
+	val = dot11f_eht_cap.limited_cap_support_20mhz;
+	EHTCAP_PHY_20MHZ_ONLY_CAPS_SET_TO_IE(
+				     ehtcap->eht_phy_cap.phy_cap_bytes, val);
+
+	val = dot11f_eht_cap.triggered_mu_bf_full_bw_fb_and_dl_mumimo;
+	EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FULL_BW_FB_AND_DLMUMIMO_SET_TO_IE(
+				     ehtcap->eht_phy_cap.phy_cap_bytes, val);
+
+	val = dot11f_eht_cap.mru_support_20mhz;
+	EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_SET_TO_IE(
+				     ehtcap->eht_phy_cap.phy_cap_bytes, val);
+
 	/* Fill EHT MCS and NSS set field */
 	if ((is_band_2g && !dot11f_he_cap.chan_width_0) ||
 	    (!is_band_2g && !dot11f_he_cap.chan_width_1 &&
@@ -9471,6 +9560,7 @@ QDF_STATUS populate_dot11f_assoc_rsp_mlo_ie(struct mac_context *mac_ctx,
 
 	mlo_ie->mld_capab_and_op_present = 0;
 	mlo_ie->mld_id_present = 0;
+	mlo_ie->ext_mld_capab_and_op_present = 0;
 
 	mlo_ie->common_info_length = common_info_len;
 
@@ -10091,6 +10181,7 @@ QDF_STATUS populate_dot11f_bcn_mlo_ie(struct mac_context *mac_ctx,
 	common_info_length += WLAN_ML_BSSPARAMCHNGCNT_SIZE;
 	mlo_ie->mld_capab_and_op_present = 0;
 	mlo_ie->mld_id_present = 0;
+	mlo_ie->ext_mld_capab_and_op_present = 0;
 	sch_info->num_links = 0;
 
 	lim_get_mlo_vdev_list(session, &vdev_count, wlan_vdev_list);
@@ -10411,6 +10502,7 @@ populate_dot11f_mlo_caps(struct mac_context *mac_ctx,
 	}
 
 	common_info_len += WLAN_ML_BV_CINFO_MLDCAPANDOP_SIZE;
+	mlo_ie->ext_mld_capab_and_op_present = 0;
 	mlo_ie->mld_id_present = 0;
 	mlo_ie->mld_capab_and_op_present = 1;
 	mlo_ie->mld_capab_and_op_info.tid_link_map_supported =
@@ -11390,6 +11482,7 @@ QDF_STATUS populate_dot11f_auth_mlo_ie(struct mac_context *mac_ctx,
 	mlo_ie->eml_capab_present = 0;
 	mlo_ie->mld_capab_and_op_present = 0;
 	mlo_ie->mld_id_present = 0;
+	mlo_ie->ext_mld_capab_and_op_present = 0;
 
 	p_ml_ie = mlo_ie->data;
 	len_remaining = sizeof(mlo_ie->data);
@@ -11490,6 +11583,7 @@ QDF_STATUS populate_dot11f_assoc_req_mlo_ie(struct mac_context *mac_ctx,
 	mlo_ie->eml_capab_present = 0;
 	mlo_ie->mld_capab_and_op_present = 1;
 	mlo_ie->mld_id_present = 0;
+	mlo_ie->ext_mld_capab_and_op_present = 0;
 
 	if (!pe_session->lim_join_req)
 		return QDF_STATUS_E_FAILURE;
@@ -11993,6 +12087,7 @@ QDF_STATUS populate_dot11f_mlo_ie(struct mac_context *mac_ctx,
 	mlo_ie->eml_capab_present = 0;
 	mlo_ie->mld_capab_and_op_present = 1;
 	mlo_ie->mld_id_present = 0;
+	mlo_ie->ext_mld_capab_and_op_present = 0;
 
 	if (mlo_ie->mld_capab_and_op_present) {
 		presence_bitmap |= WLAN_ML_BV_CTRL_PBM_MLDCAPANDOP_P;

core/wma/src/wma_eht.c

@@ -211,6 +211,10 @@ static void wma_convert_eht_cap(tDot11fIEeht_cap *eht_cap, uint32_t *mac_cap,
 			WMI_EHTCAP_MAC_TRS_SUPPORT_GET(mac_cap);
 	eht_cap->txop_return_support_txop_share_m2 =
 			WMI_EHTCAP_MAC_TXOP_RETURN_SUPP_IN_SHARINGMODE2_GET(mac_cap);
+	eht_cap->two_bqrs_support =
+			WMI_EHTCAP_MAC_TWO_BQRS_SUPP_GET(mac_cap);
+	eht_cap->eht_link_adaptation_support =
+			WMI_EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_GET(mac_cap);
 
 	/* EHT PHY capabilities */
 	eht_cap->support_320mhz_6ghz = WMI_EHTCAP_PHY_320MHZIN6GHZ_GET(phy_cap);
@@ -278,6 +282,12 @@ static void wma_convert_eht_cap(tDot11fIEeht_cap *eht_cap, uint32_t *mac_cap,
 			WMI_EHTCAP_PHY_RX1024QAMWIDERBWDLOFDMA_GET(phy_cap);
 	eht_cap->rx_4k_qam_in_wider_bw_dl_ofdma =
 			WMI_EHTCAP_PHY_RX4096QAMWIDERBWDLOFDMA_GET(phy_cap);
+	eht_cap->limited_cap_support_20mhz =
+			WMI_EHTCAP_PHY_20MHZ_ONLY_CAPS_GET(phy_cap);
+	eht_cap->triggered_mu_bf_full_bw_fb_and_dl_mumimo =
+			WMI_EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FULL_BW_FB_AND_DLMUMIMO_GET(phy_cap);
+	eht_cap->mru_support_20mhz =
+			WMI_EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_GET(phy_cap);
 
 	/* TODO: MCS map and PPET */
 }
@@ -505,6 +515,10 @@ void wma_print_eht_cap(tDot11fIEeht_cap *eht_cap)
 		       eht_cap->eht_trs_support);
 	wma_nofl_debug("\tTXOP Return Support in TXOP Sharing Mode 2: 0x%01x",
 		       eht_cap->txop_return_support_txop_share_m2);
+	wma_nofl_debug("\tTwo BQRs Support: 0x%01x",
+		       eht_cap->two_bqrs_support);
+	wma_nofl_debug("\tEHT Link Adaptation Support: 0x%01x",
+		       eht_cap->eht_link_adaptation_support);
 
 	/* EHT PHY Capabilities */
 	wma_nofl_debug("\t320 MHz In 6 GHz: 0x%01x",
@@ -586,6 +600,13 @@ void wma_print_eht_cap(tDot11fIEeht_cap *eht_cap)
 		       eht_cap->rx_1k_qam_in_wider_bw_dl_ofdma);
 	wma_nofl_debug("\tRx 4096-QAM in wider bandwidth DL OFDMA support: 0x%01x",
 		       eht_cap->rx_4k_qam_in_wider_bw_dl_ofdma);
+	wma_nofl_debug("\t20 MHz-Only Limited Capabilities Support: 0x%01x",
+		       eht_cap->limited_cap_support_20mhz);
+	wma_nofl_debug("\t20 MHz-Only Triggered MU Beamforming Full BW Feedback And DL MU-MIMO: 0x%01x",
+		       eht_cap->triggered_mu_bf_full_bw_fb_and_dl_mumimo);
+	wma_nofl_debug("\t20 MHz-Only M-RU Support: 0x%01x",
+		       eht_cap->mru_support_20mhz);
+
 	wma_nofl_debug("\t EHT MCS 20 rx 0-7 0x%x",
 		       eht_cap->bw_20_rx_max_nss_for_mcs_0_to_7);
 	wma_nofl_debug("\t EHT MCS 20 tx 0-7 0x%x",
@@ -727,6 +748,12 @@ void wma_print_eht_phy_cap(uint32_t *phy_cap)
 		       WMI_EHTCAP_PHY_RX1024QAMWIDERBWDLOFDMA_GET(phy_cap));
 	wma_nofl_debug("\tRx 4096-QAM in wider bandwidth DL OFDMA support: 0x%01x",
 		       WMI_EHTCAP_PHY_RX4096QAMWIDERBWDLOFDMA_GET(phy_cap));
+	wma_nofl_debug("\t20 MHz-Only Limited Capabilities Support: 0x%01x",
+		       WMI_EHTCAP_PHY_20MHZ_ONLY_CAPS_GET(phy_cap));
+	wma_nofl_debug("\t20 MHz-Only Triggered MU Beamforming Full BW Feedback And DL MU-MIMO: 0x%01x",
+		       WMI_EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FULL_BW_FB_AND_DLMUMIMO_GET(phy_cap));
+	wma_nofl_debug("\t20 MHz-Only M-RU Support: 0x%01x",
+		       WMI_EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_GET(phy_cap));
 }
 
 void wma_print_eht_mac_cap(uint32_t *mac_cap)
@@ -747,6 +774,16 @@ void wma_print_eht_mac_cap(uint32_t *mac_cap)
 		       WMI_EHTCAP_MAC_SCSTRAFFICDESC_GET(mac_cap));
 	wma_nofl_debug("\tMaximum MPDU Length: 0x%01x",
 		       WMI_EHTCAP_MAC_MAXMPDULEN_GET(mac_cap));
+	wma_nofl_debug("\tMaximum A-MPDU Length Exponent Extension: 0x%01x",
+		       WMI_EHTCAP_MAC_MAXAMPDULEN_EXP_GET(mac_cap));
+	wma_nofl_debug("\tEHT TRS Support: 0x%01x",
+		       WMI_EHTCAP_MAC_TRS_SUPPORT_GET(mac_cap));
+	wma_nofl_debug("\tOP Return Support In TXOP Sharing Mode 2: 0x%01x",
+		       WMI_EHTCAP_MAC_TXOP_RETURN_SUPP_IN_SHARINGMODE2_GET(mac_cap));
+	wma_nofl_debug("\tTwo BQRs Support: 0x%01x",
+		       WMI_EHTCAP_MAC_TWO_BQRS_SUPP_GET(mac_cap));
+	wma_nofl_debug("\tEHT Link Adaptation Support: 0x%01x",
+		       WMI_EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_GET(mac_cap));
 }
 
 void wma_print_eht_op(tDot11fIEeht_op *eht_ops)
@@ -786,6 +823,10 @@ void wma_populate_peer_eht_cap(struct peer_assoc_params *peer,
 				       eht_cap->eht_trs_support);
 	WMI_EHTCAP_MAC_TXOP_RETURN_SUPP_IN_SHARINGMODE2_SET(mac_cap,
 				eht_cap->txop_return_support_txop_share_m2);
+	WMI_EHTCAP_MAC_TWO_BQRS_SUPP_SET(mac_cap,
+				eht_cap->two_bqrs_support);
+	WMI_EHTCAP_MAC_EHT_LINK_ADAPTATION_SUPP_SET(mac_cap,
+				eht_cap->eht_link_adaptation_support);
 
 	/* EHT PHY Capabilities */
 	WMI_EHTCAP_PHY_320MHZIN6GHZ_SET(phy_cap, eht_cap->support_320mhz_6ghz);
@@ -850,6 +891,12 @@ void wma_populate_peer_eht_cap(struct peer_assoc_params *peer,
 				eht_cap->rx_1k_qam_in_wider_bw_dl_ofdma);
 	WMI_EHTCAP_PHY_RX4096QAMWIDERBWDLOFDMA_SET(phy_cap,
 				eht_cap->rx_4k_qam_in_wider_bw_dl_ofdma);
+	WMI_EHTCAP_PHY_20MHZ_ONLY_CAPS_SET(phy_cap,
+			eht_cap->limited_cap_support_20mhz);
+	WMI_EHTCAP_PHY_20MHZ_ONLY_TRIGGER_MUBF_FULL_BW_FB_AND_DLMUMIMO_SET(phy_cap,
+			eht_cap->triggered_mu_bf_full_bw_fb_and_dl_mumimo);
+	WMI_EHTCAP_PHY_20MHZ_ONLY_MRU_SUPP_SET(phy_cap,
+			eht_cap->mru_support_20mhz);
 
 	peer->peer_eht_mcs_count = 0;
 	rates = &params->supportedRates;