qcacld-3.0: Update 11AX - Draft 2 support - 1/2

Update HE capability IE in frame parser as per Draft 2.

Change-Id: Iea32b9ff772f73d5f2ecbf638a0dda96cf17ce46
CRs-Fixed: 2130375
This commit is contained in:
Naveen Rawat
2017-10-20 16:58:56 -07:00
committed by snandini
parent c313dd308a
commit 40fb480580
3 changed files with 38 additions and 14 deletions

View File

@@ -2838,7 +2838,8 @@ IE he_cap (EID_EXTN_ID_ELEMENT) OUI (0x23)
sr_responder:1; sr_responder:1;
ndp_feedback_supp:1; ndp_feedback_supp:1;
ops_supp:1; ops_supp:1;
reserved1:2; amsdu_in_ampdu:1;
reserved1:1;
} }
{ {
dual_band:1; dual_band:1;
@@ -2853,7 +2854,7 @@ IE he_cap (EID_EXTN_ID_ELEMENT) OUI (0x23)
device_class:1; device_class:1;
ldpc_coding:1; ldpc_coding:1;
he_1x_ltf_800_gi_ppdu:1; he_1x_ltf_800_gi_ppdu:1;
reserved:2; midamble_rx_max_nsts:2;
he_4x_ltf_3200_gi_ndp:1; he_4x_ltf_3200_gi_ndp:1;
stbc_lt_80mhz:2; stbc_lt_80mhz:2;
doppler:2; doppler:2;
@@ -2886,7 +2887,12 @@ IE he_cap (EID_EXTN_ID_ELEMENT) OUI (0x23)
} }
{ {
er_he_ltf_800_gi_4x:1; er_he_ltf_800_gi_4x:1;
reserved2:7; he_ppdu_20_in_40Mhz_2G:1;
he_ppdu_20_in_160_80p80Mhz:1;
he_ppdu_80_in_160_80p80Mhz:1;
er_1x_he_ltf_gi:1;
midamble_rx_1x_he_ltf:1;
reserved2:2;
} }
rx_he_mcs_map_lt_80, 2; rx_he_mcs_map_lt_80, 2;
tx_he_mcs_map_lt_80, 2; tx_he_mcs_map_lt_80, 2;

View File

@@ -35,7 +35,7 @@
* *
* *
* This file was automatically generated by 'framesc' * This file was automatically generated by 'framesc'
* Mon Oct 23 14:35:45 2017 from the following file(s): * Mon Oct 23 14:40:30 2017 from the following file(s):
* *
* dot11f.frms * dot11f.frms
* *
@@ -8705,7 +8705,8 @@ typedef struct sDot11fIEhe_cap {
uint8_t sr_responder:1; uint8_t sr_responder:1;
uint8_t ndp_feedback_supp:1; uint8_t ndp_feedback_supp:1;
uint8_t ops_supp:1; uint8_t ops_supp:1;
uint8_t reserved1:2; uint8_t amsdu_in_ampdu:1;
uint8_t reserved1:1;
uint32_t dual_band:1; uint32_t dual_band:1;
uint32_t chan_width_0:1; uint32_t chan_width_0:1;
uint32_t chan_width_1:1; uint32_t chan_width_1:1;
@@ -8718,7 +8719,7 @@ typedef struct sDot11fIEhe_cap {
uint32_t device_class:1; uint32_t device_class:1;
uint32_t ldpc_coding:1; uint32_t ldpc_coding:1;
uint32_t he_1x_ltf_800_gi_ppdu:1; uint32_t he_1x_ltf_800_gi_ppdu:1;
uint32_t reserved:2; uint32_t midamble_rx_max_nsts:2;
uint32_t he_4x_ltf_3200_gi_ndp:1; uint32_t he_4x_ltf_3200_gi_ndp:1;
uint32_t stbc_lt_80mhz:2; uint32_t stbc_lt_80mhz:2;
uint32_t doppler:2; uint32_t doppler:2;
@@ -8747,7 +8748,12 @@ typedef struct sDot11fIEhe_cap {
uint32_t max_nc:3; uint32_t max_nc:3;
uint32_t stbc_gt_80mhz:2; uint32_t stbc_gt_80mhz:2;
uint8_t er_he_ltf_800_gi_4x:1; uint8_t er_he_ltf_800_gi_4x:1;
uint8_t reserved2:7; uint8_t he_ppdu_20_in_40Mhz_2G:1;
uint8_t he_ppdu_20_in_160_80p80Mhz:1;
uint8_t he_ppdu_80_in_160_80p80Mhz:1;
uint8_t er_1x_he_ltf_gi:1;
uint8_t midamble_rx_1x_he_ltf:1;
uint8_t reserved2:2;
uint16_t rx_he_mcs_map_lt_80; uint16_t rx_he_mcs_map_lt_80;
uint16_t tx_he_mcs_map_lt_80; uint16_t tx_he_mcs_map_lt_80;
uint8_t rx_he_mcs_map_160[1][2]; uint8_t rx_he_mcs_map_160[1][2];

View File

@@ -33,7 +33,7 @@
* *
* *
* This file was automatically generated by 'framesc' * This file was automatically generated by 'framesc'
* Mon Oct 23 14:35:45 2017 from the following file(s): * Mon Oct 23 14:40:30 2017 from the following file(s):
* *
* dot11f.frms * dot11f.frms
* *
@@ -6584,7 +6584,8 @@ uint32_t dot11f_unpack_ie_he_cap(tpAniSirGlobal pCtx,
pDst->sr_responder = tmp77__ >> 3 & 0x1; pDst->sr_responder = tmp77__ >> 3 & 0x1;
pDst->ndp_feedback_supp = tmp77__ >> 4 & 0x1; pDst->ndp_feedback_supp = tmp77__ >> 4 & 0x1;
pDst->ops_supp = tmp77__ >> 5 & 0x1; pDst->ops_supp = tmp77__ >> 5 & 0x1;
pDst->reserved1 = tmp77__ >> 6 & 0x3; pDst->amsdu_in_ampdu = tmp77__ >> 6 & 0x1;
pDst->reserved1 = tmp77__ >> 7 & 0x1;
framesntohl(pCtx, &tmp78__, pBuf, 0); framesntohl(pCtx, &tmp78__, pBuf, 0);
pBuf += 4; pBuf += 4;
ielen -= 4; ielen -= 4;
@@ -6600,7 +6601,7 @@ uint32_t dot11f_unpack_ie_he_cap(tpAniSirGlobal pCtx,
pDst->device_class = tmp78__ >> 12 & 0x1; pDst->device_class = tmp78__ >> 12 & 0x1;
pDst->ldpc_coding = tmp78__ >> 13 & 0x1; pDst->ldpc_coding = tmp78__ >> 13 & 0x1;
pDst->he_1x_ltf_800_gi_ppdu = tmp78__ >> 14 & 0x1; pDst->he_1x_ltf_800_gi_ppdu = tmp78__ >> 14 & 0x1;
pDst->reserved = tmp78__ >> 15 & 0x3; pDst->midamble_rx_max_nsts = tmp78__ >> 15 & 0x3;
pDst->he_4x_ltf_3200_gi_ndp = tmp78__ >> 17 & 0x1; pDst->he_4x_ltf_3200_gi_ndp = tmp78__ >> 17 & 0x1;
pDst->stbc_lt_80mhz = tmp78__ >> 18 & 0x3; pDst->stbc_lt_80mhz = tmp78__ >> 18 & 0x3;
pDst->doppler = tmp78__ >> 20 & 0x3; pDst->doppler = tmp78__ >> 20 & 0x3;
@@ -6635,7 +6636,12 @@ uint32_t dot11f_unpack_ie_he_cap(tpAniSirGlobal pCtx,
pBuf += 1; pBuf += 1;
ielen -= 1; ielen -= 1;
pDst->er_he_ltf_800_gi_4x = tmp80__ >> 0 & 0x1; pDst->er_he_ltf_800_gi_4x = tmp80__ >> 0 & 0x1;
pDst->reserved2 = tmp80__ >> 1 & 0x7f; pDst->he_ppdu_20_in_40Mhz_2G = tmp80__ >> 1 & 0x1;
pDst->he_ppdu_20_in_160_80p80Mhz = tmp80__ >> 2 & 0x1;
pDst->he_ppdu_80_in_160_80p80Mhz = tmp80__ >> 3 & 0x1;
pDst->er_1x_he_ltf_gi = tmp80__ >> 4 & 0x1;
pDst->midamble_rx_1x_he_ltf = tmp80__ >> 5 & 0x1;
pDst->reserved2 = tmp80__ >> 6 & 0x3;
framesntohs(pCtx, &pDst->rx_he_mcs_map_lt_80, pBuf, 0); framesntohs(pCtx, &pDst->rx_he_mcs_map_lt_80, pBuf, 0);
pBuf += 2; pBuf += 2;
ielen -= (uint8_t)2; ielen -= (uint8_t)2;
@@ -23362,7 +23368,8 @@ uint32_t dot11f_pack_ie_he_cap(tpAniSirGlobal pCtx,
tmp169__ |= (pSrc->sr_responder << 3); tmp169__ |= (pSrc->sr_responder << 3);
tmp169__ |= (pSrc->ndp_feedback_supp << 4); tmp169__ |= (pSrc->ndp_feedback_supp << 4);
tmp169__ |= (pSrc->ops_supp << 5); tmp169__ |= (pSrc->ops_supp << 5);
tmp169__ |= (pSrc->reserved1 << 6); tmp169__ |= (pSrc->amsdu_in_ampdu << 6);
tmp169__ |= (pSrc->reserved1 << 7);
*pBuf = tmp169__; *pBuf = tmp169__;
*pnConsumed += 1; *pnConsumed += 1;
pBuf += 1; pBuf += 1;
@@ -23380,7 +23387,7 @@ uint32_t dot11f_pack_ie_he_cap(tpAniSirGlobal pCtx,
tmp170__ |= (pSrc->device_class << 12); tmp170__ |= (pSrc->device_class << 12);
tmp170__ |= (pSrc->ldpc_coding << 13); tmp170__ |= (pSrc->ldpc_coding << 13);
tmp170__ |= (pSrc->he_1x_ltf_800_gi_ppdu << 14); tmp170__ |= (pSrc->he_1x_ltf_800_gi_ppdu << 14);
tmp170__ |= (pSrc->reserved << 15); tmp170__ |= (pSrc->midamble_rx_max_nsts << 15);
tmp170__ |= (pSrc->he_4x_ltf_3200_gi_ndp << 17); tmp170__ |= (pSrc->he_4x_ltf_3200_gi_ndp << 17);
tmp170__ |= (pSrc->stbc_lt_80mhz << 18); tmp170__ |= (pSrc->stbc_lt_80mhz << 18);
tmp170__ |= (pSrc->doppler << 20); tmp170__ |= (pSrc->doppler << 20);
@@ -23419,7 +23426,12 @@ uint32_t dot11f_pack_ie_he_cap(tpAniSirGlobal pCtx,
nBuf -= 4 ; nBuf -= 4 ;
tmp172__ = 0U; tmp172__ = 0U;
tmp172__ |= (pSrc->er_he_ltf_800_gi_4x << 0); tmp172__ |= (pSrc->er_he_ltf_800_gi_4x << 0);
tmp172__ |= (pSrc->reserved2 << 1); tmp172__ |= (pSrc->he_ppdu_20_in_40Mhz_2G << 1);
tmp172__ |= (pSrc->he_ppdu_20_in_160_80p80Mhz << 2);
tmp172__ |= (pSrc->he_ppdu_80_in_160_80p80Mhz << 3);
tmp172__ |= (pSrc->er_1x_he_ltf_gi << 4);
tmp172__ |= (pSrc->midamble_rx_1x_he_ltf << 5);
tmp172__ |= (pSrc->reserved2 << 6);
*pBuf = tmp172__; *pBuf = tmp172__;
*pnConsumed += 1; *pnConsumed += 1;
pBuf += 1; pBuf += 1;