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@@ -32,6 +32,7 @@
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HAL_RX_LSB(block, field))
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#define HAL_RX_PHY_DATA_RADAR 0x01
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+#define HAL_SU_MU_CODING_LDPC 0x01
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#define HAL_RX_FCS_LEN (4)
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#define KEY_EXTIV 0x20
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@@ -74,6 +75,17 @@
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#define HAL_MAX_UL_MU_USERS 8
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+#define HAL_RX_PKT_TYPE_11A 0
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+#define HAL_RX_PKT_TYPE_11B 1
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+#define HAL_RX_PKT_TYPE_11N 2
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+#define HAL_RX_PKT_TYPE_11AC 3
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+#define HAL_RX_PKT_TYPE_11AX 4
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+
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+#define HAL_RX_RECEPTION_TYPE_SU 0
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+#define HAL_RX_RECEPTION_TYPE_MU_MIMO 1
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+#define HAL_RX_RECEPTION_TYPE_OFDMA 2
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+#define HAL_RX_RECEPTION_TYPE_MU_OFDMA 3
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+
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enum {
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HAL_HW_RX_DECAP_FORMAT_RAW = 0,
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HAL_HW_RX_DECAP_FORMAT_NWIFI,
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@@ -154,6 +166,16 @@ uint32_t HAL_RX_MON_HW_DESC_GET_PPDUID_GET(void *hw_desc_addr)
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return HAL_RX_GET(rx_attn, RX_ATTENTION_0, PHY_PPDU_ID);
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}
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+/* TODO: Move all Rx descriptor functions to hal_rx.h to avoid duplication */
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+static inline
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+uint32_t hal_rx_desc_is_first_msdu(void *hw_desc_addr)
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+{
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+ struct rx_pkt_tlvs *rx_tlvs = (struct rx_pkt_tlvs *)hw_desc_addr;
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+ struct rx_msdu_end *msdu_end = &rx_tlvs->msdu_end_tlv.rx_msdu_end;
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+
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+ return HAL_RX_GET(msdu_end, RX_MSDU_END_5, FIRST_MSDU);
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+}
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+
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#define HAL_RX_BUFFER_ADDR_31_0_GET(buff_addr_info) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \
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BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET)), \
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@@ -286,7 +308,7 @@ uint32 hal_get_rx_msdu_link_desc_size(void)
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enum {
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HAL_PKT_TYPE_OFDM = 0,
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- HAL_CDP_PKT_TYPE_CCK,
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+ HAL_PKT_TYPE_CCK,
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HAL_PKT_TYPE_HT,
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HAL_PKT_TYPE_VHT,
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HAL_PKT_TYPE_HE,
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@@ -313,73 +335,60 @@ enum {
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HAL_RX_TYPE_MU_OFDMA_MIMO,
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};
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+/**
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+ * hal_rx_mon_hw_desc_get_mpdu_status: Retrieve MPDU status
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+ *
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+ * @ hw_desc_addr: Start address of Rx HW TLVs
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+ * @ rs: Status for monitor mode
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+ *
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+ * Return: void
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+ */
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static inline
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-void HAL_RX_MON_HW_DESC_GET_PPDU_START_STATUS(void *hw_desc_addr,
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- struct cdp_mon_status *rs)
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+void hal_rx_mon_hw_desc_get_mpdu_status(void *hw_desc_addr,
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+ struct mon_rx_status *rs)
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{
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struct rx_msdu_start *rx_msdu_start;
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struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
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- uint32_t rx_pream_type;
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- uint32_t rx_sgi;
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- uint32_t rx_type;
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- uint32_t rx_bw;
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-static uint32_t pkt_type_hw_to_cdp[] = {
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- CDP_PKT_TYPE_OFDM,
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- CDP_PKT_TYPE_CCK,
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- CDP_PKT_TYPE_HT,
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- CDP_PKT_TYPE_VHT,
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- CDP_PKT_TYPE_HE,
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- };
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-
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-static uint32_t sgi_hw_to_cdp[] = {
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- CDP_SGI_0_8_US,
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- CDP_SGI_0_4_US,
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- CDP_SGI_1_6_US,
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- CDP_SGI_3_2_US,
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- };
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-
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-static uint32_t rx_type_hw_to_cdp[] = {
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- CDP_RX_TYPE_SU,
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- CDP_RX_TYPE_MU_MIMO,
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- CDP_RX_TYPE_MU_OFDMA,
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- CDP_RX_TYPE_MU_OFDMA_MIMO,
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- };
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-
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-static uint32_t rx_bw_hw_to_cdp[] = {
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- CDP_FULL_RX_BW_20,
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- CDP_FULL_RX_BW_40,
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- CDP_FULL_RX_BW_80,
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- CDP_FULL_RX_BW_160,
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- };
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-
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- rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
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+ uint32_t reg_value;
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- rs->cdp_rs_tstamp.cdp_tsf = rx_msdu_start->ppdu_start_timestamp;
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+ static uint32_t sgi_hw_to_cdp[] = {
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+ CDP_SGI_0_8_US,
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+ CDP_SGI_0_4_US,
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+ CDP_SGI_1_6_US,
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+ CDP_SGI_3_2_US,
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+ };
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- rx_pream_type = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, PKT_TYPE);
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- rs->cdp_rs_pream_type = pkt_type_hw_to_cdp[rx_pream_type];
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+ rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
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- rs->cdp_rs_user_rssi = HAL_RX_GET(rx_msdu_start,
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+ rs->ant_signal_db = HAL_RX_GET(rx_msdu_start,
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RX_MSDU_START_5, USER_RSSI);
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-
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- rs->cdp_rs_stbc = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, STBC);
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-
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- rx_sgi = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, SGI);
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- rs->cdp_rs_sgi = sgi_hw_to_cdp[rx_sgi];
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-
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- rs->cdf_rs_rate_mcs = HAL_RX_GET(rx_msdu_start,
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+ rs->mcs = HAL_RX_GET(rx_msdu_start,
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RX_MSDU_START_5, RATE_MCS);
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+ rs->is_stbc = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, STBC);
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+
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+ reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, SGI);
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+ rs->sgi = sgi_hw_to_cdp[reg_value];
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+ rs->nr_ant = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, NSS);
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+
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+ reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, PKT_TYPE);
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+ switch (reg_value) {
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+ case HAL_RX_PKT_TYPE_11AC:
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+ rs->vht_flags = 1;
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+ reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5,
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+ RECEIVE_BANDWIDTH);
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+ rs->vht_flag_values2 = 0x01 << reg_value;
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+ rs->vht_flag_values3[0] = rs->mcs << 4;
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+ break;
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+ case HAL_RX_PKT_TYPE_11AX:
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+ rs->he_flags = 1;
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+ break;
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+ default:
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+ break;
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+ }
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- rx_type = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, RECEPTION_TYPE);
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-
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- rs->cdp_rs_reception_type = rx_type_hw_to_cdp[rx_type];
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-
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- rx_bw = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, RECEIVE_BANDWIDTH);
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-
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- rs->cdp_rs_bw = rx_bw_hw_to_cdp[rx_bw];
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-
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- rs->cdp_rs_nss = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, NSS);
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-
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+ reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, RECEPTION_TYPE);
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+ rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0;
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+ /* TODO: rs->beamformed should be set for SU beamforming also */
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}
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struct hal_rx_ppdu_user_info {
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@@ -394,6 +403,7 @@ struct hal_rx_ppdu_common_info {
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struct hal_rx_ppdu_info {
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struct hal_rx_ppdu_common_info com_info;
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struct hal_rx_ppdu_user_info user_info[HAL_MAX_UL_MU_USERS];
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+ struct mon_rx_status rx_status;
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};
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static inline uint32_t
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@@ -404,9 +414,18 @@ hal_get_rx_status_buf_size(void) {
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static inline uint8_t*
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hal_rx_status_get_next_tlv(uint8_t *rx_tlv) {
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- uint32_t tlv_len;
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+ uint32_t tlv_len, tlv_tag;
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tlv_len = HAL_RX_GET_USER_TLV32_LEN(rx_tlv);
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+ tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(rx_tlv);
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+
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+ /* The actual length of PPDU_END is the combined lenght of many PHY
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+ * TLVs that follow. Skip the TLV header and
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+ * rx_rxpcu_classification_overview that follows the header to get to
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+ * next TLV.
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+ */
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+ if (tlv_tag == WIFIRX_PPDU_END_E)
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+ tlv_len = sizeof(struct rx_rxpcu_classification_overview);
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return (uint8_t *)(((unsigned long)(rx_tlv + tlv_len +
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HAL_RX_TLV32_HDR_SIZE + 3)) & (~((unsigned long)3)));
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@@ -415,7 +434,7 @@ hal_rx_status_get_next_tlv(uint8_t *rx_tlv) {
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static inline uint32_t
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hal_rx_status_get_tlv_info(void *rx_tlv, struct hal_rx_ppdu_info *ppdu_info)
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{
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- uint32_t tlv_tag, user_id, tlv_len;
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+ uint32_t tlv_tag, user_id, tlv_len, value;
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tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(rx_tlv);
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user_id = HAL_RX_GET_USER_TLV32_USERID(rx_tlv);
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@@ -432,6 +451,10 @@ hal_rx_status_get_tlv_info(void *rx_tlv, struct hal_rx_ppdu_info *ppdu_info)
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ppdu_info->com_info.ppdu_id =
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HAL_RX_GET(rx_tlv, RX_PPDU_START_0,
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PHY_PPDU_ID);
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+ /* TODO: Ensure channel number is set in PHY meta data */
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+ ppdu_info->rx_status.chan_freq =
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+ HAL_RX_GET(rx_tlv, RX_PPDU_START_1,
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+ SW_PHY_META_DATA);
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ppdu_info->com_info.ppdu_timestamp =
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HAL_RX_GET(rx_tlv, RX_PPDU_START_2,
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PPDU_START_TIMESTAMP);
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@@ -444,9 +467,16 @@ hal_rx_status_get_tlv_info(void *rx_tlv, struct hal_rx_ppdu_info *ppdu_info)
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
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"[%s][%d] ppdu_end_e len=%d\n",
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__func__, __LINE__, tlv_len);
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+ /* This is followed by sub-TLVs of PPDU_END */
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break;
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case WIFIRXPCU_PPDU_END_INFO_E:
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+ ppdu_info->rx_status.tsft =
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+ HAL_RX_GET(rx_tlv, RXPCU_PPDU_END_INFO_1,
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+ WB_TIMESTAMP_UPPER_32);
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+ ppdu_info->rx_status.tsft = (ppdu_info->rx_status.tsft << 32) |
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+ HAL_RX_GET(rx_tlv, RXPCU_PPDU_END_INFO_0,
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+ WB_TIMESTAMP_LOWER_32);
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break;
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case WIFIRX_PPDU_END_USER_STATS_E:
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@@ -459,8 +489,147 @@ hal_rx_status_get_tlv_info(void *rx_tlv, struct hal_rx_ppdu_info *ppdu_info)
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return HAL_TLV_STATUS_PPDU_DONE;
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case WIFIDUMMY_E:
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- return HAL_TLV_STATUS_DUMMY;
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+ return HAL_TLV_STATUS_PPDU_DONE;
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+ case WIFIPHYRX_HT_SIG_E:
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+ {
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+ uint8_t *ht_sig_info = (uint8_t *)rx_tlv +
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+ HAL_RX_OFFSET(PHYRX_HT_SIG_0,
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+ HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS);
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+ value = HAL_RX_GET(ht_sig_info, HT_SIG_INFO_1,
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+ FEC_CODING);
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+ ppdu_info->rx_status.ldpc = (value == HAL_SU_MU_CODING_LDPC) ?
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+ 1 : 0;
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+ break;
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+ }
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+ case WIFIPHYRX_VHT_SIG_A_E:
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+ {
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+ uint8_t *vht_sig_a_info = (uint8_t *)rx_tlv +
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+ HAL_RX_OFFSET(PHYRX_VHT_SIG_A_0,
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+ VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS);
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+ value = HAL_RX_GET(vht_sig_a_info, VHT_SIG_A_INFO_1,
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+ SU_MU_CODING);
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+ ppdu_info->rx_status.ldpc = (value == HAL_SU_MU_CODING_LDPC) ?
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+ 1 : 0;
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+ break;
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+ }
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+ case WIFIPHYRX_HE_SIG_A_SU_E:
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+ ppdu_info->rx_status.he_sig_A1 =
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+ *((uint32_t *)((uint8_t *)rx_tlv +
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+ HAL_RX_OFFSET(PHYRX_HE_SIG_A_SU_0,
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+ HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS)));
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+ ppdu_info->rx_status.he_sig_A1 |=
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+ QDF_MON_STATUS_HE_SIG_A1_HE_FORMAT_SU;
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+ /* TODO: Enabling all known bits. Check if this should be
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+ * enabled selectively
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+ */
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+ ppdu_info->rx_status.he_sig_A1_known =
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+ QDF_MON_STATUS_HE_SIG_A1_SU_KNOWN_ALL;
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+ ppdu_info->rx_status.he_sig_A2 =
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+ *((uint32_t *)((uint8_t *)rx_tlv +
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+ HAL_RX_OFFSET(PHYRX_HE_SIG_A_SU_1,
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+ HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS)));
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+ ppdu_info->rx_status.he_sig_A2_known =
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+ QDF_MON_STATUS_HE_SIG_A2_SU_KNOWN_ALL;
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+ break;
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+ case WIFIPHYRX_HE_SIG_A_MU_DL_E:
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+ ppdu_info->rx_status.he_sig_A1 =
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+ *((uint32_t *)((uint8_t *)rx_tlv +
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+ HAL_RX_OFFSET(PHYRX_HE_SIG_A_MU_DL_0,
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+ HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS)));
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+ ppdu_info->rx_status.he_sig_A1 |=
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+ QDF_MON_STATUS_HE_SIG_A1_HE_FORMAT_MU;
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+ ppdu_info->rx_status.he_sig_A1_known =
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+ QDF_MON_STATUS_HE_SIG_A1_MU_KNOWN_ALL;
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+
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+ ppdu_info->rx_status.he_sig_A2 =
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+ *((uint32_t *)((uint8_t *)rx_tlv +
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+ HAL_RX_OFFSET(PHYRX_HE_SIG_A_MU_DL_1,
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+ HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS)));
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+ ppdu_info->rx_status.he_sig_A2_known =
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+ QDF_MON_STATUS_HE_SIG_A2_MU_KNOWN_ALL;
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+ break;
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+ case WIFIPHYRX_HE_SIG_B1_MU_E:
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+ {
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+ uint8_t *he_sig_b1_mu_info = (uint8_t *)rx_tlv +
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+ *((uint32_t *)((uint8_t *)rx_tlv +
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+ HAL_RX_OFFSET(PHYRX_HE_SIG_B1_MU_0,
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+ HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS)));
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+
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+ ppdu_info->rx_status.he_sig_b_common_RU[0] =
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+ HAL_RX_GET(he_sig_b1_mu_info, HE_SIG_B1_MU_INFO_0,
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+ RU_ALLOCATION);
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+
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+ ppdu_info->rx_status.he_sig_b_common_known =
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+ QDF_MON_STATUS_HE_SIG_B_COMMON_KNOWN_RU0;
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+ /* TODO: Check on the availability of other fields in
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+ * sig_b_common
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+ */
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+ break;
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+ }
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+ case WIFIPHYRX_HE_SIG_B2_MU_E:
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+ ppdu_info->rx_status.he_sig_b_user =
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+ *((uint32_t *)((uint8_t *)rx_tlv +
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+ HAL_RX_OFFSET(PHYRX_HE_SIG_B2_MU_0,
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+ HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS)));
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+ ppdu_info->rx_status.he_sig_b_user_known =
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+ QDF_MON_STATUS_HE_SIG_B_USER_KNOWN_SIG_B_ALL;
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+ break;
|
|
|
+ case WIFIPHYRX_HE_SIG_B2_OFDMA_E:
|
|
|
+ ppdu_info->rx_status.he_sig_b_user =
|
|
|
+ *((uint32_t *)((uint8_t *)rx_tlv +
|
|
|
+ HAL_RX_OFFSET(PHYRX_HE_SIG_B2_OFDMA_0,
|
|
|
+ HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS)));
|
|
|
+ ppdu_info->rx_status.he_sig_b_user_known =
|
|
|
+ QDF_MON_STATUS_HE_SIG_B_USER_KNOWN_SIG_B_ALL;
|
|
|
+ break;
|
|
|
+ case WIFIPHYRX_RSSI_LEGACY_E:
|
|
|
+ {
|
|
|
+ uint8_t *rssi_info_tlv = (uint8_t *)rx_tlv +
|
|
|
+ HAL_RX_OFFSET(PHYRX_RSSI_LEGACY_3,
|
|
|
+ RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS);
|
|
|
+
|
|
|
+ value = HAL_RX_GET(rssi_info_tlv,
|
|
|
+ RECEIVE_RSSI_INFO_0, RSSI_PRI20_CHAIN0);
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
|
|
|
+ "RSSI_PRI20_CHAIN0: %d\n", value);
|
|
|
+
|
|
|
+ value = HAL_RX_GET(rssi_info_tlv,
|
|
|
+ RECEIVE_RSSI_INFO_0, RSSI_EXT20_CHAIN0);
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
|
|
|
+ "RSSI_EXT20_CHAIN0: %d\n", value);
|
|
|
+
|
|
|
+ value = HAL_RX_GET(rssi_info_tlv,
|
|
|
+ RECEIVE_RSSI_INFO_0, RSSI_EXT40_LOW20_CHAIN0);
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
|
|
|
+ "RSSI_EXT40_LOW20_CHAIN0: %d\n", value);
|
|
|
+
|
|
|
+ value = HAL_RX_GET(rssi_info_tlv,
|
|
|
+ RECEIVE_RSSI_INFO_0, RSSI_EXT40_HIGH20_CHAIN0);
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
|
|
|
+ "RSSI_EXT40_HIGH20_CHAIN0: %d\n", value);
|
|
|
+
|
|
|
+ value = HAL_RX_GET(rssi_info_tlv,
|
|
|
+ RECEIVE_RSSI_INFO_1, RSSI_EXT80_LOW20_CHAIN0);
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
|
|
|
+ "RSSI_EXT80_LOW20_CHAIN0: %d\n", value);
|
|
|
+
|
|
|
+ value = HAL_RX_GET(rssi_info_tlv,
|
|
|
+ RECEIVE_RSSI_INFO_1, RSSI_EXT80_LOW_HIGH20_CHAIN0);
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
|
|
|
+ "RSSI_EXT80_LOW_HIGH20_CHAIN0: %d\n", value);
|
|
|
+
|
|
|
+ value = HAL_RX_GET(rssi_info_tlv,
|
|
|
+ RECEIVE_RSSI_INFO_1, RSSI_EXT80_HIGH_LOW20_CHAIN0);
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
|
|
|
+ "RSSI_EXT80_HIGH_LOW20_CHAIN0: %d\n", value);
|
|
|
+
|
|
|
+ value = HAL_RX_GET(rssi_info_tlv,
|
|
|
+ RECEIVE_RSSI_INFO_1, RSSI_EXT80_HIGH20_CHAIN0);
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
|
|
|
+ "RSSI_EXT80_HIGH20_CHAIN0: %d\n", value);
|
|
|
+ break;
|
|
|
+ }
|
|
|
case 0:
|
|
|
return HAL_TLV_STATUS_PPDU_DONE;
|
|
|
|
|
@@ -468,6 +637,10 @@ hal_rx_status_get_tlv_info(void *rx_tlv, struct hal_rx_ppdu_info *ppdu_info)
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
+ QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
|
|
|
+ "%s TLV type: %d, TLV len:%d\n",
|
|
|
+ __func__, tlv_tag, tlv_len);
|
|
|
+
|
|
|
return HAL_TLV_STATUS_PPDU_NOT_DONE;
|
|
|
}
|
|
|
|