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qcacld-3.0: Update 11AX - HE IE's based on new draft - 3/4

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Update 11AX - HE IE's based on new draft - 4/4

Update driver changes for the frame changes made as part of
I00e568c1889b001286abcbf4c653036b3b86ef3f.

Change-Id: I4b7943f5585e47f364145ffff73cfafb19998aa1
CRs-Fixed: 2092845
This commit is contained in:
Naveen Rawat
2017-09-08 16:17:54 -07:00
committed by snandini
parent ea921ce3d3
commit 4051b0240e
9 changed files with 306 additions and 186 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
core/hdd/src/wlan_hdd_he.c
View File

@@ -100,6 +100,13 @@ void hdd_update_tgt_he_cap(struct hdd_context *hdd_ctx,
he_cap->bsrp_ampdu_aggr); he_cap->bsrp_ampdu_aggr);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_QTP, he_cap->qtp); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_QTP, he_cap->qtp);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_A_BQR, he_cap->a_bqr); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_A_BQR, he_cap->a_bqr);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_SR_RESPONDER,
he_cap->sr_responder);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NDP_FEEDBACK_SUPP,
he_cap->ndp_feedback_supp);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_OPS_SUPP,
he_cap->ops_supp);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DUAL_BAND, he_cap->dual_band); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DUAL_BAND, he_cap->dual_band);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_CHAN_WIDTH, he_cap->chan_width); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_CHAN_WIDTH, he_cap->chan_width);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_RX_PREAM_PUNC, hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_RX_PREAM_PUNC,
@@ -108,9 +115,11 @@ void hdd_update_tgt_he_cap(struct hdd_context *hdd_ctx,
he_cap->device_class); he_cap->device_class);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LDPC, he_cap->ldpc_coding); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LDPC, he_cap->ldpc_coding);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LTF_PPDU, hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LTF_PPDU,
he_cap->he_ltf_gi_ppdu); he_cap->he_1x_ltf_800_gi_ppdu);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LTF_NDP, he_cap->he_ltf_gi_ndp); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LTF_NDP,
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_STBC, he_cap->stbc); he_cap->he_4x_ltf_3200_gi_ndp);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_STBC_LT80,
he_cap->stbc_lt_80mhz);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DOPPLER, he_cap->doppler); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DOPPLER, he_cap->doppler);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_UL_MUMIMO, he_cap->ul_mu); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_UL_MUMIMO, he_cap->ul_mu);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DCM_TX, he_cap->dcm_enc_tx); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DCM_TX, he_cap->dcm_enc_tx);
@@ -124,12 +133,8 @@ void hdd_update_tgt_he_cap(struct hdd_context *hdd_ctx,
he_cap->mu_beamformer); he_cap->mu_beamformer);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BFEE_STS_LT80, hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BFEE_STS_LT80,
he_cap->bfee_sts_lt_80); he_cap->bfee_sts_lt_80);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NSTS_TOT_LT80,
he_cap->nsts_tol_lt_80);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BFEE_STS_GT80, hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BFEE_STS_GT80,
he_cap->bfee_sta_gt_80); he_cap->bfee_sts_gt_80);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NSTS_TOT_GT80,
he_cap->nsts_tot_gt_80);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NUM_SOUND_LT80, hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NUM_SOUND_LT80,
he_cap->num_sounding_lt_80); he_cap->num_sounding_lt_80);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NUM_SOUND_GT80, hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NUM_SOUND_GT80,
@@ -153,7 +158,13 @@ void hdd_update_tgt_he_cap(struct hdd_context *hdd_ctx,
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_SRP, he_cap->srp); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_SRP, he_cap->srp);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_POWER_BOOST, hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_POWER_BOOST,
he_cap->power_boost); he_cap->power_boost);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_4x_LTF_GI, he_cap->he_ltf_gi_4x); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_4x_LTF_GI,
he_cap->he_ltf_800_gi_4x);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MAX_NC, he_cap->max_nc);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_STBC_GT80,
he_cap->stbc_gt_80mhz);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_ER_4x_LTF_GI,
he_cap->er_he_ltf_800_gi_4x);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NSS, he_cap->nss_supported); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NSS, he_cap->nss_supported);
hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MCS, he_cap->mcs_supported); hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MCS, he_cap->mcs_supported);

46
core/mac/inc/sir_mac_prot_def.h
View File

@@ -2128,7 +2128,10 @@ struct he_capability_info {
uint32_t twt_request:1; uint32_t twt_request:1;
uint32_t htc_he:1; uint32_t htc_he:1;
uint8_t reserved1:5; uint8_t reserved1:2;
uint8_t ops_supp:1;
uint8_t ndp_feedback_supp:1;
uint8_t sr_responder:1;
uint8_t a_bqr:1; uint8_t a_bqr:1;
uint8_t qtp:1; uint8_t qtp:1;
uint8_t bsrp_ampdu_aggr:1; uint8_t bsrp_ampdu_aggr:1;
@@ -2139,15 +2142,19 @@ struct he_capability_info {
uint32_t dcm_enc_tx:3; uint32_t dcm_enc_tx:3;
uint32_t ul_mu:2; uint32_t ul_mu:2;
uint32_t doppler:2; uint32_t doppler:2;
uint32_t stbc:2; uint32_t stbc_lt_80mhz:2;
uint32_t he_ltf_gi_ndp:2; uint32_t he_4x_ltf_3200_gi_ndp:1;
uint32_t he_ltf_gi_ppdu:2; uint32_t reserved2:2;
uint32_t he_1x_ltf_800_gi_ppdu:1;
uint32_t ldpc_coding:1; uint32_t ldpc_coding:1;
uint32_t device_class:1; uint32_t device_class:1;
uint32_t rx_pream_puncturing:4; uint32_t rx_pream_puncturing:4;
uint32_t chan_width:7; uint32_t chan_width:7;
uint32_t dual_band:1; uint32_t dual_band:1;
uint32_t stbc_gt_80mhz:2;
uint32_t max_nc:3;
uint32_t he_ltf_800_gi_4x:1;
uint32_t power_boost:1; uint32_t power_boost:1;
uint32_t srp:1; uint32_t srp:1;
uint32_t ppet_present:1; uint32_t ppet_present:1;
@@ -2160,15 +2167,13 @@ struct he_capability_info {
uint32_t su_feedback_tone16:1; uint32_t su_feedback_tone16:1;
uint32_t num_sounding_gt_80:3; uint32_t num_sounding_gt_80:3;
uint32_t num_sounding_lt_80:3; uint32_t num_sounding_lt_80:3;
uint32_t nsts_tot_gt_80:3; uint32_t bfee_sts_gt_80:3;
uint32_t bfee_sta_gt_80:3;
uint32_t nsts_tol_lt_80:3;
uint32_t bfee_sts_lt_80:3; uint32_t bfee_sts_lt_80:3;
uint32_t mu_beamformer:1; uint32_t mu_beamformer:1;
uint32_t su_beamformee:1; uint32_t su_beamformee:1;
uint8_t reserved2:7; uint8_t reserved2:3;
uint8_t he_ltf_gi_4x:1; uint8_t er_he_ltf_800_gi_4x:1;
uint16_t rx_bw_bitmap:5; uint16_t rx_bw_bitmap:5;
uint16_t tx_bw_bitmap:5; uint16_t tx_bw_bitmap:5;
@@ -2202,16 +2207,20 @@ struct he_capability_info {
uint8_t bsrp_ampdu_aggr:1; uint8_t bsrp_ampdu_aggr:1;
uint8_t qtp:1; uint8_t qtp:1;
uint8_t a_bqr:1; uint8_t a_bqr:1;
uint8_t reserved1:5; uint8_t sr_responder:1;
uint8_t ndp_feedback_supp:1;
uint8_t ops_supp:1;
uint8_t reserved1:2;
uint32_t dual_band:1; uint32_t dual_band:1;
uint32_t chan_width:7; uint32_t chan_width:7;
uint32_t rx_pream_puncturing:4; uint32_t rx_pream_puncturing:4;
uint32_t device_class:1; uint32_t device_class:1;
uint32_t ldpc_coding:1; uint32_t ldpc_coding:1;
uint32_t he_ltf_gi_ppdu:2; uint32_t he_1x_ltf_800_gi_ppdu:1;
uint32_t he_ltf_gi_ndp:2; uint32_t reserved2:2;
uint32_t stbc:2; uint32_t he_4x_ltf_3200_gi_ndp:1;
uint32_t stbc_lt_80mhz:2;
uint32_t doppler:2; uint32_t doppler:2;
uint32_t ul_mu:2; uint32_t ul_mu:2;
uint32_t dcm_enc_tx:3; uint32_t dcm_enc_tx:3;
@@ -2222,9 +2231,7 @@ struct he_capability_info {
uint32_t su_beamformee:1; uint32_t su_beamformee:1;
uint32_t mu_beamformer:1; uint32_t mu_beamformer:1;
uint32_t bfee_sts_lt_80:3; uint32_t bfee_sts_lt_80:3;
uint32_t nsts_tol_lt_80:3; uint32_t bfee_sts_gt_80:3;
uint32_t bfee_sta_gt_80:3;
uint32_t nsts_tot_gt_80:3;
uint32_t num_sounding_lt_80:3; uint32_t num_sounding_lt_80:3;
uint32_t num_sounding_gt_80:3; uint32_t num_sounding_gt_80:3;
uint32_t su_feedback_tone16:1; uint32_t su_feedback_tone16:1;
@@ -2237,9 +2244,12 @@ struct he_capability_info {
uint32_t ppet_present:1; uint32_t ppet_present:1;
uint32_t srp:1; uint32_t srp:1;
uint32_t power_boost:1; uint32_t power_boost:1;
uint32_t he_ltf_800_gi_4x:1;
uint32_t max_nc:3;
uint32_t stbc_gt_80mhz:2;
uint8_t he_ltf_gi_4x:1; uint8_t er_he_ltf_800_gi_4x:1;
uint8_t reserved2:7; uint8_t reserved3:7;
uint16_t nss_supported:3; uint16_t nss_supported:3;
uint16_t mcs_supported:3; uint16_t mcs_supported:3;

48
core/mac/inc/wni_cfg.h
View File

@@ -278,6 +278,9 @@ enum {
WNI_CFG_HE_BSRP_AMPDU_AGGR, WNI_CFG_HE_BSRP_AMPDU_AGGR,
WNI_CFG_HE_QTP, WNI_CFG_HE_QTP,
WNI_CFG_HE_A_BQR, WNI_CFG_HE_A_BQR,
WNI_CFG_HE_SR_RESPONDER,
WNI_CFG_HE_NDP_FEEDBACK_SUPP,
WNI_CFG_HE_OPS_SUPP,
WNI_CFG_HE_DUAL_BAND, WNI_CFG_HE_DUAL_BAND,
WNI_CFG_HE_CHAN_WIDTH, WNI_CFG_HE_CHAN_WIDTH,
WNI_CFG_HE_RX_PREAM_PUNC, WNI_CFG_HE_RX_PREAM_PUNC,
@@ -285,7 +288,7 @@ enum {
WNI_CFG_HE_LDPC, WNI_CFG_HE_LDPC,
WNI_CFG_HE_LTF_PPDU, WNI_CFG_HE_LTF_PPDU,
WNI_CFG_HE_LTF_NDP, WNI_CFG_HE_LTF_NDP,
WNI_CFG_HE_STBC, WNI_CFG_HE_STBC_LT80,
WNI_CFG_HE_DOPPLER, WNI_CFG_HE_DOPPLER,
WNI_CFG_HE_UL_MUMIMO, WNI_CFG_HE_UL_MUMIMO,
WNI_CFG_HE_DCM_TX, WNI_CFG_HE_DCM_TX,
@@ -295,9 +298,7 @@ enum {
WNI_CFG_HE_SU_BEAMFORMEE, WNI_CFG_HE_SU_BEAMFORMEE,
WNI_CFG_HE_MU_BEAMFORMER, WNI_CFG_HE_MU_BEAMFORMER,
WNI_CFG_HE_BFEE_STS_LT80, WNI_CFG_HE_BFEE_STS_LT80,
WNI_CFG_HE_NSTS_TOT_LT80,
WNI_CFG_HE_BFEE_STS_GT80, WNI_CFG_HE_BFEE_STS_GT80,
WNI_CFG_HE_NSTS_TOT_GT80,
WNI_CFG_HE_NUM_SOUND_LT80, WNI_CFG_HE_NUM_SOUND_LT80,
WNI_CFG_HE_NUM_SOUND_GT80, WNI_CFG_HE_NUM_SOUND_GT80,
WNI_CFG_HE_SU_FEED_TONE16, WNI_CFG_HE_SU_FEED_TONE16,
@@ -311,6 +312,9 @@ enum {
WNI_CFG_HE_SRP, WNI_CFG_HE_SRP,
WNI_CFG_HE_POWER_BOOST, WNI_CFG_HE_POWER_BOOST,
WNI_CFG_HE_4x_LTF_GI, WNI_CFG_HE_4x_LTF_GI,
WNI_CFG_HE_MAX_NC,
WNI_CFG_HE_STBC_GT80,
WNI_CFG_HE_ER_4x_LTF_GI,
WNI_CFG_HE_NSS, WNI_CFG_HE_NSS,
WNI_CFG_HE_MCS, WNI_CFG_HE_MCS,
WNI_CFG_HE_PPET, WNI_CFG_HE_PPET,
@@ -1465,6 +1469,18 @@ enum {
#define WNI_CFG_HE_A_BQR_STAMAX 1 #define WNI_CFG_HE_A_BQR_STAMAX 1
#define WNI_CFG_HE_A_BQR_STADEF 0 #define WNI_CFG_HE_A_BQR_STADEF 0
#define WNI_CFG_HE_SR_RESPONDER_STAMIN 0
#define WNI_CFG_HE_SR_RESPONDER_STAMAX 1
#define WNI_CFG_HE_SR_RESPONDER_STADEF 0
#define WNI_CFG_HE_NDP_FEEDBACK_SUPP_STAMIN 0
#define WNI_CFG_HE_NDP_FEEDBACK_SUPP_STAMAX 1
#define WNI_CFG_HE_NDP_FEEDBACK_SUPP_STADEF 0
#define WNI_CFG_HE_OPS_SUPP_STAMIN 0
#define WNI_CFG_HE_OPS_SUPP_STAMAX 1
#define WNI_CFG_HE_OPS_SUPP_STADEF 0
#define WNI_CFG_HE_DUAL_BAND_STAMIN 0 #define WNI_CFG_HE_DUAL_BAND_STAMIN 0
#define WNI_CFG_HE_DUAL_BAND_STAMAX 1 #define WNI_CFG_HE_DUAL_BAND_STAMAX 1
#define WNI_CFG_HE_DUAL_BAND_STADEF 0 #define WNI_CFG_HE_DUAL_BAND_STADEF 0
@@ -1493,9 +1509,9 @@ enum {
#define WNI_CFG_HE_LTF_NDP_STAMAX 0x3 #define WNI_CFG_HE_LTF_NDP_STAMAX 0x3
#define WNI_CFG_HE_LTF_NDP_STADEF 0 #define WNI_CFG_HE_LTF_NDP_STADEF 0
#define WNI_CFG_HE_STBC_STAMIN 0 #define WNI_CFG_HE_STBC_LT80_STAMIN 0
#define WNI_CFG_HE_STBC_STAMAX 0x3 #define WNI_CFG_HE_STBC_LT80_STAMAX 0x3
#define WNI_CFG_HE_STBC_STADEF 0 #define WNI_CFG_HE_STBC_LT80_STADEF 0
#define WNI_CFG_HE_DOPPLER_STAMIN 0 #define WNI_CFG_HE_DOPPLER_STAMIN 0
#define WNI_CFG_HE_DOPPLER_STAMAX 0x3 #define WNI_CFG_HE_DOPPLER_STAMAX 0x3
@@ -1533,18 +1549,10 @@ enum {
#define WNI_CFG_HE_BFEE_STS_LT80_STAMAX 0x7 #define WNI_CFG_HE_BFEE_STS_LT80_STAMAX 0x7
#define WNI_CFG_HE_BFEE_STS_LT80_STADEF 0 #define WNI_CFG_HE_BFEE_STS_LT80_STADEF 0
#define WNI_CFG_HE_NSTS_TOT_LT80_STAMIN 0x3
#define WNI_CFG_HE_NSTS_TOT_LT80_STAMAX 0x7
#define WNI_CFG_HE_NSTS_TOT_LT80_STADEF 0
#define WNI_CFG_HE_BFEE_STS_GT80_STAMIN 0x3 #define WNI_CFG_HE_BFEE_STS_GT80_STAMIN 0x3
#define WNI_CFG_HE_BFEE_STS_GT80_STAMAX 0x7 #define WNI_CFG_HE_BFEE_STS_GT80_STAMAX 0x7
#define WNI_CFG_HE_BFEE_STS_GT80_STADEF 0 #define WNI_CFG_HE_BFEE_STS_GT80_STADEF 0
#define WNI_CFG_HE_NSTS_TOT_GT80_STAMIN 0x3
#define WNI_CFG_HE_NSTS_TOT_GT80_STAMAX 0x7
#define WNI_CFG_HE_NSTS_TOT_GT80_STADEF 0
#define WNI_CFG_HE_NUM_SOUND_LT80_STAMIN 0 #define WNI_CFG_HE_NUM_SOUND_LT80_STAMIN 0
#define WNI_CFG_HE_NUM_SOUND_LT80_STAMAX 0x7 #define WNI_CFG_HE_NUM_SOUND_LT80_STAMAX 0x7
#define WNI_CFG_HE_NUM_SOUND_LT80_STADEF 0 #define WNI_CFG_HE_NUM_SOUND_LT80_STADEF 0
@@ -1597,6 +1605,18 @@ enum {
#define WNI_CFG_HE_4x_LTF_GI_STAMAX 1 #define WNI_CFG_HE_4x_LTF_GI_STAMAX 1
#define WNI_CFG_HE_4x_LTF_GI_STADEF 0 #define WNI_CFG_HE_4x_LTF_GI_STADEF 0
#define WNI_CFG_HE_MAX_NC_STAMIN 0
#define WNI_CFG_HE_MAX_NC_STAMAX 0x7
#define WNI_CFG_HE_MAX_NC_STADEF 0
#define WNI_CFG_HE_STBC_GT80_STAMIN 0
#define WNI_CFG_HE_STBC_GT80_STAMAX 0x3
#define WNI_CFG_HE_STBC_GT80_STADEF 0
#define WNI_CFG_HE_ER_4x_LTF_GI_STAMIN 0
#define WNI_CFG_HE_ER_4x_LTF_GI_STAMAX 1
#define WNI_CFG_HE_ER_4x_LTF_GI_STADEF 0
#define WNI_CFG_HE_NSS_STAMIN 0 #define WNI_CFG_HE_NSS_STAMIN 0
#define WNI_CFG_HE_NSS_STAMAX 0x7 #define WNI_CFG_HE_NSS_STAMAX 0x7
#define WNI_CFG_HE_NSS_STADEF 0 #define WNI_CFG_HE_NSS_STADEF 0

10
core/mac/src/cfg/cfg_param_name.c
View File

@@ -287,6 +287,9 @@ const char *cfg_get_string(uint16_t cfg_id)
CASE_RETURN_STRING(WNI_CFG_HE_BSRP_AMPDU_AGGR); CASE_RETURN_STRING(WNI_CFG_HE_BSRP_AMPDU_AGGR);
CASE_RETURN_STRING(WNI_CFG_HE_QTP); CASE_RETURN_STRING(WNI_CFG_HE_QTP);
CASE_RETURN_STRING(WNI_CFG_HE_A_BQR); CASE_RETURN_STRING(WNI_CFG_HE_A_BQR);
CASE_RETURN_STRING(WNI_CFG_HE_SR_RESPONDER);
CASE_RETURN_STRING(WNI_CFG_HE_NDP_FEEDBACK_SUPP);
CASE_RETURN_STRING(WNI_CFG_HE_OPS_SUPP);
CASE_RETURN_STRING(WNI_CFG_HE_DUAL_BAND); CASE_RETURN_STRING(WNI_CFG_HE_DUAL_BAND);
CASE_RETURN_STRING(WNI_CFG_HE_CHAN_WIDTH); CASE_RETURN_STRING(WNI_CFG_HE_CHAN_WIDTH);
CASE_RETURN_STRING(WNI_CFG_HE_RX_PREAM_PUNC); CASE_RETURN_STRING(WNI_CFG_HE_RX_PREAM_PUNC);
@@ -294,7 +297,7 @@ const char *cfg_get_string(uint16_t cfg_id)
CASE_RETURN_STRING(WNI_CFG_HE_LDPC); CASE_RETURN_STRING(WNI_CFG_HE_LDPC);
CASE_RETURN_STRING(WNI_CFG_HE_LTF_PPDU); CASE_RETURN_STRING(WNI_CFG_HE_LTF_PPDU);
CASE_RETURN_STRING(WNI_CFG_HE_LTF_NDP); CASE_RETURN_STRING(WNI_CFG_HE_LTF_NDP);
CASE_RETURN_STRING(WNI_CFG_HE_STBC); CASE_RETURN_STRING(WNI_CFG_HE_STBC_LT80);
CASE_RETURN_STRING(WNI_CFG_HE_DOPPLER); CASE_RETURN_STRING(WNI_CFG_HE_DOPPLER);
CASE_RETURN_STRING(WNI_CFG_HE_UL_MUMIMO); CASE_RETURN_STRING(WNI_CFG_HE_UL_MUMIMO);
CASE_RETURN_STRING(WNI_CFG_HE_DCM_TX); CASE_RETURN_STRING(WNI_CFG_HE_DCM_TX);
@@ -304,9 +307,7 @@ const char *cfg_get_string(uint16_t cfg_id)
CASE_RETURN_STRING(WNI_CFG_HE_SU_BEAMFORMEE); CASE_RETURN_STRING(WNI_CFG_HE_SU_BEAMFORMEE);
CASE_RETURN_STRING(WNI_CFG_HE_MU_BEAMFORMER); CASE_RETURN_STRING(WNI_CFG_HE_MU_BEAMFORMER);
CASE_RETURN_STRING(WNI_CFG_HE_BFEE_STS_LT80); CASE_RETURN_STRING(WNI_CFG_HE_BFEE_STS_LT80);
CASE_RETURN_STRING(WNI_CFG_HE_NSTS_TOT_LT80);
CASE_RETURN_STRING(WNI_CFG_HE_BFEE_STS_GT80); CASE_RETURN_STRING(WNI_CFG_HE_BFEE_STS_GT80);
CASE_RETURN_STRING(WNI_CFG_HE_NSTS_TOT_GT80);
CASE_RETURN_STRING(WNI_CFG_HE_NUM_SOUND_LT80); CASE_RETURN_STRING(WNI_CFG_HE_NUM_SOUND_LT80);
CASE_RETURN_STRING(WNI_CFG_HE_NUM_SOUND_GT80); CASE_RETURN_STRING(WNI_CFG_HE_NUM_SOUND_GT80);
CASE_RETURN_STRING(WNI_CFG_HE_SU_FEED_TONE16); CASE_RETURN_STRING(WNI_CFG_HE_SU_FEED_TONE16);
@@ -320,6 +321,9 @@ const char *cfg_get_string(uint16_t cfg_id)
CASE_RETURN_STRING(WNI_CFG_HE_SRP); CASE_RETURN_STRING(WNI_CFG_HE_SRP);
CASE_RETURN_STRING(WNI_CFG_HE_POWER_BOOST); CASE_RETURN_STRING(WNI_CFG_HE_POWER_BOOST);
CASE_RETURN_STRING(WNI_CFG_HE_4x_LTF_GI); CASE_RETURN_STRING(WNI_CFG_HE_4x_LTF_GI);
CASE_RETURN_STRING(WNI_CFG_HE_MAX_NC);
CASE_RETURN_STRING(WNI_CFG_HE_STBC_GT80);
CASE_RETURN_STRING(WNI_CFG_HE_ER_4x_LTF_GI);
CASE_RETURN_STRING(WNI_CFG_HE_NSS); CASE_RETURN_STRING(WNI_CFG_HE_NSS);
CASE_RETURN_STRING(WNI_CFG_HE_MCS); CASE_RETURN_STRING(WNI_CFG_HE_MCS);
CASE_RETURN_STRING(WNI_CFG_HE_PPET); CASE_RETURN_STRING(WNI_CFG_HE_PPET);

39
core/mac/src/cfg/cfg_proc_msg.c
View File

@@ -1259,6 +1259,19 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_A_BQR_STAMIN, WNI_CFG_HE_A_BQR_STAMAX, WNI_CFG_HE_A_BQR_STAMIN, WNI_CFG_HE_A_BQR_STAMAX,
WNI_CFG_HE_A_BQR_STADEF}, WNI_CFG_HE_A_BQR_STADEF},
{WNI_CFG_HE_SR_RESPONDER,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_SR_RESPONDER_STAMIN, WNI_CFG_HE_SR_RESPONDER_STAMAX,
WNI_CFG_HE_SR_RESPONDER_STADEF},
{WNI_CFG_HE_NDP_FEEDBACK_SUPP,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_NDP_FEEDBACK_SUPP_STAMIN,
WNI_CFG_HE_NDP_FEEDBACK_SUPP_STAMAX,
WNI_CFG_HE_NDP_FEEDBACK_SUPP_STADEF},
{WNI_CFG_HE_A_BQR,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_A_BQR_STAMIN, WNI_CFG_HE_A_BQR_STAMAX,
WNI_CFG_HE_A_BQR_STADEF},
{WNI_CFG_HE_DUAL_BAND, {WNI_CFG_HE_DUAL_BAND,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_DUAL_BAND_STAMIN, WNI_CFG_HE_DUAL_BAND_STAMAX, WNI_CFG_HE_DUAL_BAND_STAMIN, WNI_CFG_HE_DUAL_BAND_STAMAX,
@@ -1287,10 +1300,10 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_LTF_NDP_STAMIN, WNI_CFG_HE_LTF_NDP_STAMAX, WNI_CFG_HE_LTF_NDP_STAMIN, WNI_CFG_HE_LTF_NDP_STAMAX,
WNI_CFG_HE_LTF_NDP_STADEF}, WNI_CFG_HE_LTF_NDP_STADEF},
{WNI_CFG_HE_STBC, {WNI_CFG_HE_STBC_LT80,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_STBC_STAMIN, WNI_CFG_HE_STBC_STAMAX, WNI_CFG_HE_STBC_LT80_STAMIN, WNI_CFG_HE_STBC_LT80_STAMAX,
WNI_CFG_HE_STBC_STADEF}, WNI_CFG_HE_STBC_LT80_STADEF},
{WNI_CFG_HE_DOPPLER, {WNI_CFG_HE_DOPPLER,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_DOPPLER_STAMIN, WNI_CFG_HE_DOPPLER_STAMAX, WNI_CFG_HE_DOPPLER_STAMIN, WNI_CFG_HE_DOPPLER_STAMAX,
@@ -1328,18 +1341,10 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_BFEE_STS_LT80_STAMIN, WNI_CFG_HE_BFEE_STS_LT80_STAMAX, WNI_CFG_HE_BFEE_STS_LT80_STAMIN, WNI_CFG_HE_BFEE_STS_LT80_STAMAX,
WNI_CFG_HE_BFEE_STS_LT80_STADEF}, WNI_CFG_HE_BFEE_STS_LT80_STADEF},
{WNI_CFG_HE_NSTS_TOT_LT80,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_NSTS_TOT_LT80_STAMIN, WNI_CFG_HE_NSTS_TOT_LT80_STAMAX,
WNI_CFG_HE_NSTS_TOT_LT80_STADEF},
{WNI_CFG_HE_BFEE_STS_GT80, {WNI_CFG_HE_BFEE_STS_GT80,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_BFEE_STS_GT80_STAMIN, WNI_CFG_HE_BFEE_STS_GT80_STAMAX, WNI_CFG_HE_BFEE_STS_GT80_STAMIN, WNI_CFG_HE_BFEE_STS_GT80_STAMAX,
WNI_CFG_HE_BFEE_STS_GT80_STADEF}, WNI_CFG_HE_BFEE_STS_GT80_STADEF},
{WNI_CFG_HE_NSTS_TOT_GT80,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_NSTS_TOT_GT80_STAMIN, WNI_CFG_HE_NSTS_TOT_GT80_STAMAX,
WNI_CFG_HE_NSTS_TOT_GT80_STADEF},
{WNI_CFG_HE_NUM_SOUND_LT80, {WNI_CFG_HE_NUM_SOUND_LT80,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_NUM_SOUND_LT80_STAMIN, WNI_CFG_HE_NUM_SOUND_LT80_STAMAX, WNI_CFG_HE_NUM_SOUND_LT80_STAMIN, WNI_CFG_HE_NUM_SOUND_LT80_STAMAX,
@@ -1392,6 +1397,18 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_4x_LTF_GI_STAMIN, WNI_CFG_HE_4x_LTF_GI_STAMAX, WNI_CFG_HE_4x_LTF_GI_STAMIN, WNI_CFG_HE_4x_LTF_GI_STAMAX,
WNI_CFG_HE_4x_LTF_GI_STADEF}, WNI_CFG_HE_4x_LTF_GI_STADEF},
{WNI_CFG_HE_MAX_NC,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_MAX_NC_STAMIN, WNI_CFG_HE_MAX_NC_STAMAX,
WNI_CFG_HE_MAX_NC_STADEF},
{WNI_CFG_HE_STBC_GT80,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_STBC_GT80_STAMIN, WNI_CFG_HE_STBC_GT80_STAMAX,
WNI_CFG_HE_STBC_GT80_STADEF},
{WNI_CFG_HE_ER_4x_LTF_GI,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_ER_4x_LTF_GI_STAMIN, WNI_CFG_HE_ER_4x_LTF_GI_STAMAX,
WNI_CFG_HE_ER_4x_LTF_GI_STADEF},
{WNI_CFG_HE_NSS, {WNI_CFG_HE_NSS,
CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT, CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
WNI_CFG_HE_NSS_STAMIN, WNI_CFG_HE_NSS_STAMAX, WNI_CFG_HE_NSS_STAMIN, WNI_CFG_HE_NSS_STAMAX,

106
core/mac/src/pe/lim/lim_utils.c
View File

@@ -5919,20 +5919,16 @@ bool lim_send_he_ie_update(tpAniSirGlobal mac_ctx, tpPESession pe_session)
WMI_HEOPS_TWT_SET(he_ops, he_op->twt_required); WMI_HEOPS_TWT_SET(he_ops, he_op->twt_required);
WMI_HEOPS_RTSTHLD_SET(he_ops, he_op->rts_threshold); WMI_HEOPS_RTSTHLD_SET(he_ops, he_op->rts_threshold);
WMI_HEOPS_PARTBSSCOLOR_SET(he_ops, he_op->partial_bss_col); WMI_HEOPS_PARTBSSCOLOR_SET(he_ops, he_op->partial_bss_col);
WMI_HEOPS_MAXBSSID_SET(he_ops, he_op->maxbssid_ind);
WMI_HEOPS_TXBSSID_SET(he_ops, he_op->tx_bssid_ind); WMI_HEOPS_TXBSSID_SET(he_ops, he_op->tx_bssid_ind);
WMI_HEOPS_BSSCOLORDISABLE_SET(he_ops, he_op->bss_col_disabled); WMI_HEOPS_BSSCOLORDISABLE_SET(he_ops, he_op->bss_col_disabled);
WMI_HEOPS_DUALBEACON_SET(he_ops, he_op->dual_beacon);
status = wma_update_he_ops_ie(cds_get_context(QDF_MODULE_ID_WMA), status = wma_update_he_ops_ie(cds_get_context(QDF_MODULE_ID_WMA),
pe_session->smeSessionId, he_ops); pe_session->smeSessionId, he_ops);
if (status != QDF_STATUS_SUCCESS) { if (status != QDF_STATUS_SUCCESS) {
lim_log(mac_ctx, LOGE, pe_err("Can't send for vdev_id[%d] he_ops[0x%x]",
FL("Can't send for vdev_id[%d] he_ops[0x%x]"),
pe_session->smeSessionId, he_ops); pe_session->smeSessionId, he_ops);
return false; return false;
} else { } else {
lim_log(mac_ctx, LOGD, pe_debug("successfully sent for vdev_id[%d] he_ops[0x%x]",
FL("successfully sent for vdev_id[%d] he_ops[0x%x]"),
pe_session->smeSessionId, he_ops); pe_session->smeSessionId, he_ops);
} }
@@ -7232,21 +7228,35 @@ static void lim_intersect_he_caps(tDot11fIEvendor_he_cap *rcvd_he,
peer_he->fragmentation &= session_he->fragmentation; peer_he->fragmentation &= session_he->fragmentation;
/* Tx STBC is first bit and Rx STBC is second bit */ /* Tx STBC is first bit and Rx STBC is second bit */
if (session_he->stbc) { if (session_he->stbc_lt_80mhz) {
val = 0; val = 0;
if ((session_he->stbc & 0x1) && (peer_he->stbc & 0x10)) if ((session_he->stbc_lt_80mhz & 0x1) &&
(peer_he->stbc_lt_80mhz & 0x10))
val |= (1 << 1); val |= (1 << 1);
if ((session_he->stbc & 0x10) && (peer_he->stbc & 0x1)) if ((session_he->stbc_lt_80mhz & 0x10) &&
(peer_he->stbc_lt_80mhz & 0x1))
val |= (1 << 0); val |= (1 << 0);
peer_he->stbc = val; peer_he->stbc_lt_80mhz = val;
}
/* Tx STBC is first bit and Rx STBC is second bit */
if (session_he->stbc_gt_80mhz) {
val = 0;
if ((session_he->stbc_gt_80mhz & 0x1) &&
(peer_he->stbc_gt_80mhz & 0x10))
val |= (1 << 1);
if ((session_he->stbc_gt_80mhz & 0x10) &&
(peer_he->stbc_gt_80mhz & 0x1))
val |= (1 << 0);
peer_he->stbc_gt_80mhz = val;
} }
/* Tx Doppler is first bit and Rx Doppler is second bit */ /* Tx Doppler is first bit and Rx Doppler is second bit */
if (session_he->doppler) { if (session_he->doppler) {
val = 0; val = 0;
if ((session_he->stbc & 0x1) && (peer_he->stbc & 0x10)) if ((session_he->doppler & 0x1) && (peer_he->doppler & 0x10))
val |= (1 << 1); val |= (1 << 1);
if ((session_he->stbc & 0x10) && (peer_he->stbc & 0x1)) if ((session_he->doppler & 0x10) && (peer_he->doppler & 0x1))
val |= (1 << 0); val |= (1 << 0);
peer_he->doppler = val; peer_he->doppler = val;
} }
@@ -7385,28 +7395,23 @@ void lim_decide_he_op(tpAniSirGlobal mac_ctx, tpAddBssParams add_bss,
he_ops->twt_required = HE_OP_TWT_REQ_GET(he_op); he_ops->twt_required = HE_OP_TWT_REQ_GET(he_op);
he_ops->rts_threshold = HE_OP_RTS_THRES_GET(he_op); he_ops->rts_threshold = HE_OP_RTS_THRES_GET(he_op);
he_ops->partial_bss_col = HE_OP_PART_BSS_COLOR_GET(he_op); he_ops->partial_bss_col = HE_OP_PART_BSS_COLOR_GET(he_op);
he_ops->maxbssid_ind = HE_OP_MAXBSSID_IND_GET(he_op);
he_ops->tx_bssid_ind = HE_OP_TX_BSSIX_IND_GET(he_op); he_ops->tx_bssid_ind = HE_OP_TX_BSSIX_IND_GET(he_op);
he_ops->bss_col_disabled = HE_OP_BSS_COLOR_DIS_GET(he_op); he_ops->bss_col_disabled = HE_OP_BSS_COLOR_DIS_GET(he_op);
he_ops->dual_beacon = HE_OP_DUAL_BEACON_GET(he_op);
session->he_op.bss_color = he_ops->bss_color; session->he_op.bss_color = he_ops->bss_color;
session->he_op.default_pe = he_ops->default_pe; session->he_op.default_pe = he_ops->default_pe;
session->he_op.twt_required = he_ops->twt_required; session->he_op.twt_required = he_ops->twt_required;
session->he_op.rts_threshold = he_ops->rts_threshold; session->he_op.rts_threshold = he_ops->rts_threshold;
session->he_op.partial_bss_col = he_ops->partial_bss_col; session->he_op.partial_bss_col = he_ops->partial_bss_col;
session->he_op.maxbssid_ind = he_ops->maxbssid_ind;
session->he_op.tx_bssid_ind = he_ops->tx_bssid_ind; session->he_op.tx_bssid_ind = he_ops->tx_bssid_ind;
session->he_op.bss_col_disabled = he_ops->bss_col_disabled; session->he_op.bss_col_disabled = he_ops->bss_col_disabled;
session->he_op.dual_beacon = he_ops->dual_beacon;
pe_debug("HE Operation: bss_color: %0x, default_pe_duration: %0x, twt_required: %0x, rts_threshold: %0x", pe_debug("HE Operation: bss_color: %0x, default_pe_duration: %0x, twt_required: %0x, rts_threshold: %0x",
he_ops->bss_color, he_ops->default_pe, he_ops->bss_color, he_ops->default_pe,
he_ops->twt_required, he_ops->rts_threshold); he_ops->twt_required, he_ops->rts_threshold);
pe_debug("partial_bss_color: %0x, MaxBSSID Indicator: %0x, Tx BSSID Indicator: %0x, BSS color disabled: %0x, Dual beacon: %0x", pe_debug("partial_bss_color: %0x, Tx BSSID Indicator: %0x, BSS color disabled: %0x",
he_ops->partial_bss_col, he_ops->maxbssid_ind, he_ops->partial_bss_col, he_ops->tx_bssid_ind,
he_ops->tx_bssid_ind, he_ops->bss_col_disabled, he_ops->bss_col_disabled);
he_ops->dual_beacon);
} }
void lim_copy_bss_he_cap(tpPESession session, void lim_copy_bss_he_cap(tpPESession session,
@@ -7475,6 +7480,9 @@ void lim_log_he_cap(tpAniSirGlobal mac, tDot11fIEvendor_he_cap *he_cap)
he_cap->bsrp_ampdu_aggr); he_cap->bsrp_ampdu_aggr);
pe_debug("\tQuite Time Period support: 0x%01x", he_cap->qtp); pe_debug("\tQuite Time Period support: 0x%01x", he_cap->qtp);
pe_debug("\tA-BQR support: 0x%01x", he_cap->a_bqr); pe_debug("\tA-BQR support: 0x%01x", he_cap->a_bqr);
pe_debug("\tSR Reponder support: 0x%01x", he_cap->sr_responder);
pe_debug("\tNDP Feedback support: 0x%01x", he_cap->ndp_feedback_supp);
pe_debug("\tOPS support: 0x%01x", he_cap->ops_supp);
/* HE PHY capabilities */ /* HE PHY capabilities */
pe_debug("\tDual band support: 0x%01x", he_cap->dual_band); pe_debug("\tDual band support: 0x%01x", he_cap->dual_band);
@@ -7486,10 +7494,11 @@ void lim_log_he_cap(tpAniSirGlobal mac, tDot11fIEvendor_he_cap *he_cap)
pe_debug("\tLDPC coding support: 0x%01x", pe_debug("\tLDPC coding support: 0x%01x",
he_cap->ldpc_coding); he_cap->ldpc_coding);
pe_debug("\tLTF and GI for HE PPDUs: 0x%02x", pe_debug("\tLTF and GI for HE PPDUs: 0x%02x",
he_cap->he_ltf_gi_ppdu); he_cap->he_1x_ltf_800_gi_ppdu);
pe_debug("\tLTF and GI for NDP: 0x%02x", pe_debug("\tLTF and GI for NDP: 0x%02x",
he_cap->he_ltf_gi_ndp); he_cap->he_4x_ltf_3200_gi_ndp);
pe_debug("\tSTBC Tx & Rx support: 0x%02x", he_cap->stbc); pe_debug("\tSTBC Tx & Rx support (<= 80MHz): 0x%02x",
he_cap->stbc_lt_80mhz);
pe_debug("\tDoppler support: 0x%02x", he_cap->doppler); pe_debug("\tDoppler support: 0x%02x", he_cap->doppler);
pe_debug("\tUL MU: 0x%02x", he_cap->ul_mu); pe_debug("\tUL MU: 0x%02x", he_cap->ul_mu);
pe_debug("\tDCM encoding Tx: 0x%03x", he_cap->dcm_enc_tx); pe_debug("\tDCM encoding Tx: 0x%03x", he_cap->dcm_enc_tx);
@@ -7501,12 +7510,8 @@ void lim_log_he_cap(tpAniSirGlobal mac, tDot11fIEvendor_he_cap *he_cap)
pe_debug("\tMU Beamformer: 0x%01x", he_cap->mu_beamformer); pe_debug("\tMU Beamformer: 0x%01x", he_cap->mu_beamformer);
pe_debug("\tBeamformee STS for <= 80Mhz: 0x%03x", pe_debug("\tBeamformee STS for <= 80Mhz: 0x%03x",
he_cap->bfee_sts_lt_80); he_cap->bfee_sts_lt_80);
pe_debug("\tNSTS total for <= 80Mhz: 0x%03x",
he_cap->nsts_tol_lt_80);
pe_debug("\tBeamformee STS for > 80Mhz: 0x%03x", pe_debug("\tBeamformee STS for > 80Mhz: 0x%03x",
he_cap->bfee_sta_gt_80); he_cap->bfee_sts_gt_80);
pe_debug("\tNSTS total for > 80Mhz: 0x%03x",
he_cap->nsts_tot_gt_80);
pe_debug("\tNo. of sounding dim <= 80Mhz: 0x%03x", pe_debug("\tNo. of sounding dim <= 80Mhz: 0x%03x",
he_cap->num_sounding_lt_80); he_cap->num_sounding_lt_80);
pe_debug("\tNo. of sounding dim > 80Mhz: 0x%03x", pe_debug("\tNo. of sounding dim > 80Mhz: 0x%03x",
@@ -7528,7 +7533,11 @@ void lim_log_he_cap(tpAniSirGlobal mac, tDot11fIEvendor_he_cap *he_cap)
pe_debug("\tPPET present: 0x%01x", he_cap->ppet_present); pe_debug("\tPPET present: 0x%01x", he_cap->ppet_present);
pe_debug("\tSRP based SR-support: 0x%01x", he_cap->srp); pe_debug("\tSRP based SR-support: 0x%01x", he_cap->srp);
pe_debug("\tPower boost factor: 0x%01x", he_cap->power_boost); pe_debug("\tPower boost factor: 0x%01x", he_cap->power_boost);
pe_debug("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_gi_4x); pe_debug("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_800_gi_4x);
pe_debug("\tSTBC Tx & Rx support (> 80MHz): 0x%02x",
he_cap->stbc_gt_80mhz);
pe_debug("\tMax Nc: 0x%03x", he_cap->max_nc);
pe_debug("\tER 4x HE LTF support: 0x%01x", he_cap->er_he_ltf_800_gi_4x);
pe_debug("\tHighest NSS supported: 0x%03x", pe_debug("\tHighest NSS supported: 0x%03x",
he_cap->nss_supported); he_cap->nss_supported);
@@ -7550,22 +7559,21 @@ void lim_log_he_cap(tpAniSirGlobal mac, tDot11fIEvendor_he_cap *he_cap)
void lim_log_he_op(tpAniSirGlobal mac, tDot11fIEvendor_he_op *he_ops) void lim_log_he_op(tpAniSirGlobal mac, tDot11fIEvendor_he_op *he_ops)
{ {
tDot11fIEvht_info *vht_info = &he_ops->vht_info; pe_debug("bss_color: %0x, default_pe_duration: %0x, twt_required: %0x, rts_threshold: %0x, vht_oper_present: %0x",
pe_debug("bss_color: %0x, default_pe_duration: %0x, twt_required: %0x, rts_threshold: %0x",
he_ops->bss_color, he_ops->default_pe, he_ops->bss_color, he_ops->default_pe,
he_ops->twt_required, he_ops->rts_threshold); he_ops->twt_required, he_ops->rts_threshold,
pe_debug("\tpartial_bss_color: %0x, MaxBSSID Indicator: %0x, Tx BSSID Indicator: %0x, BSS color disabled: %0x, Dual beacon: %0x", he_ops->vht_oper_present);
he_ops->partial_bss_col, he_ops->maxbssid_ind, pe_debug("\tpartial_bss_color: %0x, MBSSID AP: %0x, Tx BSSID Indicator: %0x, BSS color disabled: %0x",
he_ops->tx_bssid_ind, he_ops->bss_col_disabled, he_ops->partial_bss_col, he_ops->mbssid_ap,
he_ops->dual_beacon); he_ops->tx_bssid_ind, he_ops->bss_col_disabled);
if (!vht_info->present) if (he_ops->vht_oper_present)
pe_debug("VHT Info not present in HE Operation"); pe_debug("VHT Info not present in HE Operation");
else else
pe_debug("VHT Info: chan_width: %d, center_freq0: %d, center_freq1: %d", pe_debug("VHT Info: chan_width: %d, center_freq0: %d, center_freq1: %d",
vht_info->chan_width, vht_info->center_freq_seg0, he_ops->vht_oper.info.chan_width,
vht_info->center_freq_seg1); he_ops->vht_oper.info.center_freq_seg0,
he_ops->vht_oper.info.center_freq_seg1);
} }
#ifdef WLAN_FEATURE_11AX_BSS_COLOR #ifdef WLAN_FEATURE_11AX_BSS_COLOR
@@ -7655,6 +7663,9 @@ void lim_set_he_caps(tpAniSirGlobal mac, tpPESession session, uint8_t *ie_start,
he_cap->bsrp_ampdu_aggr = dot11_cap.bsrp_ampdu_aggr; he_cap->bsrp_ampdu_aggr = dot11_cap.bsrp_ampdu_aggr;
he_cap->qtp = dot11_cap.qtp; he_cap->qtp = dot11_cap.qtp;
he_cap->a_bqr = dot11_cap.a_bqr; he_cap->a_bqr = dot11_cap.a_bqr;
he_cap->sr_responder = dot11_cap.sr_responder;
he_cap->ops_supp = dot11_cap.ops_supp;
he_cap->ndp_feedback_supp = dot11_cap.ndp_feedback_supp;
he_cap->reserved1 = dot11_cap.reserved1; he_cap->reserved1 = dot11_cap.reserved1;
he_cap->dual_band = dot11_cap.dual_band; he_cap->dual_band = dot11_cap.dual_band;
@@ -7662,9 +7673,10 @@ void lim_set_he_caps(tpAniSirGlobal mac, tpPESession session, uint8_t *ie_start,
he_cap->rx_pream_puncturing = dot11_cap.rx_pream_puncturing; he_cap->rx_pream_puncturing = dot11_cap.rx_pream_puncturing;
he_cap->device_class = dot11_cap.device_class; he_cap->device_class = dot11_cap.device_class;
he_cap->ldpc_coding = dot11_cap.ldpc_coding; he_cap->ldpc_coding = dot11_cap.ldpc_coding;
he_cap->he_ltf_gi_ppdu = dot11_cap.he_ltf_gi_ppdu; he_cap->he_1x_ltf_800_gi_ppdu = dot11_cap.he_1x_ltf_800_gi_ppdu;
he_cap->he_ltf_gi_ndp = dot11_cap.he_ltf_gi_ndp; he_cap->he_4x_ltf_3200_gi_ndp = dot11_cap.he_4x_ltf_3200_gi_ndp;
he_cap->stbc = dot11_cap.stbc; he_cap->stbc_lt_80mhz = dot11_cap.stbc_lt_80mhz;
he_cap->stbc_gt_80mhz = dot11_cap.stbc_gt_80mhz;
he_cap->doppler = dot11_cap.doppler; he_cap->doppler = dot11_cap.doppler;
he_cap->ul_mu = dot11_cap.ul_mu; he_cap->ul_mu = dot11_cap.ul_mu;
he_cap->dcm_enc_tx = dot11_cap.dcm_enc_tx; he_cap->dcm_enc_tx = dot11_cap.dcm_enc_tx;
@@ -7675,9 +7687,7 @@ void lim_set_he_caps(tpAniSirGlobal mac, tpPESession session, uint8_t *ie_start,
he_cap->su_beamformee = dot11_cap.su_beamformee; he_cap->su_beamformee = dot11_cap.su_beamformee;
he_cap->mu_beamformer = dot11_cap.mu_beamformer; he_cap->mu_beamformer = dot11_cap.mu_beamformer;
he_cap->bfee_sts_lt_80 = dot11_cap.bfee_sts_lt_80; he_cap->bfee_sts_lt_80 = dot11_cap.bfee_sts_lt_80;
he_cap->nsts_tol_lt_80 = dot11_cap.nsts_tol_lt_80; he_cap->bfee_sts_gt_80 = dot11_cap.bfee_sts_gt_80;
he_cap->bfee_sta_gt_80 = dot11_cap.bfee_sta_gt_80;
he_cap->nsts_tot_gt_80 = dot11_cap.nsts_tot_gt_80;
he_cap->num_sounding_lt_80 = dot11_cap.num_sounding_lt_80; he_cap->num_sounding_lt_80 = dot11_cap.num_sounding_lt_80;
he_cap->num_sounding_gt_80 = dot11_cap.num_sounding_gt_80; he_cap->num_sounding_gt_80 = dot11_cap.num_sounding_gt_80;
he_cap->su_feedback_tone16 = dot11_cap.su_feedback_tone16; he_cap->su_feedback_tone16 = dot11_cap.su_feedback_tone16;
@@ -7691,7 +7701,9 @@ void lim_set_he_caps(tpAniSirGlobal mac, tpPESession session, uint8_t *ie_start,
he_cap->srp = dot11_cap.srp; he_cap->srp = dot11_cap.srp;
he_cap->power_boost = dot11_cap.power_boost; he_cap->power_boost = dot11_cap.power_boost;
he_cap->he_ltf_gi_4x = dot11_cap.he_ltf_gi_4x; he_cap->he_ltf_800_gi_4x = dot11_cap.he_ltf_800_gi_4x;
he_cap->max_nc = dot11_cap.max_nc;
he_cap->er_he_ltf_800_gi_4x = dot11_cap.er_he_ltf_800_gi_4x;
he_cap->reserved2 = dot11_cap.reserved2; he_cap->reserved2 = dot11_cap.reserved2;
he_cap->nss_supported = dot11_cap.nss_supported; he_cap->nss_supported = dot11_cap.nss_supported;

51
core/mac/src/sys/legacy/src/utils/src/parser_api.c
View File

@@ -6040,6 +6040,13 @@ QDF_STATUS populate_dot11f_he_caps(tpAniSirGlobal mac_ctx, tpPESession session,
he_cap->qtp = value; he_cap->qtp = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_A_BQR, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_A_BQR, value);
he_cap->a_bqr = value; he_cap->a_bqr = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_SR_RESPONDER, value);
he_cap->sr_responder = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NDP_FEEDBACK_SUPP,
value);
he_cap->ndp_feedback_supp = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_OPS_SUPP, value);
he_cap->ops_supp = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_DUAL_BAND, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_DUAL_BAND, value);
he_cap->dual_band = value; he_cap->dual_band = value;
@@ -6052,11 +6059,11 @@ QDF_STATUS populate_dot11f_he_caps(tpAniSirGlobal mac_ctx, tpPESession session,
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_LDPC, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_LDPC, value);
he_cap->ldpc_coding = value; he_cap->ldpc_coding = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_LTF_PPDU, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_LTF_PPDU, value);
he_cap->he_ltf_gi_ppdu = value; he_cap->he_1x_ltf_800_gi_ppdu = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_LTF_NDP, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_LTF_NDP, value);
he_cap->he_ltf_gi_ndp = value; he_cap->he_4x_ltf_3200_gi_ndp = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_STBC, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_STBC_LT80, value);
he_cap->stbc = value; he_cap->stbc_lt_80mhz = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_DOPPLER, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_DOPPLER, value);
he_cap->doppler = value; he_cap->doppler = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_UL_MUMIMO, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_UL_MUMIMO, value);
@@ -6075,12 +6082,8 @@ QDF_STATUS populate_dot11f_he_caps(tpAniSirGlobal mac_ctx, tpPESession session,
he_cap->mu_beamformer = value; he_cap->mu_beamformer = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_BFEE_STS_LT80, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_BFEE_STS_LT80, value);
he_cap->bfee_sts_lt_80 = value; he_cap->bfee_sts_lt_80 = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NSTS_TOT_LT80, value);
he_cap->nsts_tol_lt_80 = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_BFEE_STS_GT80, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_BFEE_STS_GT80, value);
he_cap->bfee_sta_gt_80 = value; he_cap->bfee_sts_gt_80 = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NSTS_TOT_GT80, value);
he_cap->nsts_tot_gt_80 = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NUM_SOUND_LT80, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NUM_SOUND_LT80, value);
he_cap->num_sounding_lt_80 = value; he_cap->num_sounding_lt_80 = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NUM_SOUND_GT80, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NUM_SOUND_GT80, value);
@@ -6106,7 +6109,13 @@ QDF_STATUS populate_dot11f_he_caps(tpAniSirGlobal mac_ctx, tpPESession session,
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_POWER_BOOST, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_POWER_BOOST, value);
he_cap->power_boost = value; he_cap->power_boost = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_4x_LTF_GI, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_4x_LTF_GI, value);
he_cap->he_ltf_gi_4x = value; he_cap->he_ltf_800_gi_4x = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_MAX_NC, value);
he_cap->max_nc = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_STBC_GT80, value);
he_cap->stbc_gt_80mhz = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_ER_4x_LTF_GI, value);
he_cap->er_he_ltf_800_gi_4x = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NSS, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_NSS, value);
he_cap->nss_supported = value; he_cap->nss_supported = value;
CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_MCS, value); CFG_GET_INT(status, mac_ctx, WNI_CFG_HE_MCS, value);
@@ -6148,8 +6157,6 @@ QDF_STATUS populate_dot11f_he_caps(tpAniSirGlobal mac_ctx, tpPESession session,
QDF_STATUS populate_dot11f_he_operation(tpAniSirGlobal mac_ctx, QDF_STATUS populate_dot11f_he_operation(tpAniSirGlobal mac_ctx,
tpPESession session, tDot11fIEvendor_he_op *he_op) tpPESession session, tDot11fIEvendor_he_op *he_op)
{ {
tDot11fIEvht_info *vht_info = &he_op->vht_info;
he_op->present = 1; he_op->present = 1;
he_op->bss_color = session->he_op.bss_color; he_op->bss_color = session->he_op.bss_color;
@@ -6157,28 +6164,26 @@ QDF_STATUS populate_dot11f_he_operation(tpAniSirGlobal mac_ctx,
he_op->twt_required = session->he_op.twt_required; he_op->twt_required = session->he_op.twt_required;
he_op->rts_threshold = session->he_op.rts_threshold; he_op->rts_threshold = session->he_op.rts_threshold;
he_op->partial_bss_col = session->he_op.partial_bss_col; he_op->partial_bss_col = session->he_op.partial_bss_col;
he_op->maxbssid_ind = session->he_op.maxbssid_ind; he_op->mbssid_ap = session->he_op.mbssid_ap;
he_op->tx_bssid_ind = session->he_op.tx_bssid_ind; he_op->tx_bssid_ind = session->he_op.tx_bssid_ind;
he_op->bss_col_disabled = session->he_op.bss_col_disabled; he_op->bss_col_disabled = session->he_op.bss_col_disabled;
he_op->dual_beacon = session->he_op.dual_beacon;
vht_info->present = 1; he_op->vht_oper_present = 1;
if (session->ch_width > CH_WIDTH_40MHZ) { if (session->ch_width > CH_WIDTH_40MHZ) {
vht_info->chan_width = 1; he_op->vht_oper.info.chan_width = 1;
vht_info->center_freq_seg0 = he_op->vht_oper.info.center_freq_seg0 =
session->ch_center_freq_seg0; session->ch_center_freq_seg0;
if (session->ch_width == CH_WIDTH_80P80MHZ || if (session->ch_width == CH_WIDTH_80P80MHZ ||
session->ch_width == CH_WIDTH_160MHZ) session->ch_width == CH_WIDTH_160MHZ)
vht_info->center_freq_seg1 = he_op->vht_oper.info.center_freq_seg1 =
session->ch_center_freq_seg1; session->ch_center_freq_seg1;
else else
vht_info->center_freq_seg1 = 0; he_op->vht_oper.info.center_freq_seg1 = 0;
} else { } else {
vht_info->chan_width = 0; he_op->vht_oper.info.chan_width = 0;
vht_info->center_freq_seg0 = 0; he_op->vht_oper.info.center_freq_seg0 = 0;
vht_info->center_freq_seg1 = 0; he_op->vht_oper.info.center_freq_seg1 = 0;
} }
lim_log_he_op(mac_ctx, he_op); lim_log_he_op(mac_ctx, he_op);
return QDF_STATUS_SUCCESS; return QDF_STATUS_SUCCESS;

28
core/sme/src/csr/csr_api_roam.c
View File

@@ -2318,6 +2318,12 @@ static void csr_update_session_he_cap(tpAniSirGlobal mac_ctx,
he_cap->qtp = value; he_cap->qtp = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_A_BQR, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_A_BQR, &value);
he_cap->a_bqr = value; he_cap->a_bqr = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_SR_RESPONDER, &value);
he_cap->sr_responder = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NDP_FEEDBACK_SUPP, &value);
he_cap->ndp_feedback_supp = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_OPS_SUPP, &value);
he_cap->ops_supp = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_DUAL_BAND, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_DUAL_BAND, &value);
he_cap->dual_band = value; he_cap->dual_band = value;
@@ -2330,11 +2336,11 @@ static void csr_update_session_he_cap(tpAniSirGlobal mac_ctx,
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_LDPC, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_LDPC, &value);
he_cap->ldpc_coding = value; he_cap->ldpc_coding = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_LTF_PPDU, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_LTF_PPDU, &value);
he_cap->he_ltf_gi_ppdu = value; he_cap->he_1x_ltf_800_gi_ppdu = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_LTF_NDP, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_LTF_NDP, &value);
he_cap->he_ltf_gi_ndp = value; he_cap->he_4x_ltf_3200_gi_ndp = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_STBC, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_STBC_LT80, &value);
he_cap->stbc = value; he_cap->stbc_lt_80mhz = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_DOPPLER, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_DOPPLER, &value);
he_cap->doppler = value; he_cap->doppler = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_UL_MUMIMO, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_UL_MUMIMO, &value);
@@ -2353,12 +2359,8 @@ static void csr_update_session_he_cap(tpAniSirGlobal mac_ctx,
he_cap->mu_beamformer = value; he_cap->mu_beamformer = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_BFEE_STS_LT80, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_BFEE_STS_LT80, &value);
he_cap->bfee_sts_lt_80 = value; he_cap->bfee_sts_lt_80 = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NSTS_TOT_LT80, &value);
he_cap->nsts_tol_lt_80 = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_BFEE_STS_GT80, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_BFEE_STS_GT80, &value);
he_cap->bfee_sta_gt_80 = value; he_cap->bfee_sts_gt_80 = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NSTS_TOT_GT80, &value);
he_cap->nsts_tot_gt_80 = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NUM_SOUND_LT80, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NUM_SOUND_LT80, &value);
he_cap->num_sounding_lt_80 = value; he_cap->num_sounding_lt_80 = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NUM_SOUND_GT80, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NUM_SOUND_GT80, &value);
@@ -2384,7 +2386,13 @@ static void csr_update_session_he_cap(tpAniSirGlobal mac_ctx,
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_POWER_BOOST, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_POWER_BOOST, &value);
he_cap->power_boost = value; he_cap->power_boost = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_4x_LTF_GI, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_4x_LTF_GI, &value);
he_cap->he_ltf_gi_4x = value; he_cap->he_ltf_800_gi_4x = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_MAX_NC, &value);
he_cap->max_nc = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_STBC_GT80, &value);
he_cap->stbc_gt_80mhz = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_ER_4x_LTF_GI, &value);
he_cap->er_he_ltf_800_gi_4x = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NSS, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_NSS, &value);
he_cap->nss_supported = value; he_cap->nss_supported = value;
sme_cfg_get_int(mac_ctx, WNI_CFG_HE_MCS, &value); sme_cfg_get_int(mac_ctx, WNI_CFG_HE_MCS, &value);

133
core/wma/src/wma_he.c
View File

@@ -243,6 +243,9 @@ static void wma_convert_he_cap(tDot11fIEvendor_he_cap *he_cap, uint32_t mac_cap,
he_cap->bsrp_ampdu_aggr = WMI_HECAP_MAC_BSRPAMPDU_GET(mac_cap); he_cap->bsrp_ampdu_aggr = WMI_HECAP_MAC_BSRPAMPDU_GET(mac_cap);
he_cap->qtp = WMI_HECAP_MAC_QTP_GET(mac_cap); he_cap->qtp = WMI_HECAP_MAC_QTP_GET(mac_cap);
he_cap->a_bqr = WMI_HECAP_MAC_ABQR_GET(mac_cap); he_cap->a_bqr = WMI_HECAP_MAC_ABQR_GET(mac_cap);
he_cap->sr_responder = WMI_HECAP_MAC_SRRESP_GET(mac_cap);
he_cap->ndp_feedback_supp = WMI_HECAP_MAC_NDPFDBKRPT_GET(mac_cap);
he_cap->ops_supp = WMI_HECAP_MAC_OPS_GET(mac_cap);
/* HE PHY capabilities */ /* HE PHY capabilities */
he_cap->dual_band = WMI_HECAP_PHY_DB_GET(phy_cap); he_cap->dual_band = WMI_HECAP_PHY_DB_GET(phy_cap);
@@ -250,13 +253,17 @@ static void wma_convert_he_cap(tDot11fIEvendor_he_cap *he_cap, uint32_t mac_cap,
he_cap->rx_pream_puncturing = WMI_HECAP_PHY_PREAMBLEPUNCRX_GET(phy_cap); he_cap->rx_pream_puncturing = WMI_HECAP_PHY_PREAMBLEPUNCRX_GET(phy_cap);
he_cap->device_class = WMI_HECAP_PHY_COD_GET(phy_cap); he_cap->device_class = WMI_HECAP_PHY_COD_GET(phy_cap);
he_cap->ldpc_coding = WMI_HECAP_PHY_LDPC_GET(phy_cap); he_cap->ldpc_coding = WMI_HECAP_PHY_LDPC_GET(phy_cap);
he_cap->he_ltf_gi_ppdu = WMI_HECAP_PHY_LTFGIFORHE_GET(phy_cap); he_cap->he_1x_ltf_800_gi_ppdu = WMI_HECAP_PHY_LTFGIFORHE_GET(phy_cap);
he_cap->he_ltf_gi_ndp = WMI_HECAP_PHY_LTFGIFORNDP_GET(phy_cap); he_cap->he_4x_ltf_3200_gi_ndp = WMI_HECAP_PHY_LTFGIFORNDP_GET(phy_cap);
he_cap->stbc = (WMI_HECAP_PHY_RXSTBC_GET(phy_cap) << 1) | he_cap->stbc_lt_80mhz = (WMI_HECAP_PHY_RXSTBC_GET(phy_cap) << 1) |
WMI_HECAP_PHY_TXSTBC_GET(phy_cap); WMI_HECAP_PHY_TXSTBC_GET(phy_cap);
he_cap->stbc_gt_80mhz = (WMI_HECAP_PHY_STBCRXGT80_GET(phy_cap) << 1) |
WMI_HECAP_PHY_STBCTXGT80_GET(phy_cap);
he_cap->doppler = (WMI_HECAP_PHY_RXDOPPLER_GET(phy_cap) << 1) | he_cap->doppler = (WMI_HECAP_PHY_RXDOPPLER_GET(phy_cap) << 1) |
WMI_HECAP_PHY_TXDOPPLER_GET(phy_cap); WMI_HECAP_PHY_TXDOPPLER_GET(phy_cap);
he_cap->ul_mu = WMI_HECAP_PHY_UL_MU_MIMO_GET(phy_cap); he_cap->ul_mu = (WMI_HECAP_PHY_ULMUMIMOOFDMA_GET(phy_cap) << 1) |
WMI_HECAP_PHY_UL_MU_MIMO_GET(phy_cap);
he_cap->dcm_enc_tx = WMI_HECAP_PHY_DCMTX_GET(phy_cap); he_cap->dcm_enc_tx = WMI_HECAP_PHY_DCMTX_GET(phy_cap);
he_cap->dcm_enc_rx = WMI_HECAP_PHY_DCMRX_GET(phy_cap); he_cap->dcm_enc_rx = WMI_HECAP_PHY_DCMRX_GET(phy_cap);
he_cap->ul_he_mu = WMI_HECAP_PHY_ULHEMU_GET(phy_cap); he_cap->ul_he_mu = WMI_HECAP_PHY_ULHEMU_GET(phy_cap);
@@ -264,9 +271,7 @@ static void wma_convert_he_cap(tDot11fIEvendor_he_cap *he_cap, uint32_t mac_cap,
he_cap->su_beamformee = WMI_HECAP_PHY_SUBFME_GET(phy_cap); he_cap->su_beamformee = WMI_HECAP_PHY_SUBFME_GET(phy_cap);
he_cap->mu_beamformer = WMI_HECAP_PHY_MUBFMR_GET(phy_cap); he_cap->mu_beamformer = WMI_HECAP_PHY_MUBFMR_GET(phy_cap);
he_cap->bfee_sts_lt_80 = WMI_HECAP_PHY_SUBFMESTS_GET(phy_cap); he_cap->bfee_sts_lt_80 = WMI_HECAP_PHY_SUBFMESTS_GET(phy_cap);
he_cap->nsts_tol_lt_80 = WMI_HECAP_PHY_NSTSLT80MHZ_GET(phy_cap); he_cap->bfee_sts_gt_80 = WMI_HECAP_PHY_BFMESTSGT80MHZ_GET(phy_cap);
he_cap->bfee_sta_gt_80 = WMI_HECAP_PHY_BFMESTSGT80MHZ_GET(phy_cap);
he_cap->nsts_tot_gt_80 = WMI_HECAP_PHY_NSTSGT80MHZ_GET(phy_cap);
he_cap->num_sounding_lt_80 = WMI_HECAP_PHY_NUMSOUNDLT80MHZ_GET(phy_cap); he_cap->num_sounding_lt_80 = WMI_HECAP_PHY_NUMSOUNDLT80MHZ_GET(phy_cap);
he_cap->num_sounding_gt_80 = WMI_HECAP_PHY_NUMSOUNDGT80MHZ_GET(phy_cap); he_cap->num_sounding_gt_80 = WMI_HECAP_PHY_NUMSOUNDGT80MHZ_GET(phy_cap);
he_cap->su_feedback_tone16 = he_cap->su_feedback_tone16 =
@@ -283,7 +288,11 @@ static void wma_convert_he_cap(tDot11fIEvendor_he_cap *he_cap, uint32_t mac_cap,
he_cap->ppet_present = WMI_HECAP_PHY_PETHRESPRESENT_GET(phy_cap); he_cap->ppet_present = WMI_HECAP_PHY_PETHRESPRESENT_GET(phy_cap);
he_cap->srp = WMI_HECAP_PHY_SRPSPRESENT_GET(phy_cap); he_cap->srp = WMI_HECAP_PHY_SRPSPRESENT_GET(phy_cap);
he_cap->power_boost = WMI_HECAP_PHY_PWRBOOSTAR_GET(phy_cap); he_cap->power_boost = WMI_HECAP_PHY_PWRBOOSTAR_GET(phy_cap);
he_cap->he_ltf_gi_4x = WMI_HECAP_PHY_4XLTFAND800NSECSGI_GET(phy_cap); he_cap->he_ltf_800_gi_4x =
WMI_HECAP_PHY_4XLTFAND800NSECSGI_GET(phy_cap);
he_cap->max_nc = WMI_HECAP_PHY_MAXNC_GET(phy_cap);
he_cap->er_he_ltf_800_gi_4x =
WMI_HECAP_PHY_ERSU4X800NSECGI_GET(phy_cap);
he_cap->nss_supported = nss - 1; he_cap->nss_supported = nss - 1;
he_cap->mcs_supported = mcs; he_cap->mcs_supported = mcs;
@@ -382,12 +391,14 @@ static void wma_derive_ext_he_cap(t_wma_handle *wma_handle,
new_cap->device_class); new_cap->device_class);
he_cap->ldpc_coding = QDF_MIN(he_cap->ldpc_coding, he_cap->ldpc_coding = QDF_MIN(he_cap->ldpc_coding,
new_cap->ldpc_coding); new_cap->ldpc_coding);
he_cap->he_ltf_gi_ppdu = QDF_MIN(he_cap->he_ltf_gi_ppdu, he_cap->he_1x_ltf_800_gi_ppdu =
new_cap->he_ltf_gi_ppdu); QDF_MIN(he_cap->he_1x_ltf_800_gi_ppdu,
he_cap->he_ltf_gi_ndp = QDF_MIN(he_cap->he_ltf_gi_ndp, new_cap->he_1x_ltf_800_gi_ppdu);
new_cap->he_ltf_gi_ndp); he_cap->he_4x_ltf_3200_gi_ndp =
he_cap->stbc = QDF_MIN(he_cap->stbc, QDF_MIN(he_cap->he_4x_ltf_3200_gi_ndp,
new_cap->stbc); new_cap->he_4x_ltf_3200_gi_ndp);
he_cap->stbc_lt_80mhz = QDF_MIN(he_cap->stbc_lt_80mhz,
new_cap->stbc_lt_80mhz);
he_cap->doppler = QDF_MIN(he_cap->doppler, he_cap->doppler = QDF_MIN(he_cap->doppler,
new_cap->doppler); new_cap->doppler);
he_cap->ul_mu = QDF_MIN(he_cap->ul_mu, new_cap->ul_mu); he_cap->ul_mu = QDF_MIN(he_cap->ul_mu, new_cap->ul_mu);
@@ -404,12 +415,8 @@ static void wma_derive_ext_he_cap(t_wma_handle *wma_handle,
new_cap->mu_beamformer); new_cap->mu_beamformer);
he_cap->bfee_sts_lt_80 = QDF_MIN(he_cap->bfee_sts_lt_80, he_cap->bfee_sts_lt_80 = QDF_MIN(he_cap->bfee_sts_lt_80,
new_cap->bfee_sts_lt_80); new_cap->bfee_sts_lt_80);
he_cap->nsts_tol_lt_80 = QDF_MIN(he_cap->nsts_tol_lt_80, he_cap->bfee_sts_gt_80 = QDF_MIN(he_cap->bfee_sts_gt_80,
new_cap->nsts_tol_lt_80); new_cap->bfee_sts_gt_80);
he_cap->bfee_sta_gt_80 = QDF_MIN(he_cap->bfee_sta_gt_80,
new_cap->bfee_sta_gt_80);
he_cap->nsts_tot_gt_80 = QDF_MIN(he_cap->nsts_tot_gt_80,
new_cap->nsts_tot_gt_80);
he_cap->num_sounding_lt_80 = QDF_MIN(he_cap->num_sounding_lt_80, he_cap->num_sounding_lt_80 = QDF_MIN(he_cap->num_sounding_lt_80,
new_cap->num_sounding_lt_80); new_cap->num_sounding_lt_80);
he_cap->num_sounding_gt_80 = QDF_MIN(he_cap->num_sounding_gt_80, he_cap->num_sounding_gt_80 = QDF_MIN(he_cap->num_sounding_gt_80,
@@ -434,8 +441,8 @@ static void wma_derive_ext_he_cap(t_wma_handle *wma_handle,
he_cap->srp = QDF_MIN(he_cap->srp, new_cap->srp); he_cap->srp = QDF_MIN(he_cap->srp, new_cap->srp);
he_cap->power_boost = QDF_MIN(he_cap->power_boost, he_cap->power_boost = QDF_MIN(he_cap->power_boost,
new_cap->power_boost); new_cap->power_boost);
he_cap->he_ltf_gi_4x = QDF_MIN(he_cap->he_ltf_gi_4x, he_cap->he_ltf_800_gi_4x = QDF_MIN(he_cap->he_ltf_800_gi_4x,
new_cap->he_ltf_gi_4x); new_cap->he_ltf_800_gi_4x);
he_cap->reserved2 = QDF_MIN(he_cap->reserved2, he_cap->reserved2 = QDF_MIN(he_cap->reserved2,
new_cap->reserved2); new_cap->reserved2);
he_cap->nss_supported = QDF_MIN(he_cap->nss_supported, he_cap->nss_supported = QDF_MIN(he_cap->nss_supported,
@@ -496,9 +503,10 @@ void wma_print_he_cap(tDot11fIEvendor_he_cap *he_cap)
he_cap->rx_pream_puncturing); he_cap->rx_pream_puncturing);
WMA_LOGI("\tClass of device: 0x%01x", he_cap->device_class); WMA_LOGI("\tClass of device: 0x%01x", he_cap->device_class);
WMA_LOGI("\tLDPC coding support: 0x%01x", he_cap->ldpc_coding); WMA_LOGI("\tLDPC coding support: 0x%01x", he_cap->ldpc_coding);
WMA_LOGI("\tLTF and GI for HE PPDUs: 0x%02x", he_cap->he_ltf_gi_ppdu); WMA_LOGI("\tLTF and GI for HE PPDUs: 0x%02x",
WMA_LOGI("\tLTF and GI for NDP: 0x%02x", he_cap->he_ltf_gi_ndp); he_cap->he_1x_ltf_800_gi_ppdu);
WMA_LOGI("\tSTBC Tx & Rx support: 0x%02x", he_cap->stbc); WMA_LOGI("\tLTF and GI for NDP: 0x%02x", he_cap->he_4x_ltf_3200_gi_ndp);
WMA_LOGI("\tSTBC Tx & Rx support: 0x%02x", he_cap->stbc_lt_80mhz);
WMA_LOGI("\tDoppler support: 0x%02x", he_cap->doppler); WMA_LOGI("\tDoppler support: 0x%02x", he_cap->doppler);
WMA_LOGI("\tUL MU: 0x%02x", he_cap->ul_mu); WMA_LOGI("\tUL MU: 0x%02x", he_cap->ul_mu);
WMA_LOGI("\tDCM encoding Tx: 0x%03x", he_cap->dcm_enc_tx); WMA_LOGI("\tDCM encoding Tx: 0x%03x", he_cap->dcm_enc_tx);
@@ -509,10 +517,8 @@ void wma_print_he_cap(tDot11fIEvendor_he_cap *he_cap)
WMA_LOGI("\tMU Beamformer: 0x%01x", he_cap->mu_beamformer); WMA_LOGI("\tMU Beamformer: 0x%01x", he_cap->mu_beamformer);
WMA_LOGI("\tBeamformee STS for <= 80Mhz: 0x%03x", WMA_LOGI("\tBeamformee STS for <= 80Mhz: 0x%03x",
he_cap->bfee_sts_lt_80); he_cap->bfee_sts_lt_80);
WMA_LOGI("\tNSTS total for <= 80Mhz: 0x%03x", he_cap->nsts_tol_lt_80);
WMA_LOGI("\tBeamformee STS for > 80Mhz: 0x%03x", WMA_LOGI("\tBeamformee STS for > 80Mhz: 0x%03x",
he_cap->bfee_sta_gt_80); he_cap->bfee_sts_gt_80);
WMA_LOGI("\tNSTS total for > 80Mhz: 0x%03x", he_cap->nsts_tot_gt_80);
WMA_LOGI("\tNo. of sounding dim <= 80Mhz: 0x%03x", WMA_LOGI("\tNo. of sounding dim <= 80Mhz: 0x%03x",
he_cap->num_sounding_lt_80); he_cap->num_sounding_lt_80);
WMA_LOGI("\tNo. of sounding dim > 80Mhz: 0x%03x", WMA_LOGI("\tNo. of sounding dim > 80Mhz: 0x%03x",
@@ -531,7 +537,7 @@ void wma_print_he_cap(tDot11fIEvendor_he_cap *he_cap)
WMA_LOGI("\tPPET present: 0x%01x", he_cap->ppet_present); WMA_LOGI("\tPPET present: 0x%01x", he_cap->ppet_present);
WMA_LOGI("\tSRP based SR-support: 0x%01x", he_cap->srp); WMA_LOGI("\tSRP based SR-support: 0x%01x", he_cap->srp);
WMA_LOGI("\tPower boost factor: 0x%01x", he_cap->power_boost); WMA_LOGI("\tPower boost factor: 0x%01x", he_cap->power_boost);
WMA_LOGI("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_gi_4x); WMA_LOGI("\t4x HE LTF support: 0x%01x", he_cap->he_ltf_800_gi_4x);
WMA_LOGI("\tHighest NSS supported: 0x%03x", he_cap->nss_supported); WMA_LOGI("\tHighest NSS supported: 0x%03x", he_cap->nss_supported);
WMA_LOGI("\tHighest MCS supported: 0x%03x", he_cap->mcs_supported); WMA_LOGI("\tHighest MCS supported: 0x%03x", he_cap->mcs_supported);
@@ -607,13 +613,16 @@ void wma_print_he_phy_cap(uint32_t *phy_cap)
WMI_HECAP_PHY_LTFGIFORHE_GET(phy_cap)); WMI_HECAP_PHY_LTFGIFORHE_GET(phy_cap));
WMA_LOGI("\tLTF and GI for NDP: 0x%02x", WMA_LOGI("\tLTF and GI for NDP: 0x%02x",
WMI_HECAP_PHY_LTFGIFORNDP_GET(phy_cap)); WMI_HECAP_PHY_LTFGIFORNDP_GET(phy_cap));
WMA_LOGI("\tSTBC Tx & Rx support: 0x%02x", WMA_LOGI("\tSTBC Tx & Rx support (BW <= 80Mhz): 0x%02x",
(WMI_HECAP_PHY_RXSTBC_GET(phy_cap) << 1) | (WMI_HECAP_PHY_RXSTBC_GET(phy_cap) << 1) |
WMI_HECAP_PHY_TXSTBC_GET(phy_cap)); WMI_HECAP_PHY_TXSTBC_GET(phy_cap));
WMA_LOGI("\tDoppler support: 0x%02x", WMA_LOGI("\tDoppler support: 0x%02x",
(WMI_HECAP_PHY_RXDOPPLER_GET(phy_cap) << 1) | (WMI_HECAP_PHY_RXDOPPLER_GET(phy_cap) << 1) |
WMI_HECAP_PHY_TXDOPPLER_GET(phy_cap)); WMI_HECAP_PHY_TXDOPPLER_GET(phy_cap));
WMA_LOGI("\tUL MU: 0x%02x", WMI_HECAP_PHY_UL_MU_MIMO_GET(phy_cap)); WMA_LOGI("\tUL MU (Full BW): 0x%01x",
WMI_HECAP_PHY_UL_MU_MIMO_GET(phy_cap));
WMA_LOGI("\tUL MU (Partial BW): 0x%01x",
WMI_HECAP_PHY_ULMUMIMOOFDMA_GET(phy_cap));
WMA_LOGI("\tDCM encoding Tx: 0x%03x", WMI_HECAP_PHY_DCMTX_GET(phy_cap)); WMA_LOGI("\tDCM encoding Tx: 0x%03x", WMI_HECAP_PHY_DCMTX_GET(phy_cap));
WMA_LOGI("\tDCM encoding Tx: 0x%03x", WMI_HECAP_PHY_DCMRX_GET(phy_cap)); WMA_LOGI("\tDCM encoding Tx: 0x%03x", WMI_HECAP_PHY_DCMRX_GET(phy_cap));
WMA_LOGI("\tHE MU PPDU payload support: 0x%01x", WMA_LOGI("\tHE MU PPDU payload support: 0x%01x",
@@ -654,6 +663,13 @@ void wma_print_he_phy_cap(uint32_t *phy_cap)
WMI_HECAP_PHY_PWRBOOSTAR_GET(phy_cap)); WMI_HECAP_PHY_PWRBOOSTAR_GET(phy_cap));
WMA_LOGI("\t4x HE LTF support: 0x%01x", WMA_LOGI("\t4x HE LTF support: 0x%01x",
WMI_HECAP_PHY_4XLTFAND800NSECSGI_GET(phy_cap)); WMI_HECAP_PHY_4XLTFAND800NSECSGI_GET(phy_cap));
WMA_LOGI("\tMax Nc supported: 0x%03x",
WMI_HECAP_PHY_MAXNC_GET(phy_cap));
WMA_LOGI("\tSTBC Tx & Rx support (BW > 80Mhz): 0x%02x",
(WMI_HECAP_PHY_STBCRXGT80_GET(phy_cap) << 1) |
WMI_HECAP_PHY_STBCTXGT80_GET(phy_cap));
WMA_LOGI("\tER 4x HE LTF support: 0x%01x",
WMI_HECAP_PHY_ERSU4X800NSECGI_GET(phy_cap));
} }
void wma_print_he_mac_cap(uint32_t mac_cap) void wma_print_he_mac_cap(uint32_t mac_cap)
@@ -710,6 +726,12 @@ void wma_print_he_mac_cap(uint32_t mac_cap)
WMA_LOGI("\tQuite Time Period support: 0x%01x", WMA_LOGI("\tQuite Time Period support: 0x%01x",
WMI_HECAP_MAC_QTP_GET(mac_cap)); WMI_HECAP_MAC_QTP_GET(mac_cap));
WMA_LOGI("\tA-BQR support: 0x%01x", WMI_HECAP_MAC_ABQR_GET(mac_cap)); WMA_LOGI("\tA-BQR support: 0x%01x", WMI_HECAP_MAC_ABQR_GET(mac_cap));
WMA_LOGI("\tSR Responder support: 0x%01x",
WMI_HECAP_MAC_SRRESP_GET(mac_cap));
WMA_LOGI("\tOPS Support: 0x%01x",
WMI_HECAP_MAC_OPS_GET(mac_cap));
WMA_LOGI("\tNDP Feedback Support: 0x%01x",
WMI_HECAP_MAC_NDPFDBKRPT_GET(mac_cap));
} }
void wma_update_target_ext_he_cap(tp_wma_handle wma_handle, void wma_update_target_ext_he_cap(tp_wma_handle wma_handle,
@@ -796,13 +818,13 @@ void wma_he_update_tgt_services(tp_wma_handle wma, struct wma_tgt_services *cfg)
void wma_print_he_op(tDot11fIEvendor_he_op *he_ops) void wma_print_he_op(tDot11fIEvendor_he_op *he_ops)
{ {
WMA_LOGI(FL("bss_color: %0x, default_pe_duration: %0x, twt_required: %0x, rts_threshold: %0x"), WMA_LOGI(FL("bss_color: %0x, default_pe_duration: %0x, twt_required: %0x, rts_threshold: %0x, vht_oper_present: %0x"),
he_ops->bss_color, he_ops->default_pe, he_ops->bss_color, he_ops->default_pe,
he_ops->twt_required, he_ops->rts_threshold); he_ops->twt_required, he_ops->rts_threshold,
WMA_LOGI(("\tpartial_bss_color: %0x, MaxBSSID Indicator: %0x, Tx BSSID Indicator: %0x, BSS color disabled: %0x, Dual beacon: %0x"), he_ops->vht_oper_present);
he_ops->partial_bss_col, he_ops->maxbssid_ind, WMA_LOGI(FL("\tpartial_bss_color: %0x, MBSSID AP: %0x, Tx BSSID Indicator: %0x, BSS color disabled: %0x"),
he_ops->tx_bssid_ind, he_ops->bss_col_disabled, he_ops->partial_bss_col, he_ops->mbssid_ap,
he_ops->dual_beacon); he_ops->tx_bssid_ind, he_ops->bss_col_disabled);
} }
/** /**
@@ -952,6 +974,10 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
WMI_HECAP_MAC_MBSS_SET(mac_cap, he_cap->rx_ctrl_frame); WMI_HECAP_MAC_MBSS_SET(mac_cap, he_cap->rx_ctrl_frame);
WMI_HECAP_MAC_BSRPAMPDU_SET(mac_cap, he_cap->bsrp_ampdu_aggr); WMI_HECAP_MAC_BSRPAMPDU_SET(mac_cap, he_cap->bsrp_ampdu_aggr);
WMI_HECAP_MAC_QTP_SET(mac_cap, he_cap->qtp); WMI_HECAP_MAC_QTP_SET(mac_cap, he_cap->qtp);
WMI_HECAP_MAC_ABQR_SET(mac_cap, he_cap->a_bqr);
WMI_HECAP_MAC_SRRESP_SET(mac_cap, he_cap->sr_responder);
WMI_HECAP_MAC_OPS_SET(mac_cap, he_cap->ops_supp);
WMI_HECAP_MAC_NDPFDBKRPT_SET(mac_cap, he_cap->ndp_feedback_supp);
peer->peer_he_cap_macinfo = mac_cap; peer->peer_he_cap_macinfo = mac_cap;
/* HE PHY capabilities */ /* HE PHY capabilities */
@@ -960,12 +986,12 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
WMI_HECAP_PHY_PREAMBLEPUNCRX_SET(phy_cap, he_cap->rx_pream_puncturing); WMI_HECAP_PHY_PREAMBLEPUNCRX_SET(phy_cap, he_cap->rx_pream_puncturing);
WMI_HECAP_PHY_COD_SET(phy_cap, he_cap->device_class); WMI_HECAP_PHY_COD_SET(phy_cap, he_cap->device_class);
WMI_HECAP_PHY_LDPC_SET(phy_cap, he_cap->ldpc_coding); WMI_HECAP_PHY_LDPC_SET(phy_cap, he_cap->ldpc_coding);
WMI_HECAP_PHY_LTFGIFORHE_SET(phy_cap, he_cap->he_ltf_gi_ppdu); WMI_HECAP_PHY_LTFGIFORHE_SET(phy_cap, he_cap->he_1x_ltf_800_gi_ppdu);
WMI_HECAP_PHY_LTFGIFORNDP_SET(phy_cap, he_cap->he_ltf_gi_ndp); WMI_HECAP_PHY_LTFGIFORNDP_SET(phy_cap, he_cap->he_4x_ltf_3200_gi_ndp);
temp = he_cap->stbc & 0x1; temp = he_cap->stbc_lt_80mhz & 0x1;
WMI_HECAP_PHY_RXSTBC_SET(phy_cap, temp); WMI_HECAP_PHY_RXSTBC_SET(phy_cap, temp);
temp = he_cap->stbc >> 0x1; temp = he_cap->stbc_lt_80mhz >> 0x1;
WMI_HECAP_PHY_TXSTBC_SET(phy_cap, temp); WMI_HECAP_PHY_TXSTBC_SET(phy_cap, temp);
temp = he_cap->doppler & 0x1; temp = he_cap->doppler & 0x1;
@@ -973,7 +999,11 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
temp = he_cap->doppler >> 0x1; temp = he_cap->doppler >> 0x1;
WMI_HECAP_PHY_TXDOPPLER_SET(phy_cap, temp); WMI_HECAP_PHY_TXDOPPLER_SET(phy_cap, temp);
WMI_HECAP_PHY_UL_MU_MIMO_SET(phy_cap, he_cap->ul_mu); temp = he_cap->ul_mu & 0x1;
WMI_HECAP_PHY_UL_MU_MIMO_SET(phy_cap, temp);
temp = he_cap->ul_mu >> 0x1;
WMI_HECAP_PHY_ULMUMIMOOFDMA_SET(phy_cap, temp);
WMI_HECAP_PHY_DCMTX_SET(phy_cap, he_cap->dcm_enc_tx); WMI_HECAP_PHY_DCMTX_SET(phy_cap, he_cap->dcm_enc_tx);
WMI_HECAP_PHY_DCMRX_SET(phy_cap, he_cap->dcm_enc_rx); WMI_HECAP_PHY_DCMRX_SET(phy_cap, he_cap->dcm_enc_rx);
WMI_HECAP_PHY_ULHEMU_SET(phy_cap, he_cap->ul_he_mu); WMI_HECAP_PHY_ULHEMU_SET(phy_cap, he_cap->ul_he_mu);
@@ -981,9 +1011,7 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
WMI_HECAP_PHY_SUBFME_SET(phy_cap, he_cap->su_beamformee); WMI_HECAP_PHY_SUBFME_SET(phy_cap, he_cap->su_beamformee);
WMI_HECAP_PHY_MUBFMR_SET(phy_cap, he_cap->mu_beamformer); WMI_HECAP_PHY_MUBFMR_SET(phy_cap, he_cap->mu_beamformer);
WMI_HECAP_PHY_BFMESTSLT80MHZ_SET(phy_cap, he_cap->bfee_sts_lt_80); WMI_HECAP_PHY_BFMESTSLT80MHZ_SET(phy_cap, he_cap->bfee_sts_lt_80);
WMI_HECAP_PHY_NSTSLT80MHZ_SET(phy_cap, he_cap->nsts_tol_lt_80); WMI_HECAP_PHY_BFMESTSGT80MHZ_SET(phy_cap, he_cap->bfee_sts_gt_80);
WMI_HECAP_PHY_BFMESTSGT80MHZ_SET(phy_cap, he_cap->bfee_sta_gt_80);
WMI_HECAP_PHY_NSTSGT80MHZ_SET(phy_cap, he_cap->nsts_tot_gt_80);
WMI_HECAP_PHY_NUMSOUNDLT80MHZ_SET(phy_cap, he_cap->num_sounding_lt_80); WMI_HECAP_PHY_NUMSOUNDLT80MHZ_SET(phy_cap, he_cap->num_sounding_lt_80);
WMI_HECAP_PHY_NUMSOUNDGT80MHZ_SET(phy_cap, he_cap->num_sounding_gt_80); WMI_HECAP_PHY_NUMSOUNDGT80MHZ_SET(phy_cap, he_cap->num_sounding_gt_80);
WMI_HECAP_PHY_NG16SUFEEDBACKLT80_SET(phy_cap, WMI_HECAP_PHY_NG16SUFEEDBACKLT80_SET(phy_cap,
@@ -999,7 +1027,16 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
WMI_HECAP_PHY_PETHRESPRESENT_SET(phy_cap, he_cap->ppet_present); WMI_HECAP_PHY_PETHRESPRESENT_SET(phy_cap, he_cap->ppet_present);
WMI_HECAP_PHY_SRPPRESENT_SET(phy_cap, he_cap->srp); WMI_HECAP_PHY_SRPPRESENT_SET(phy_cap, he_cap->srp);
WMI_HECAP_PHY_PWRBOOSTAR_SET(phy_cap, he_cap->power_boost); WMI_HECAP_PHY_PWRBOOSTAR_SET(phy_cap, he_cap->power_boost);
WMI_HECAP_PHY_4XLTFAND800NSECSGI_SET(phy_cap, he_cap->he_ltf_gi_4x); WMI_HECAP_PHY_4XLTFAND800NSECSGI_SET(phy_cap, he_cap->he_ltf_800_gi_4x);
WMI_HECAP_PHY_MAXNC_SET(phy_cap, he_cap->max_nc);
temp = he_cap->stbc_gt_80mhz & 0x1;
WMI_HECAP_PHY_STBCRXGT80_SET(phy_cap, temp);
temp = he_cap->stbc_gt_80mhz >> 0x1;
WMI_HECAP_PHY_STBCTXGT80_SET(phy_cap, temp);
WMI_HECAP_PHY_ERSU4X800NSECGI_SET(phy_cap, he_cap->er_he_ltf_800_gi_4x);
/* until further update in standard */ /* until further update in standard */
peer->peer_he_mcs_count = WMI_HOST_MAX_HE_RATE_SET; peer->peer_he_mcs_count = WMI_HOST_MAX_HE_RATE_SET;
@@ -1017,10 +1054,8 @@ void wma_populate_peer_he_cap(struct peer_assoc_params *peer,
WMI_HEOPS_TWT_SET(he_ops, he_op->twt_required); WMI_HEOPS_TWT_SET(he_ops, he_op->twt_required);
WMI_HEOPS_RTSTHLD_SET(he_ops, he_op->rts_threshold); WMI_HEOPS_RTSTHLD_SET(he_ops, he_op->rts_threshold);
WMI_HEOPS_PARTBSSCOLOR_SET(he_ops, he_op->partial_bss_col); WMI_HEOPS_PARTBSSCOLOR_SET(he_ops, he_op->partial_bss_col);
WMI_HEOPS_MAXBSSID_SET(he_ops, he_op->maxbssid_ind);
WMI_HEOPS_TXBSSID_SET(he_ops, he_op->tx_bssid_ind); WMI_HEOPS_TXBSSID_SET(he_ops, he_op->tx_bssid_ind);
WMI_HEOPS_BSSCOLORDISABLE_SET(he_ops, he_op->bss_col_disabled); WMI_HEOPS_BSSCOLORDISABLE_SET(he_ops, he_op->bss_col_disabled);
WMI_HEOPS_DUALBEACON_SET(he_ops, he_op->dual_beacon);
peer->peer_he_ops = he_ops; peer->peer_he_ops = he_ops;
wma_parse_he_ppet(&he_cap->ppe_threshold, &peer->peer_ppet); wma_parse_he_ppet(&he_cap->ppe_threshold, &peer->peer_ppet);
@@ -1047,10 +1082,8 @@ void wma_update_vdev_he_ops(struct wma_vdev_start_req *req,
WMI_HEOPS_TWT_SET(he_ops, he_op->twt_required); WMI_HEOPS_TWT_SET(he_ops, he_op->twt_required);
WMI_HEOPS_RTSTHLD_SET(he_ops, he_op->rts_threshold); WMI_HEOPS_RTSTHLD_SET(he_ops, he_op->rts_threshold);
WMI_HEOPS_PARTBSSCOLOR_SET(he_ops, he_op->partial_bss_col); WMI_HEOPS_PARTBSSCOLOR_SET(he_ops, he_op->partial_bss_col);
WMI_HEOPS_MAXBSSID_SET(he_ops, he_op->maxbssid_ind);
WMI_HEOPS_TXBSSID_SET(he_ops, he_op->tx_bssid_ind); WMI_HEOPS_TXBSSID_SET(he_ops, he_op->tx_bssid_ind);
WMI_HEOPS_BSSCOLORDISABLE_SET(he_ops, he_op->bss_col_disabled); WMI_HEOPS_BSSCOLORDISABLE_SET(he_ops, he_op->bss_col_disabled);
WMI_HEOPS_DUALBEACON_SET(he_ops, he_op->dual_beacon);
req->he_ops = he_ops; req->he_ops = he_ops;
} }