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qcacmn: Update UIO info for DP data rings

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Update UIO info for DP data rings.

Change-Id: I0c6e8c8e59aefb373dc024d91eb1379ed7564f31
CRs-Fixed: 3623839
This commit is contained in:
Himanshu Batra
2023-07-03 18:31:29 +05:30
committed by Rahul Choudhary
parent 63788401a2
commit 3efaabd704
10 changed files with 389 additions and 0 deletions
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167
dp/wifi3.0/dp_main.c
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@@ -12185,6 +12185,166 @@ update_tx_ilp:
}
#endif
#ifdef WLAN_SUPPORT_DPDK
static char *tcl_ring_name[] = {
"tcl_data_ring1",
"tcl_data_ring2",
"tcl_data_ring3",
"tcl_data_ring4",
"tcl_data_ring5",
};
static char *tcl_comp_ring_name[] = {
"tcl_comp_ring1",
"tcl_comp_ring2",
"tcl_comp_ring3",
"tcl_comp_ring4",
"tcl_comp_ring5",
};
static char *reo_dest_ring_name[] = {
"reo_dest_ring1",
"reo_dest_ring2",
"reo_dest_ring3",
"reo_dest_ring4",
"reo_dest_ring5",
"reo_dest_ring6",
"reo_dest_ring7",
"reo_dest_ring8",
};
static void dp_dpdk_get_ring_info(struct cdp_soc_t *soc_hdl,
qdf_uio_info_t *uio_info)
{
struct dp_soc *soc = (struct dp_soc *)soc_hdl;
struct hal_soc *hal_soc = (struct hal_soc *)soc->hal_soc;
struct hal_srng *hal_srng;
uint8_t idx = 1, i;
/* WBM Desc Release Ring */
hal_srng = (struct hal_srng *)
soc->tcl_data_ring[0].hal_srng;
hal_srng = (struct hal_srng *)
soc->wbm_desc_rel_ring.hal_srng;
uio_info->mem[idx].name = "wbm_desc_rel_ring";
uio_info->mem[idx].addr = (unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
/* WBM Idle Link Ring */
hal_srng = (struct hal_srng *)
soc->wbm_idle_link_ring.hal_srng;
uio_info->mem[idx].name = "wbm_idle_link_ring";
uio_info->mem[idx].addr = (unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
/* TCL Data Rings */
for (i = 0; i < soc->num_tcl_data_rings; i++) {
hal_srng = (struct hal_srng *)
soc->tcl_data_ring[i].hal_srng;
uio_info->mem[idx].name = tcl_ring_name[i];
uio_info->mem[idx].addr =
(unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
}
/* TCL Completion Rings */
for (i = 0; i < soc->num_tcl_data_rings; i++) {
hal_srng = (struct hal_srng *)
soc->tx_comp_ring[i].hal_srng;
uio_info->mem[idx].name = tcl_comp_ring_name[i];
uio_info->mem[idx].addr =
(unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
}
/* Reo Dest Rings */
for (i = 0; i < soc->num_reo_dest_rings; i++) {
hal_srng = (struct hal_srng *)
soc->reo_dest_ring[i].hal_srng;
uio_info->mem[idx].name = reo_dest_ring_name[i];
uio_info->mem[idx].addr =
(unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
}
/* RXDMA Refill Ring */
hal_srng = (struct hal_srng *)
soc->rx_refill_buf_ring[0].hal_srng;
uio_info->mem[idx].name = "rxdma_buf_ring";
uio_info->mem[idx].addr = (unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
/* REO Exception Ring */
hal_srng = (struct hal_srng *)
soc->reo_exception_ring.hal_srng;
uio_info->mem[idx].name = "reo_exception_ring";
uio_info->mem[idx].addr =
(unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
/* RX Release Ring */
hal_srng = (struct hal_srng *)
soc->rx_rel_ring.hal_srng;
uio_info->mem[idx].name = "rx_release_ring";
uio_info->mem[idx].addr = (unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
/* Reo Reinject Ring */
hal_srng = (struct hal_srng *)
soc->reo_reinject_ring.hal_srng;
uio_info->mem[idx].name = "reo_reinject_ring";
uio_info->mem[idx].addr =
(unsigned long)hal_srng->ring_base_paddr;
uio_info->mem[idx].size =
(hal_srng->num_entries * hal_srng->entry_size) << 2;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
/* Shadow Write Pointer for LMAC Ring */
uio_info->mem[idx].name = "lmac_shadow_wrptr";
uio_info->mem[idx].addr =
(unsigned long)hal_soc->shadow_wrptr_mem_paddr;
uio_info->mem[idx].size =
sizeof(*(hal_soc->shadow_wrptr_mem_vaddr)) * HAL_MAX_LMAC_RINGS;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
idx++;
/* Shadow Write Pointer for LMAC Ring */
uio_info->mem[idx].name = "lmac_shadow_rdptr";
uio_info->mem[idx].addr =
(unsigned long)hal_soc->shadow_rdptr_mem_paddr;
uio_info->mem[idx].size =
sizeof(*(hal_soc->shadow_rdptr_mem_vaddr)) * HAL_SRNG_ID_MAX;
uio_info->mem[idx].memtype = UIO_MEM_PHYS;
}
#endif
static struct cdp_cmn_ops dp_ops_cmn = {
.txrx_soc_attach_target = dp_soc_attach_target_wifi3,
.txrx_vdev_attach = dp_vdev_attach_wifi3,
@@ -12321,6 +12481,9 @@ static struct cdp_cmn_ops dp_ops_cmn = {
#ifdef WLAN_SUPPORT_RX_FISA
.get_fst_cmem_base = dp_rx_fisa_get_cmem_base,
#endif
#ifdef WLAN_SUPPORT_DPDK
.dpdk_get_ring_info = dp_dpdk_get_ring_info,
#endif
};
static struct cdp_ctrl_ops dp_ops_ctrl = {
@@ -14375,6 +14538,10 @@ static QDF_STATUS dp_pdev_init(struct cdp_soc_t *txrx_soc,
dp_soc_reset_intr_mask(soc);
}
/* Reset the ring interrupt mask if DPDK is enabled */
if (wlan_cfg_get_dp_soc_dpdk_cfg(soc->ctrl_psoc)) {
dp_soc_reset_dpdk_intr_mask(soc);
}
/* Reset the cpu ring map if radio is NSS offloaded */
dp_soc_reset_ipa_vlan_intr_mask(soc);