qcacmn: Update REO Remap config API as platform specific

Update REO Remap config API as platform specific

Change-Id: I6a38b87e9181e8bc939e49e3eb55fcd6cace626d
This commit is contained in:
Sridhar Selvaraj
2020-06-12 09:13:52 +05:30
committed by nshrivas
parent 9056ed8685
commit 3ae6b5c3fe
11 changed files with 417 additions and 74 deletions

View File

@@ -2927,24 +2927,10 @@ static void dp_soc_reset_intr_mask(struct dp_soc *soc)
*/
bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1, uint32_t *remap2)
{
*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 23);
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW3, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 31);
uint32_t ring[4] = {REO_REMAP_SW1, REO_REMAP_SW2,
REO_REMAP_SW3};
hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
3, remap1, remap2);
dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
return true;
@@ -2985,66 +2971,33 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
{
uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
uint8_t target_type;
uint32_t ring[4];
target_type = hal_get_target_type(soc->hal_soc);
switch (offload_radio) {
case dp_nss_cfg_default:
*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 23);
ring[0] = REO_REMAP_SW1;
ring[1] = REO_REMAP_SW2;
ring[2] = REO_REMAP_SW3;
ring[3] = REO_REMAP_SW4;
hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
4, remap1, remap2);
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW1, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 31);
break;
case dp_nss_cfg_first_radio:
*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW2, 16) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 23);
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW4, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 31);
ring[0] = REO_REMAP_SW2;
ring[1] = REO_REMAP_SW3;
ring[2] = REO_REMAP_SW4;
hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
3, remap1, remap2);
break;
case dp_nss_cfg_second_radio:
*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 23);
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW4, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 31);
ring[0] = REO_REMAP_SW1;
ring[1] = REO_REMAP_SW3;
ring[2] = REO_REMAP_SW4;
hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
3, remap1, remap2);
break;
case dp_nss_cfg_dbdc:

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@@ -2027,6 +2027,17 @@ static inline void hal_reo_setup(hal_soc_handle_t hal_soc_hdl,
hal_soc->ops->hal_reo_setup(hal_soc, reoparams);
}
static inline
void hal_compute_reo_remap_ix2_ix3(hal_soc_handle_t hal_soc_hdl,
uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
return hal_soc->ops->hal_compute_reo_remap_ix2_ix3(ring,
num_rings, remap1, remap2);
}
/**
* hal_setup_link_idle_list - Setup scattered idle list using the
* buffer list provided

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@@ -605,6 +605,10 @@ struct hal_hw_txrx_ops {
void * (*hal_rx_flow_setup_fse)(uint8_t *rx_fst,
uint32_t table_offset,
uint8_t *rx_flow);
void (*hal_compute_reo_remap_ix2_ix3)(uint32_t *ring,
uint32_t num_rings,
uint32_t *remap1,
uint32_t *remap2);
};
/**

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@@ -217,6 +217,52 @@ uint8_t hal_rx_mpdu_start_tlv_tag_valid_5018(void *rx_tlv_hdr)
return tlv_tag == WIFIRX_MPDU_START_E ? true : false;
}
static
void hal_compute_reo_remap_ix2_ix3_5018(uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
switch (num_rings) {
case 3:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[0], 19) |
HAL_REO_REMAP_IX2(ring[1], 20) |
HAL_REO_REMAP_IX2(ring[2], 21) |
HAL_REO_REMAP_IX2(ring[0], 22) |
HAL_REO_REMAP_IX2(ring[1], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
HAL_REO_REMAP_IX3(ring[0], 25) |
HAL_REO_REMAP_IX3(ring[1], 26) |
HAL_REO_REMAP_IX3(ring[2], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[0], 31);
break;
case 4:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[3], 19) |
HAL_REO_REMAP_IX2(ring[0], 20) |
HAL_REO_REMAP_IX2(ring[1], 21) |
HAL_REO_REMAP_IX2(ring[2], 22) |
HAL_REO_REMAP_IX2(ring[3], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
HAL_REO_REMAP_IX3(ring[1], 25) |
HAL_REO_REMAP_IX3(ring[2], 26) |
HAL_REO_REMAP_IX3(ring[3], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[3], 31);
break;
}
}
/**
* hal_rx_proc_phyrx_other_receive_info_tlv_5018(): API to get tlv info
*
@@ -1616,6 +1662,7 @@ struct hal_hw_txrx_ops qca5018_hal_hw_txrx_ops = {
hal_rx_mpdu_start_offset_get_generic,
hal_rx_mpdu_end_offset_get_generic,
hal_rx_flow_setup_fse_5018,
hal_compute_reo_remap_ix2_ix3_5018
};
struct hal_hw_srng_config hw_srng_table_5018[] = {

View File

@@ -992,6 +992,52 @@ static inline qdf_iomem_t hal_get_window_address_6290(struct hal_soc *hal_soc,
return addr;
}
static
void hal_compute_reo_remap_ix2_ix3_6290(uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
switch (num_rings) {
case 3:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[0], 19) |
HAL_REO_REMAP_IX2(ring[1], 20) |
HAL_REO_REMAP_IX2(ring[2], 21) |
HAL_REO_REMAP_IX2(ring[0], 22) |
HAL_REO_REMAP_IX2(ring[1], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
HAL_REO_REMAP_IX3(ring[0], 25) |
HAL_REO_REMAP_IX3(ring[1], 26) |
HAL_REO_REMAP_IX3(ring[2], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[0], 31);
break;
case 4:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[3], 19) |
HAL_REO_REMAP_IX2(ring[0], 20) |
HAL_REO_REMAP_IX2(ring[1], 21) |
HAL_REO_REMAP_IX2(ring[2], 22) |
HAL_REO_REMAP_IX2(ring[3], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
HAL_REO_REMAP_IX3(ring[1], 25) |
HAL_REO_REMAP_IX3(ring[2], 26) |
HAL_REO_REMAP_IX3(ring[3], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[3], 31);
break;
}
}
struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
/* init and setup */
hal_srng_dst_hw_init_generic,
@@ -1101,7 +1147,8 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
hal_rx_msdu_start_offset_get_generic,
hal_rx_mpdu_start_offset_get_generic,
hal_rx_mpdu_end_offset_get_generic,
NULL
NULL,
hal_compute_reo_remap_ix2_ix3_6290
};
struct hal_hw_srng_config hw_srng_table_6290[] = {

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@@ -1044,6 +1044,52 @@ hal_reo_set_err_dst_remap_6390(void *hal_soc)
SEQ_WCSS_UMAC_REO_REG_OFFSET)));
}
static
void hal_compute_reo_remap_ix2_ix3_6390(uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
switch (num_rings) {
case 3:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[0], 19) |
HAL_REO_REMAP_IX2(ring[1], 20) |
HAL_REO_REMAP_IX2(ring[2], 21) |
HAL_REO_REMAP_IX2(ring[0], 22) |
HAL_REO_REMAP_IX2(ring[1], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
HAL_REO_REMAP_IX3(ring[0], 25) |
HAL_REO_REMAP_IX3(ring[1], 26) |
HAL_REO_REMAP_IX3(ring[2], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[0], 31);
break;
case 4:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[3], 19) |
HAL_REO_REMAP_IX2(ring[0], 20) |
HAL_REO_REMAP_IX2(ring[1], 21) |
HAL_REO_REMAP_IX2(ring[2], 22) |
HAL_REO_REMAP_IX2(ring[3], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
HAL_REO_REMAP_IX3(ring[1], 25) |
HAL_REO_REMAP_IX3(ring[2], 26) |
HAL_REO_REMAP_IX3(ring[3], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[3], 31);
break;
}
}
struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
/* init and setup */
hal_srng_dst_hw_init_generic,
@@ -1154,7 +1200,8 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
hal_rx_msdu_start_offset_get_generic,
hal_rx_mpdu_start_offset_get_generic,
hal_rx_mpdu_end_offset_get_generic,
NULL
NULL,
hal_compute_reo_remap_ix2_ix3_6390
};
struct hal_hw_srng_config hw_srng_table_6390[] = {

View File

@@ -1582,6 +1582,52 @@ hal_rx_flow_setup_fse_6490(uint8_t *rx_fst, uint32_t table_offset,
return fse;
}
static
void hal_compute_reo_remap_ix2_ix3_6490(uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
switch (num_rings) {
case 3:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[0], 19) |
HAL_REO_REMAP_IX2(ring[1], 20) |
HAL_REO_REMAP_IX2(ring[2], 21) |
HAL_REO_REMAP_IX2(ring[0], 22) |
HAL_REO_REMAP_IX2(ring[1], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
HAL_REO_REMAP_IX3(ring[0], 25) |
HAL_REO_REMAP_IX3(ring[1], 26) |
HAL_REO_REMAP_IX3(ring[2], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[0], 31);
break;
case 4:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[3], 19) |
HAL_REO_REMAP_IX2(ring[0], 20) |
HAL_REO_REMAP_IX2(ring[1], 21) |
HAL_REO_REMAP_IX2(ring[2], 22) |
HAL_REO_REMAP_IX2(ring[3], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
HAL_REO_REMAP_IX3(ring[1], 25) |
HAL_REO_REMAP_IX3(ring[2], 26) |
HAL_REO_REMAP_IX3(ring[3], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[3], 31);
break;
}
}
struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
/* init and setup */
hal_srng_dst_hw_init_generic,
@@ -1698,7 +1744,8 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
hal_rx_msdu_start_offset_get_generic,
hal_rx_mpdu_start_offset_get_generic,
hal_rx_mpdu_end_offset_get_generic,
hal_rx_flow_setup_fse_6490
hal_rx_flow_setup_fse_6490,
hal_compute_reo_remap_ix2_ix3_6490
};
struct hal_hw_srng_config hw_srng_table_6490[] = {

View File

@@ -1606,6 +1606,52 @@ hal_rx_flow_setup_fse_6750(uint8_t *rx_fst, uint32_t table_offset,
return fse;
}
static
void hal_compute_reo_remap_ix2_ix3_6750(uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
switch (num_rings) {
case 3:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[0], 19) |
HAL_REO_REMAP_IX2(ring[1], 20) |
HAL_REO_REMAP_IX2(ring[2], 21) |
HAL_REO_REMAP_IX2(ring[0], 22) |
HAL_REO_REMAP_IX2(ring[1], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
HAL_REO_REMAP_IX3(ring[0], 25) |
HAL_REO_REMAP_IX3(ring[1], 26) |
HAL_REO_REMAP_IX3(ring[2], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[0], 31);
break;
case 4:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[3], 19) |
HAL_REO_REMAP_IX2(ring[0], 20) |
HAL_REO_REMAP_IX2(ring[1], 21) |
HAL_REO_REMAP_IX2(ring[2], 22) |
HAL_REO_REMAP_IX2(ring[3], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
HAL_REO_REMAP_IX3(ring[1], 25) |
HAL_REO_REMAP_IX3(ring[2], 26) |
HAL_REO_REMAP_IX3(ring[3], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[3], 31);
break;
}
}
struct hal_hw_txrx_ops qca6750_hal_hw_txrx_ops = {
/* init and setup */
hal_srng_dst_hw_init_generic,
@@ -1722,7 +1768,8 @@ struct hal_hw_txrx_ops qca6750_hal_hw_txrx_ops = {
hal_rx_msdu_start_offset_get_generic,
hal_rx_mpdu_start_offset_get_generic,
hal_rx_mpdu_end_offset_get_generic,
hal_rx_flow_setup_fse_6750
hal_rx_flow_setup_fse_6750,
hal_compute_reo_remap_ix2_ix3_6750
};
struct hal_hw_srng_config hw_srng_table_6750[] = {

View File

@@ -1128,6 +1128,52 @@ hal_rx_flow_setup_fse_8074v1(uint8_t *rx_fst, uint32_t table_offset,
return fse;
}
static
void hal_compute_reo_remap_ix2_ix3_8074v1(uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
switch (num_rings) {
case 3:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[0], 19) |
HAL_REO_REMAP_IX2(ring[1], 20) |
HAL_REO_REMAP_IX2(ring[2], 21) |
HAL_REO_REMAP_IX2(ring[0], 22) |
HAL_REO_REMAP_IX2(ring[1], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
HAL_REO_REMAP_IX3(ring[0], 25) |
HAL_REO_REMAP_IX3(ring[1], 26) |
HAL_REO_REMAP_IX3(ring[2], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[0], 31);
break;
case 4:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[3], 19) |
HAL_REO_REMAP_IX2(ring[0], 20) |
HAL_REO_REMAP_IX2(ring[1], 21) |
HAL_REO_REMAP_IX2(ring[2], 22) |
HAL_REO_REMAP_IX2(ring[3], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
HAL_REO_REMAP_IX3(ring[1], 25) |
HAL_REO_REMAP_IX3(ring[2], 26) |
HAL_REO_REMAP_IX3(ring[3], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[3], 31);
break;
}
}
struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
/* init and setup */
@@ -1239,7 +1285,8 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
hal_rx_msdu_start_offset_get_generic,
hal_rx_mpdu_start_offset_get_generic,
hal_rx_mpdu_end_offset_get_generic,
hal_rx_flow_setup_fse_8074v1
hal_rx_flow_setup_fse_8074v1,
hal_compute_reo_remap_ix2_ix3_8074v1
};
struct hal_hw_srng_config hw_srng_table_8074[] = {

View File

@@ -1125,6 +1125,52 @@ hal_rx_flow_setup_fse_8074v2(uint8_t *rx_fst, uint32_t table_offset,
return fse;
}
static
void hal_compute_reo_remap_ix2_ix3_8074v2(uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
switch (num_rings) {
case 3:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[0], 19) |
HAL_REO_REMAP_IX2(ring[1], 20) |
HAL_REO_REMAP_IX2(ring[2], 21) |
HAL_REO_REMAP_IX2(ring[0], 22) |
HAL_REO_REMAP_IX2(ring[1], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
HAL_REO_REMAP_IX3(ring[0], 25) |
HAL_REO_REMAP_IX3(ring[1], 26) |
HAL_REO_REMAP_IX3(ring[2], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[0], 31);
break;
case 4:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[3], 19) |
HAL_REO_REMAP_IX2(ring[0], 20) |
HAL_REO_REMAP_IX2(ring[1], 21) |
HAL_REO_REMAP_IX2(ring[2], 22) |
HAL_REO_REMAP_IX2(ring[3], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
HAL_REO_REMAP_IX3(ring[1], 25) |
HAL_REO_REMAP_IX3(ring[2], 26) |
HAL_REO_REMAP_IX3(ring[3], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[3], 31);
break;
}
}
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
/* init and setup */
@@ -1242,7 +1288,8 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
hal_rx_msdu_start_offset_get_generic,
hal_rx_mpdu_start_offset_get_generic,
hal_rx_mpdu_end_offset_get_generic,
hal_rx_flow_setup_fse_8074v2
hal_rx_flow_setup_fse_8074v2,
hal_compute_reo_remap_ix2_ix3_8074v2
};
struct hal_hw_srng_config hw_srng_table_8074v2[] = {

View File

@@ -1579,6 +1579,51 @@ hal_rx_flow_setup_fse_9000(uint8_t *rx_fst, uint32_t table_offset,
return fse;
}
static
void hal_compute_reo_remap_ix2_ix3_9000(uint32_t *ring, uint32_t num_rings,
uint32_t *remap1, uint32_t *remap2)
{
switch (num_rings) {
case 3:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[0], 19) |
HAL_REO_REMAP_IX2(ring[1], 20) |
HAL_REO_REMAP_IX2(ring[2], 21) |
HAL_REO_REMAP_IX2(ring[0], 22) |
HAL_REO_REMAP_IX2(ring[1], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
HAL_REO_REMAP_IX3(ring[0], 25) |
HAL_REO_REMAP_IX3(ring[1], 26) |
HAL_REO_REMAP_IX3(ring[2], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[0], 31);
break;
case 4:
*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
HAL_REO_REMAP_IX2(ring[1], 17) |
HAL_REO_REMAP_IX2(ring[2], 18) |
HAL_REO_REMAP_IX2(ring[3], 19) |
HAL_REO_REMAP_IX2(ring[0], 20) |
HAL_REO_REMAP_IX2(ring[1], 21) |
HAL_REO_REMAP_IX2(ring[2], 22) |
HAL_REO_REMAP_IX2(ring[3], 23);
*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
HAL_REO_REMAP_IX3(ring[1], 25) |
HAL_REO_REMAP_IX3(ring[2], 26) |
HAL_REO_REMAP_IX3(ring[3], 27) |
HAL_REO_REMAP_IX3(ring[0], 28) |
HAL_REO_REMAP_IX3(ring[1], 29) |
HAL_REO_REMAP_IX3(ring[2], 30) |
HAL_REO_REMAP_IX3(ring[3], 31);
break;
}
}
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
/* init and setup */
@@ -1691,6 +1736,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
hal_rx_mpdu_start_offset_get_generic,
hal_rx_mpdu_end_offset_get_generic,
hal_rx_flow_setup_fse_9000,
hal_compute_reo_remap_ix2_ix3_9000
};
struct hal_hw_srng_config hw_srng_table_9000[] = {