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@@ -48,7 +48,8 @@
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#endif
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#endif
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#endif /* QCA_TX_HTT2_SUPPORT */
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#endif /* QCA_TX_HTT2_SUPPORT */
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-/* Set the base misclist size to the size of the htt tx copy engine
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+/*
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+ * Set the base misclist size to the size of the htt tx copy engine
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* to guarantee that a packet on the misclist wont be freed while it
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* to guarantee that a packet on the misclist wont be freed while it
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* is sitting in the copy engine.
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* is sitting in the copy engine.
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*/
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*/
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@@ -120,17 +121,21 @@ struct htt_rx_hash_bucket {
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#endif
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#endif
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};
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};
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-/* IPA micro controller
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- wlan host driver
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- firmware shared memory structure */
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+/*
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+ * IPA micro controller
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+ * wlan host driver
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+ * firmware shared memory structure
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+ */
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struct uc_shared_mem_t {
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struct uc_shared_mem_t {
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uint32_t *vaddr;
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uint32_t *vaddr;
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qdf_dma_addr_t paddr;
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qdf_dma_addr_t paddr;
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qdf_dma_mem_context(memctx);
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qdf_dma_mem_context(memctx);
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};
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};
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-/* Micro controller datapath offload
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- * WLAN TX resources */
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+/*
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+ * Micro controller datapath offload
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+ * WLAN TX resources
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+ */
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struct htt_ipa_uc_tx_resource_t {
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struct htt_ipa_uc_tx_resource_t {
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struct uc_shared_mem_t tx_ce_idx;
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struct uc_shared_mem_t tx_ce_idx;
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struct uc_shared_mem_t tx_comp_base;
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struct uc_shared_mem_t tx_comp_base;
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@@ -207,19 +212,19 @@ struct msdu_ext_desc_t {
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struct qdf_tso_flags_t tso_flags;
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struct qdf_tso_flags_t tso_flags;
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struct msdu_ext_frag_desc frags[6];
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struct msdu_ext_frag_desc frags[6];
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/*
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/*
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- u_int32_t frag_ptr0;
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- u_int32_t frag_len0;
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- u_int32_t frag_ptr1;
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- u_int32_t frag_len1;
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- u_int32_t frag_ptr2;
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- u_int32_t frag_len2;
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- u_int32_t frag_ptr3;
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- u_int32_t frag_len3;
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- u_int32_t frag_ptr4;
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- u_int32_t frag_len4;
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- u_int32_t frag_ptr5;
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- u_int32_t frag_len5;
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-*/
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+ * u_int32_t frag_ptr0;
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+ * u_int32_t frag_len0;
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+ * u_int32_t frag_ptr1;
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+ * u_int32_t frag_len1;
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+ * u_int32_t frag_ptr2;
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+ * u_int32_t frag_len2;
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+ * u_int32_t frag_ptr3;
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+ * u_int32_t frag_len3;
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+ * u_int32_t frag_ptr4;
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+ * u_int32_t frag_len4;
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+ * u_int32_t frag_ptr5;
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+ * u_int32_t frag_len5;
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+ */
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};
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};
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#endif /* defined(HELIUMPLUS) */
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#endif /* defined(HELIUMPLUS) */
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@@ -298,8 +303,8 @@ struct htt_pdev_t {
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* than a CPU address.
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* than a CPU address.
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*/
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*/
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qdf_dma_addr_t base_paddr;
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qdf_dma_addr_t base_paddr;
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- int32_t size; /* how many elems in the ring (power of 2) */
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- uint32_t size_mask; /* size - 1, at least 16 bits long */
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+ int32_t size; /* how many elems in the ring (power of 2) */
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+ uint32_t size_mask; /* size - 1, at least 16 bits long */
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int fill_level; /* how many rx buffers to keep in the ring */
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int fill_level; /* how many rx buffers to keep in the ring */
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int fill_cnt; /* # of rx buffers (full+empty) in the ring */
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int fill_cnt; /* # of rx buffers (full+empty) in the ring */
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@@ -334,11 +339,13 @@ struct htt_pdev_t {
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qdf_dma_mem_context(memctx);
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qdf_dma_mem_context(memctx);
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} alloc_idx;
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} alloc_idx;
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- /* sw_rd_idx -
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- * where HTT SW has processed bufs filled by rx MAC DMA */
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+ /*
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+ * sw_rd_idx -
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+ * where HTT SW has processed bufs filled by rx MAC DMA
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+ */
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struct {
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struct {
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- unsigned msdu_desc;
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- unsigned msdu_payld;
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+ unsigned int msdu_desc;
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+ unsigned int msdu_payld;
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} sw_rd_idx;
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} sw_rd_idx;
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/*
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/*
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