samsung-sm8650/android_kernel_samsung_sm8650-modules
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

disp: msm: sde: add support for CTL done irq

Browse Source 
From Kalama, the HW scheduler abstracts the low level
PP_DONE/WB_DONE interrupts and generates a common
CTL_DONE interrupt per hw ctl. This saves the software
the irq latency delays to process the frame complete
operations when multiple encoders are involved.

If supported, this change enables and waits for the
CTL_DONE interrupt instead of PP_DONE and WB_DONE.

This change adds support to wait for CTL_DONE irq in
only command mode panels as we don't drive two WB blocks
with single CTL.

Change-Id: I084d6bfb6a9fb0b48f912fe5787401c460ec5b56
Signed-off-by: Jeykumar Sankaran <quic_jeykumar@quicinc.com>
This commit is contained in:
Jeykumar Sankaran
2021-06-15 21:25:08 -07:00
parent 4df7bb68dc
commit 39e7775bff
8 changed files with 129 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
msm/sde/sde_hw_interrupts.c
View File

@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
*/
@@ -91,6 +92,16 @@
#define SDE_INTR_CTL_4_START BIT(13)
#define SDE_INTR_CTL_5_START BIT(23)
/**
* Ctl done interrupt status bit definitions
*/
#define SDE_INTR_CTL_0_DONE BIT(0)
#define SDE_INTR_CTL_1_DONE BIT(1)
#define SDE_INTR_CTL_2_DONE BIT(2)
#define SDE_INTR_CTL_3_DONE BIT(3)
#define SDE_INTR_CTL_4_DONE BIT(4)
#define SDE_INTR_CTL_5_DONE BIT(5)
/**
* Concurrent WB overflow interrupt status bit definitions
*/
@@ -283,6 +294,19 @@ static struct sde_irq_type sde_irq_intr2_map[] = {
{ SDE_IRQ_TYPE_CTL_START, CTL_5,
SDE_INTR_CTL_5_START, -1},
{ SDE_IRQ_TYPE_CTL_DONE, CTL_0,
SDE_INTR_CTL_0_DONE, -1},
{ SDE_IRQ_TYPE_CTL_DONE, CTL_1,
SDE_INTR_CTL_1_DONE, -1},
{ SDE_IRQ_TYPE_CTL_DONE, CTL_2,
SDE_INTR_CTL_2_DONE, -1},
{ SDE_IRQ_TYPE_CTL_DONE, CTL_3,
SDE_INTR_CTL_3_DONE, -1},
{ SDE_IRQ_TYPE_CTL_DONE, CTL_4,
SDE_INTR_CTL_4_DONE, -1},
{ SDE_IRQ_TYPE_CTL_DONE, CTL_5,
SDE_INTR_CTL_5_DONE, -1},
{ SDE_IRQ_TYPE_CWB_OVERFLOW, PINGPONG_CWB_0, SDE_INTR_CWB_OVERFLOW, -1},
{ SDE_IRQ_TYPE_PING_PONG_COMP, PINGPONG_4,