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disp: msm: update sde rscc mode2 sequence

NRT path is not used for rsc enabled targets
which support inline rotation. Add changes
for rscc mode2 sequence to avoid NRT fetch
halt request and ack.

Change-Id: I60cbfa5fe1c712d1815cc689a7fd17cb99908f31
Signed-off-by: Jayaprakash <[email protected]>
Jayaprakash 5 years ago
parent
commit
37922f4e5e
1 changed files with 4 additions and 4 deletions
  1. 4 4
      msm/sde_rsc_hw_v3.c

+ 4 - 4
msm/sde_rsc_hw_v3.c

@@ -108,13 +108,13 @@ static int _rsc_hw_seq_memory_init_v3(struct sde_rsc_priv *rsc)
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x18,
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x18,
 						0xbdf9b9a0, rsc->debug_mode);
 						0xbdf9b9a0, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x1c,
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x1c,
-						0x38999afe, rsc->debug_mode);
+						0xa13899fe, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x20,
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x20,
-						0xac81e1a1, rsc->debug_mode);
+						0xe0ac81e1, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x24,
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x24,
-						0x82e2a2e0, rsc->debug_mode);
+						0x3982e2a2, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x28,
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x28,
-						0x8cfd9d39, rsc->debug_mode);
+						0x208cfd9d, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x2c,
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x2c,
 						0x20202020, rsc->debug_mode);
 						0x20202020, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x30,
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x30,