qcacmn: Add hal_rx_get_rx_sequence API

Add hal_rx_get_rx_sequence API to retrieve
rx sequence value based on the chipset.

Change-Id: I8377b96dfe04e9695a183482d9fcc4a804f845e0
CRs-Fixed: 2522133

hal/wifi3.0/qca6490/hal_6490.c

@@ -1275,10 +1275,20 @@ hal_rx_tlv_get_tcp_chksum_6490(uint8_t *buf)
 	return HAL_RX_TLV_GET_TCP_CHKSUM(buf);
 }
 
-struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
-	/* tx */
-	/* rx */
-};
+/**
+ * hal_rx_get_rx_sequence_6490(): Function to retrieve rx sequence number
+ *
+ * @nbuf: Network buffer
+ * Returns: rx sequence number
+ */
+static
+uint16_t hal_rx_get_rx_sequence_6490(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
+	struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
+
+	return HAL_RX_MPDU_GET_SEQUENCE_NUMBER(rx_mpdu_info);
+}
 
 struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
 	/* init and setup */
@@ -1325,6 +1335,7 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
 	hal_rx_get_rx_fragment_number_6490,
 	hal_rx_msdu_end_da_is_mcbc_get_6490,
 	hal_rx_msdu_end_sa_is_valid_get_6490,
+	hal_rx_msdu_end_sa_idx_get_6490,
 	hal_rx_desc_is_first_msdu_6490,
 	hal_rx_msdu_end_l3_hdr_padding_get_6490,
 	hal_rx_encryption_info_valid_6490,
@@ -1364,6 +1375,7 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
 	hal_rx_msdu_cce_metadata_get_6490,
 	NULL,
 	hal_rx_tlv_get_tcp_chksum_6490,
+	hal_rx_get_rx_sequence_6490,
 };
 
 struct hal_hw_srng_config hw_srng_table_6490[] = {

hal/wifi3.0/qca6490/hal_6490_rx.h

@@ -350,3 +350,4 @@ RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
 			 RX_MSDU_END_10_TCP_UDP_CHKSUM_OFFSET)), \
 		RX_MSDU_END_10_TCP_UDP_CHKSUM_MASK, \
 		RX_MSDU_END_10_TCP_UDP_CHKSUM_LSB))
+#endif

hal/wifi3.0/qca6490/hal_6490_tx.h

@@ -164,20 +164,3 @@ static void hal_tx_desc_set_lmac_id_6490(void *desc, uint8_t lmac_id)
 	HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |=
 		HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id);
 }
-
-/**
- * hal_tx_desc_set_mesh_en - Set mesh_enable flag in Tx descriptor
- * @desc: Handle to Tx Descriptor
- * @en:   For raw WiFi frames, this indicates transmission to a mesh STA,
- *        enabling the interpretation of the 'Mesh Control Present' bit
- *        (bit 8) of QoS Control (otherwise this bit is ignored),
- *        For native WiFi frames, this indicates that a 'Mesh Control' field
- *        is present between the header and the LLC.
- *
- * Return: void
- */
-inline void hal_tx_desc_set_mesh_en(void *desc, uint8_t en)
-{
-	HAL_SET_FLD(desc, TCL_DATA_CMD_5, MESH_ENABLE) |=
-		HAL_TX_SM(TCL_DATA_CMD_5, MESH_ENABLE, en);
-}