qcacmn: Add dp_tx_desc_limits ini config

Add dp_tx_desc_limit for 5G high, 2G and 5G low to limit the
number of software tx_desc to be allocated.

Change-Id: If97e858b73aafaed0e21fc8f6e0337e467ce0ecc

dp/wifi3.0/dp_stats.c

@@ -4481,6 +4481,12 @@ void dp_print_soc_cfg_params(struct dp_soc *soc)
 		       soc_cfg_ctx->reo_status_ring);
 	DP_PRINT_STATS("RXDMA refill ring: %u ",
 		       soc_cfg_ctx->rxdma_refill_ring);
+	DP_PRINT_STATS("TX_desc limit_0: %u ",
+		       soc_cfg_ctx->tx_desc_limit_0);
+	DP_PRINT_STATS("TX_desc limit_1: %u ",
+		       soc_cfg_ctx->tx_desc_limit_1);
+	DP_PRINT_STATS("TX_desc limit_2: %u ",
+		       soc_cfg_ctx->tx_desc_limit_2);
 	DP_PRINT_STATS("RXDMA err dst ring: %u ",
 		       soc_cfg_ctx->rxdma_err_dst_ring);
 }

wlan_cfg/cfg_dp.h

@@ -237,6 +237,18 @@
 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16
 #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096
 
+#define WLAN_CFG_TX_DESC_LIMIT_0 0
+#define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096
+#define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768
+
+#define WLAN_CFG_TX_DESC_LIMIT_1 0
+#define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096
+#define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768
+
+#define WLAN_CFG_TX_DESC_LIMIT_2 0
+#define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096
+#define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768
+
 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16
 #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192
@@ -550,6 +562,27 @@
 		WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
 		CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
 
+#define CFG_DP_TX_DESC_LIMIT_0 \
+		CFG_INI_UINT("dp_tx_desc_limit_0", \
+		WLAN_CFG_TX_DESC_LIMIT_0_MIN, \
+		WLAN_CFG_TX_DESC_LIMIT_0_MAX, \
+		WLAN_CFG_TX_DESC_LIMIT_0, \
+		CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0")
+
+#define CFG_DP_TX_DESC_LIMIT_1 \
+		CFG_INI_UINT("dp_tx_desc_limit_1", \
+		WLAN_CFG_TX_DESC_LIMIT_1_MIN, \
+		WLAN_CFG_TX_DESC_LIMIT_1_MAX, \
+		WLAN_CFG_TX_DESC_LIMIT_1, \
+		CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1")
+
+#define CFG_DP_TX_DESC_LIMIT_2 \
+		CFG_INI_UINT("dp_tx_desc_limit_2", \
+		WLAN_CFG_TX_DESC_LIMIT_2_MIN, \
+		WLAN_CFG_TX_DESC_LIMIT_2_MAX, \
+		WLAN_CFG_TX_DESC_LIMIT_2, \
+		CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2")
+
 #define CFG_DP_RXDMA_MONITOR_BUF_RING \
 		CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
 		WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
@@ -674,6 +707,9 @@
 		CFG(CFG_DP_REO_STATUS_RING) \
 		CFG(CFG_DP_RXDMA_BUF_RING) \
 		CFG(CFG_DP_RXDMA_REFILL_RING) \
+		CFG(CFG_DP_TX_DESC_LIMIT_0) \
+		CFG(CFG_DP_TX_DESC_LIMIT_1) \
+		CFG(CFG_DP_TX_DESC_LIMIT_2) \
 		CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
 		CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
 		CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \

wlan_cfg/wlan_cfg.c

@@ -400,6 +400,12 @@ wlan_cfg_soc_attach(struct cdp_ctrl_objmgr_psoc *psoc)
 						CFG_DP_REO_STATUS_RING);
 	wlan_cfg_ctx->rxdma_refill_ring = cfg_get(psoc,
 						  CFG_DP_RXDMA_REFILL_RING);
+	wlan_cfg_ctx->tx_desc_limit_0 = cfg_get(psoc,
+						CFG_DP_TX_DESC_LIMIT_0);
+	wlan_cfg_ctx->tx_desc_limit_1 = cfg_get(psoc,
+						CFG_DP_TX_DESC_LIMIT_1);
+	wlan_cfg_ctx->tx_desc_limit_2 = cfg_get(psoc,
+						CFG_DP_TX_DESC_LIMIT_2);
 	wlan_cfg_ctx->rxdma_err_dst_ring = cfg_get(psoc,
 						   CFG_DP_RXDMA_ERR_DST_RING);
 	wlan_cfg_ctx->enable_data_stall_detection =
@@ -932,6 +938,24 @@ wlan_cfg_get_dp_soc_rxdma_refill_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg)
 	return cfg->rxdma_refill_ring;
 }
 
+int
+wlan_cfg_get_dp_soc_tx_desc_limit_0(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->tx_desc_limit_0;
+}
+
+int
+wlan_cfg_get_dp_soc_tx_desc_limit_1(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->tx_desc_limit_1;
+}
+
+int
+wlan_cfg_get_dp_soc_tx_desc_limit_2(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->tx_desc_limit_2;
+}
+
 int
 wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg)
 {

wlan_cfg/wlan_cfg.h

@@ -147,6 +147,9 @@ struct wlan_srng_cfg {
  * @enable_data_stall_detection: flag to enable data stall detection
  * @disable_intra_bss_fwd: flag to disable intra bss forwarding
  * @rxdma1_enable: flag to indicate if rxdma1 is enabled
+ * @tx_desc_limit_0: tx_desc limit for 5G H
+ * @tx_desc_limit_1: tx_desc limit for 2G
+ * @tx_desc_limit_2: tx_desc limit for 5G L
  * @tx_comp_loop_pkt_limit: Max # of packets to be processed in 1 tx comp loop
  * @rx_reap_loop_pkt_limit: Max # of packets to be processed in 1 rx reap loop
  * @rx_hp_oos_update_limit: Max # of HP OOS (out of sync) updates
@@ -228,6 +231,9 @@ struct wlan_cfg_dp_soc_ctxt {
 	bool disable_intra_bss_fwd;
 	bool rxdma1_enable;
 	int max_ast_idx;
+	int tx_desc_limit_0;
+	int tx_desc_limit_1;
+	int tx_desc_limit_2;
 #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
 	uint32_t tx_comp_loop_pkt_limit;
 	uint32_t rx_reap_loop_pkt_limit;
@@ -991,6 +997,33 @@ wlan_cfg_get_dp_soc_reo_cmd_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
 int
 wlan_cfg_get_dp_soc_reo_status_ring_size(struct wlan_cfg_dp_soc_ctxt *cfg);
 
+/*
+ * wlan_cfg_get_dp_soc_tx_desc_limit_0 - Get tx desc limit for 5G H
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: tx desc limit for 5G H
+ */
+int
+wlan_cfg_get_dp_soc_tx_desc_limit_0(struct wlan_cfg_dp_soc_ctxt *cfg);
+
+/*
+ * wlan_cfg_get_dp_soc_tx_desc_limit_1 - Get tx desc limit for 2G
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: tx desc limit for 2G
+ */
+int
+wlan_cfg_get_dp_soc_tx_desc_limit_1(struct wlan_cfg_dp_soc_ctxt *cfg);
+
+/*
+ * wlan_cfg_get_dp_soc_tx_desc_limit_2 - Get tx desc limit for 5G L
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: tx desc limit for 5G L
+ */
+int
+wlan_cfg_get_dp_soc_tx_desc_limit_2(struct wlan_cfg_dp_soc_ctxt *cfg);
+
 /*
  * wlan_cfg_get_dp_soc_rxdma_refill_ring_size - Get rxdma refill ring size
  * @wlan_cfg_soc_ctx