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@@ -57,6 +57,15 @@
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#define COMP_MAX_COEFF 25
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#define HPH_MODE_MAX 4
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+#define WCD_USBSS_WRITE true
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+#define WCD_USBSS_READ false
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+#define WCD_USBSS_DP_EN 0x1E
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+#define WCD_USBSS_DN_EN 0x21
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+#define P_THRESH_SEL_MASK 0x0E
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+#define P_THRESH_SEL_SHIFT 0x01
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+#define VTH_4P0 0x04
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+#define VTH_4P2 0x06
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+
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#define DAPM_MICBIAS1_STANDALONE "MIC BIAS1 Standalone"
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#define DAPM_MICBIAS2_STANDALONE "MIC BIAS2 Standalone"
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#define DAPM_MICBIAS3_STANDALONE "MIC BIAS3 Standalone"
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@@ -4640,6 +4649,21 @@ static struct snd_soc_component_driver soc_codec_dev_wcd939x = {
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.resume = wcd939x_soc_codec_resume,
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};
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+static void wcd_usbss_set_ovp_threshold(u32 threshold)
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+{
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+ uint32_t ovp_regs[2][2] = {{WCD_USBSS_DP_EN, 0x00}, {WCD_USBSS_DN_EN, 0x00}};
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+
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+ /* Get current register values */
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+ wcd_usbss_register_update(ovp_regs, WCD_USBSS_READ, ARRAY_SIZE(ovp_regs));
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+ /* Overwrite OVP tresholds */
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+ ovp_regs[0][1] &= (~P_THRESH_SEL_MASK);
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+ ovp_regs[0][1] |= (threshold << P_THRESH_SEL_SHIFT);
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+ ovp_regs[1][1] &= (~P_THRESH_SEL_MASK);
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+ ovp_regs[1][1] |= (threshold << P_THRESH_SEL_SHIFT);
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+ /* Write updated register values */
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+ wcd_usbss_register_update(ovp_regs, WCD_USBSS_WRITE, ARRAY_SIZE(ovp_regs));
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+}
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+
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static int wcd939x_reset(struct device *dev)
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{
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struct wcd939x_priv *wcd939x = NULL;
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@@ -4663,6 +4687,11 @@ static int wcd939x_reset(struct device *dev)
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if (value > 0)
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return 0;
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+ /* Set OVP threshold to 4.0V before reset */
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+#if IS_ENABLED(CONFIG_QCOM_WCD_USBSS_I2C)
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+ wcd_usbss_set_ovp_threshold(VTH_4P0);
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+#endif
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+
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rc = msm_cdc_pinctrl_select_sleep_state(wcd939x->rst_np);
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if (rc) {
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dev_err_ratelimited(dev, "%s: wcd sleep state request fail!\n",
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@@ -4681,6 +4710,11 @@ static int wcd939x_reset(struct device *dev)
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/* 20us sleep required after pulling the reset gpio to HIGH */
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usleep_range(20, 30);
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+ /* Set OVP threshold to 4.2V after reset */
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+#if IS_ENABLED(CONFIG_QCOM_WCD_USBSS_I2C)
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+ wcd_usbss_set_ovp_threshold(VTH_4P2);
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+#endif
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+
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return rc;
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}
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@@ -5038,6 +5072,11 @@ static int wcd939x_reset_low(struct device *dev)
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return -EINVAL;
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}
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+ /* Set OVP threshold to 4.0V before reset */
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+#if IS_ENABLED(CONFIG_QCOM_WCD_USBSS_I2C)
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+ wcd_usbss_set_ovp_threshold(VTH_4P0);
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+#endif
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+
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rc = msm_cdc_pinctrl_select_sleep_state(wcd939x->rst_np);
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if (rc) {
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dev_err_ratelimited(dev, "%s: wcd sleep state request fail!\n",
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qctecmdr