Merge "msm: ipa3: Changes to support to IPA HW version 3.0 target"

drivers/platform/msm/ipa/ipa_v3/ipa.c

@@ -6604,11 +6604,16 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p,
 	/* The following will retrieve and save the gsi fw version */
 	ipa_save_gsi_ver();
 
-	if (ipahal_init(ipa3_ctx->ipa_hw_type, ipa3_ctx->mmio,
-		ipa3_ctx->ipa_cfg_offset, ipa3_ctx->pdev)) {
-		IPAERR("fail to init ipahal\n");
-		result = -EFAULT;
-		goto fail_ipahal;
+	/* IPA version 3.0 IPAHAL initialized at pre_init as there is no SMMU.
+	 * In normal mode need to wait until SMMU is attached and
+         * thus initialization done here*/
+	if (ipa3_ctx->ipa_hw_type != IPA_HW_v3_0) {
+		if (ipahal_init(ipa3_ctx->ipa_hw_type, ipa3_ctx->mmio,
+				ipa3_ctx->ipa_cfg_offset, ipa3_ctx->pdev)) {
+			IPAERR("fail to init ipahal\n");
+			result = -EFAULT;
+			goto fail_ipahal;
+		}
 	}
 
 	result = ipa3_init_hw();
@@ -7394,8 +7399,10 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p,
 		result = -ENOMEM;
 		goto fail_mem_ctx;
 	}
-
-	ipa3_ctx->fw_load_data.state = IPA_FW_LOAD_STATE_INIT;
+	/* If SMMU not support fw load state will be updated
+	 * in probe function. Avoid overwriting in pre-init function */
+	if (ipa3_ctx->fw_load_data.state != IPA_FW_LOAD_STATE_SMMU_DONE)
+		ipa3_ctx->fw_load_data.state = IPA_FW_LOAD_STATE_INIT;
 	mutex_init(&ipa3_ctx->fw_load_data.lock);
 
 	ipa3_ctx->logbuf = ipc_log_context_create(IPA_IPC_LOG_PAGES, "ipa", 0);
@@ -7660,6 +7667,17 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p,
 	    ipa3_ctx->mmio,
 	    resource_p->ipa_mem_size);
 
+	/* IPA version 3.0 IPAHAL used to load the firmwares and
+	 * there is no SMMU so IPAHAL is initialized here.*/
+	if (ipa3_ctx->ipa_hw_type == IPA_HW_v3_0) {
+		if (ipahal_init(ipa3_ctx->ipa_hw_type, ipa3_ctx->mmio,
+				ipa3_ctx->ipa_cfg_offset, &ipa3_ctx->master_pdev->dev)) {
+			IPAERR("fail to init ipahal\n");
+			result = -EFAULT;
+			goto fail_remap;
+		}
+	}
+
 	/*
 	 * Setup access for register collection/dump on crash
 	 */
@@ -7929,11 +7947,13 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p,
 		goto fail_wwan_init;
 	}
 
-	result = ipa3_rmnet_ctl_init();
-	if (result) {
-		IPAERR(":ipa3_rmnet_ctl_init err=%d\n", -result);
-		result = -ENODEV;
-		goto fail_rmnet_ctl_init;
+	if (ipa3_ctx->rmnet_ctl_enable) {
+		result = ipa3_rmnet_ctl_init();
+		if (result) {
+			IPAERR(":ipa3_rmnet_ctl_init err=%d\n", -result);
+			result = -ENODEV;
+			goto fail_rmnet_ctl_init;
+		}
 	}
 
 	mutex_init(&ipa3_ctx->app_clock_vote.mutex);

drivers/platform/msm/ipa/ipa_v3/ipa_odl.c

@@ -360,6 +360,11 @@ int ipa3_odl_pipe_open(void)
 	int ret = 0;
 	struct ipa_ep_cfg_holb holb_cfg;
 
+	if(ipa3_ctx->ipa_hw_type < IPA_HW_v4_1) {
+		IPADBG("ODL not supported\n");
+		return 0;
+	}
+
 	if (!ipa3_odl_ctx->odl_state.adpl_open) {
 		IPAERR("adpl pipe not configured\n");
 		return 0;
@@ -462,6 +467,11 @@ void ipa3_odl_pipe_cleanup(bool is_ssr)
 {
 	bool ipa_odl_opened = false;
 
+	if(ipa3_ctx->ipa_hw_type < IPA_HW_v4_1) {
+		IPADBG("ODL not supported\n");
+		return;
+	}
+
 	if (!ipa3_odl_ctx->odl_state.adpl_open) {
 		IPAERR("adpl pipe not configured\n");
 		return;

drivers/platform/msm/ipa/ipa_v3/ipa_utils.c

@@ -6056,12 +6056,15 @@ int ipa3_init_hw(void)
 
 	ipa3_cfg_qsb();
 
-	if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_5) {
-		/* set aggr granularity for 0.5 msec*/
-		cnt_cfg.aggr_granularity = GRAN_VALUE_500_USEC;
-		ipahal_write_reg_fields(IPA_COUNTER_CFG, &cnt_cfg);
-	} else {
-		ipa_cfg_qtime();
+	/* IPA version  <3.5 IPA_COUNTER_CFG register config not required */
+	if (ipa3_ctx->ipa_hw_type >= IPA_HW_v3_5) {
+		if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_5) {
+			/* set aggr granularity for 0.5 msec*/
+			cnt_cfg.aggr_granularity = GRAN_VALUE_500_USEC;
+			ipahal_write_reg_fields(IPA_COUNTER_CFG, &cnt_cfg);
+		} else {
+			ipa_cfg_qtime();
+		}
 	}
 
 	ipa_comp_cfg();

drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c

@@ -3323,10 +3323,10 @@ static struct ipahal_reg_obj ipahal_reg_objs[IPA_HW_MAX][IPA_REG_MAX] = {
 		ipareg_construct_rx_hps_clients_depth1, ipareg_parse_dummy,
 		0x000023D0, 0, 0, 0, 0, 0},
 	[IPA_HW_v3_0][IPA_QSB_MAX_WRITES] = {
-		ipareg_construct_qsb_max_writes, ipareg_parse_dummy,
+		ipareg_construct_qsb_max_writes, ipareg_parse_qsb_max_writes,
 		0x00000074, 0, 0, 0, 0, 0},
 	[IPA_HW_v3_0][IPA_QSB_MAX_READS] = {
-		ipareg_construct_qsb_max_reads, ipareg_parse_dummy,
+		ipareg_construct_qsb_max_reads, ipareg_parse_qsb_max_reads,
 		0x00000078, 0, 0, 0, 0, 0},
 	[IPA_HW_v3_0][IPA_DPS_SEQUENCER_FIRST] = {
 		ipareg_construct_dummy, ipareg_parse_dummy,
@@ -4757,7 +4757,7 @@ u32 ipahal_get_reg_nk_offset(enum ipahal_reg_name reg, u32 n, u32 k)
 
 u32 ipahal_get_reg_base(void)
 {
-	if (ipahal_ctx->ipa_cfg_offset == 0)
+	if (!ipahal_ctx || ipahal_ctx->ipa_cfg_offset == 0)
 		return 0x00040000;
 	else
 		return ipahal_ctx->ipa_cfg_offset;

drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c

@@ -2683,9 +2683,11 @@ static int ipa3_wwan_remove(struct platform_device *pdev)
 
 	IPAWANINFO("rmnet_ipa started deinitialization\n");
 	mutex_lock(&rmnet_ipa3_ctx->pipe_handle_guard);
-	ret = ipa3_teardown_apps_low_lat_pipes();
-	if (ret < 0)
-		IPAWANERR("Failed to teardown IPA->APPS qmap pipe\n");
+	if (ipa3_ctx->rmnet_ctl_enable) {
+		ret = ipa3_teardown_apps_low_lat_pipes();
+		if (ret < 0)
+			IPAWANERR("Failed to teardown IPA->APPS qmap pipe\n");
+	}
 	ret = ipa3_teardown_sys_pipe(rmnet_ipa3_ctx->ipa3_to_apps_hdl);
 	if (ret < 0)
 		IPAWANERR("Failed to teardown IPA->APPS pipe\n");