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video: driver: add resource ops macro support

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Added call_res_op() macro and used at all possible
places to avoid invalid pointer dereference issue.

Also added changes to cleanup unused functions.

Change-Id: Id77711ad9eaf7b407208567b0fde1f2693588641
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
This commit is contained in:
Govindaraj Rajagopal
2022-10-10 10:57:25 +05:30
rodzic ca9cc59d28
commit 3560442234
17 zmienionych plików z 84 dodań i 189 usunięć
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4
driver/variant/iris2/src/msm_vidc_buffer_iris2.c
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@@ -201,9 +201,7 @@ static u32 msm_vidc_decoder_persist_size_iris2(struct msm_vidc_inst *inst)
static u32 msm_vidc_decoder_dpb_size_iris2(struct msm_vidc_inst *inst)
{
u32 size = 0;
u32 color_fmt;
u32 width, height;
u32 color_fmt, width, height, size = 0;
struct v4l2_format *f;
if (!inst) {

47
driver/variant/iris2/src/msm_vidc_iris2.c
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@@ -249,7 +249,6 @@ static int __setup_ucregion_memory_map_iris2(struct msm_vidc_core *vidc_core)
static int __power_off_iris2_hardware(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0, i;
u32 value = 0;
@@ -322,12 +321,12 @@ static int __power_off_iris2_hardware(struct msm_vidc_core *core)
disable_power:
/* power down process */
rc = res_ops->gdsc_off(core, "vcodec");
rc = call_res_op(core, gdsc_off, core, "vcodec");
if (rc) {
d_vpr_e("%s: disable regulator vcodec failed\n", __func__);
rc = 0;
}
rc = res_ops->clk_disable(core, "vcodec_clk");
rc = call_res_op(core, clk_disable, core, "vcodec_clk");
if (rc) {
d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__);
rc = 0;
@@ -338,7 +337,6 @@ disable_power:
static int __power_off_iris2_controller(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
/*
@@ -381,27 +379,27 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core)
d_vpr_h("%s: debug bridge release failed\n", __func__);
/* Turn off MVP MVS0C core clock */
rc = res_ops->clk_disable(core, "core_clk");
rc = call_res_op(core, clk_disable, core, "core_clk");
if (rc) {
d_vpr_e("%s: disable unprepare core_clk failed\n", __func__);
rc = 0;
}
/* Disable GCC_VIDEO_AXI0_CLK clock */
rc = res_ops->clk_disable(core, "gcc_video_axi0");
rc = call_res_op(core, clk_disable, core, "gcc_video_axi0");
if (rc) {
d_vpr_e("%s: disable unprepare gcc_video_axi0 failed\n", __func__);
rc = 0;
}
rc = res_ops->reset_bridge(core);
rc = call_res_op(core, reset_bridge, core);
if (rc) {
d_vpr_e("%s: reset bridge failed\n", __func__);
rc = 0;
}
/* power down process */
rc = res_ops->gdsc_off(core, "iris-ctl");
rc = call_res_op(core, gdsc_off, core, "iris-ctl");
if (rc) {
d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__);
rc = 0;
@@ -412,7 +410,6 @@ static int __power_off_iris2_controller(struct msm_vidc_core *core)
static int __power_off_iris2(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
if (!core || !core->capabilities) {
@@ -427,7 +424,7 @@ static int __power_off_iris2(struct msm_vidc_core *core)
* Reset video_cc_mvs0_clk_src value to resolve MMRM high video
* clock projection issue.
*/
rc = res_ops->set_clks(core, 0);
rc = call_res_op(core, set_clks, core, 0);
if (rc)
d_vpr_e("%s: resetting clocks failed\n", __func__);
@@ -437,7 +434,8 @@ static int __power_off_iris2(struct msm_vidc_core *core)
if (__power_off_iris2_controller(core))
d_vpr_e("%s: failed to power off controller\n", __func__);
if (res_ops->set_bw(core, 0, 0))
rc = call_res_op(core, set_bw, core, 0, 0);
if (rc)
d_vpr_e("%s: failed to unvote buses\n", __func__);
if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS2))
@@ -451,60 +449,57 @@ static int __power_off_iris2(struct msm_vidc_core *core)
static int __power_on_iris2_controller(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
rc = res_ops->gdsc_on(core, "iris-ctl");
rc = call_res_op(core, gdsc_on, core, "iris-ctl");
if (rc)
goto fail_regulator;
rc = res_ops->reset_bridge(core);
rc = call_res_op(core, reset_bridge, core);
if (rc)
goto fail_reset_ahb2axi;
rc = res_ops->clk_enable(core, "gcc_video_axi0");
rc = call_res_op(core, clk_enable, core, "gcc_video_axi0");
if (rc)
goto fail_clk_axi;
rc = res_ops->clk_enable(core, "core_clk");
rc = call_res_op(core, clk_enable, core, "core_clk");
if (rc)
goto fail_clk_controller;
return 0;
fail_clk_controller:
res_ops->clk_disable(core, "gcc_video_axi0");
call_res_op(core, clk_disable, core, "gcc_video_axi0");
fail_clk_axi:
fail_reset_ahb2axi:
res_ops->gdsc_off(core, "iris-ctl");
call_res_op(core, gdsc_off, core, "iris-ctl");
fail_regulator:
return rc;
}
static int __power_on_iris2_hardware(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
rc = res_ops->gdsc_on(core, "vcodec");
rc = call_res_op(core, gdsc_on, core, "vcodec");
if (rc)
goto fail_regulator;
rc = res_ops->clk_enable(core, "vcodec_clk");
rc = call_res_op(core, clk_enable, core, "vcodec_clk");
if (rc)
goto fail_clk_controller;
return 0;
fail_clk_controller:
res_ops->gdsc_off(core, "vcodec");
call_res_op(core, gdsc_off, core, "vcodec");
fail_regulator:
return rc;
}
static int __power_on_iris2(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
struct frequency_table *freq_tbl;
u32 freq = 0;
int rc = 0;
@@ -513,7 +508,7 @@ static int __power_on_iris2(struct msm_vidc_core *core)
return 0;
/* Vote for all hardware resources */
rc = res_ops->set_bw(core, INT_MAX, INT_MAX);
rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX);
if (rc) {
d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc);
goto fail_vote_buses;
@@ -537,7 +532,7 @@ static int __power_on_iris2(struct msm_vidc_core *core)
freq = core->power.clk_freq ? core->power.clk_freq :
freq_tbl[0].freq;
rc = res_ops->set_clks(core, freq);
rc = call_res_op(core, set_clks, core, freq);
if (rc) {
d_vpr_e("%s: failed to scale clocks\n", __func__);
rc = 0;
@@ -560,7 +555,7 @@ static int __power_on_iris2(struct msm_vidc_core *core)
fail_power_on_hardware:
__power_off_iris2_controller(core);
fail_power_on_controller:
res_ops->set_bw(core, 0, 0);
call_res_op(core, set_bw, core, 0, 0);
fail_vote_buses:
core->power_enabled = false;
return rc;

43
driver/variant/iris3/src/msm_vidc_iris3.c
Wyświetl plik

@@ -269,7 +269,6 @@ static bool is_iris3_hw_power_collapsed(struct msm_vidc_core *core)
static int __power_off_iris3_hardware(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0, i;
u32 value = 0;
bool pwr_collapsed = false;
@@ -361,13 +360,13 @@ static int __power_off_iris3_hardware(struct msm_vidc_core *core)
disable_power:
/* power down process */
rc = res_ops->gdsc_off(core, "vcodec");
rc = call_res_op(core, gdsc_off, core, "vcodec");
if (rc) {
d_vpr_e("%s: disable regulator vcodec failed\n", __func__);
rc = 0;
}
rc = res_ops->clk_disable(core, "vcodec_clk");
rc = call_res_op(core, clk_disable, core, "vcodec_clk");
if (rc) {
d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__);
rc = 0;
@@ -378,7 +377,6 @@ disable_power:
static int __power_off_iris3_controller(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
/*
@@ -439,14 +437,14 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core)
return rc;
/* Turn off MVP MVS0C core clock */
rc = res_ops->clk_disable(core, "core_clk");
rc = call_res_op(core, clk_disable, core, "core_clk");
if (rc) {
d_vpr_e("%s: disable unprepare core_clk failed\n", __func__);
rc = 0;
}
/* power down process */
rc = res_ops->gdsc_off(core, "iris-ctl");
rc = call_res_op(core, gdsc_off, core, "iris-ctl");
if (rc) {
d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__);
rc = 0;
@@ -457,7 +455,6 @@ static int __power_off_iris3_controller(struct msm_vidc_core *core)
static int __power_off_iris3(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
if (!core || !core->capabilities) {
@@ -472,7 +469,7 @@ static int __power_off_iris3(struct msm_vidc_core *core)
* Reset video_cc_mvs0_clk_src value to resolve MMRM high video
* clock projection issue.
*/
rc = res_ops->set_clks(core, 0);
rc = call_res_op(core, set_clks, core, 0);
if (rc)
d_vpr_e("%s: resetting clocks failed\n", __func__);
@@ -482,7 +479,8 @@ static int __power_off_iris3(struct msm_vidc_core *core)
if (__power_off_iris3_controller(core))
d_vpr_e("%s: failed to power off controller\n", __func__);
if (res_ops->set_bw(core, 0, 0))
rc = call_res_op(core, set_bw, core, 0, 0);
if (rc)
d_vpr_e("%s: failed to unvote buses\n", __func__);
if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS3))
@@ -496,60 +494,57 @@ static int __power_off_iris3(struct msm_vidc_core *core)
static int __power_on_iris3_controller(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
rc = res_ops->gdsc_on(core, "iris-ctl");
rc = call_res_op(core, gdsc_on, core, "iris-ctl");
if (rc)
goto fail_regulator;
rc = res_ops->reset_bridge(core);
rc = call_res_op(core, reset_bridge, core);
if (rc)
goto fail_reset_ahb2axi;
rc = res_ops->clk_enable(core, "gcc_video_axi0");
rc = call_res_op(core, clk_enable, core, "gcc_video_axi0");
if (rc)
goto fail_clk_axi;
rc = res_ops->clk_enable(core, "core_clk");
rc = call_res_op(core, clk_enable, core, "core_clk");
if (rc)
goto fail_clk_controller;
return 0;
fail_clk_controller:
res_ops->clk_disable(core, "gcc_video_axi0");
call_res_op(core, clk_disable, core, "gcc_video_axi0");
fail_clk_axi:
fail_reset_ahb2axi:
res_ops->gdsc_off(core, "iris-ctl");
call_res_op(core, gdsc_off, core, "iris-ctl");
fail_regulator:
return rc;
}
static int __power_on_iris3_hardware(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
rc = res_ops->gdsc_on(core, "vcodec");
rc = call_res_op(core, gdsc_on, core, "vcodec");
if (rc)
goto fail_regulator;
rc = res_ops->clk_enable(core, "vcodec_clk");
rc = call_res_op(core, clk_enable, core, "vcodec_clk");
if (rc)
goto fail_clk_controller;
return 0;
fail_clk_controller:
res_ops->gdsc_off(core, "vcodec");
call_res_op(core, gdsc_off, core, "vcodec");
fail_regulator:
return rc;
}
static int __power_on_iris3(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
struct frequency_table *freq_tbl;
u32 freq = 0;
int rc = 0;
@@ -558,7 +553,7 @@ static int __power_on_iris3(struct msm_vidc_core *core)
return 0;
/* Vote for all hardware resources */
rc = res_ops->set_bw(core, INT_MAX, INT_MAX);
rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX);
if (rc) {
d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc);
goto fail_vote_buses;
@@ -582,7 +577,7 @@ static int __power_on_iris3(struct msm_vidc_core *core)
freq = core->power.clk_freq ? core->power.clk_freq :
freq_tbl[0].freq;
rc = res_ops->set_clks(core, freq);
rc = call_res_op(core, set_clks, core, freq);
if (rc) {
d_vpr_e("%s: failed to scale clocks\n", __func__);
rc = 0;
@@ -602,7 +597,7 @@ static int __power_on_iris3(struct msm_vidc_core *core)
fail_power_on_hardware:
__power_off_iris3_controller(core);
fail_power_on_controller:
res_ops->set_bw(core, 0, 0);
call_res_op(core, set_bw, core, 0, 0);
fail_vote_buses:
core->power_enabled = false;
return rc;

3
driver/variant/iris3/src/msm_vidc_power_iris3.c
Wyświetl plik

@@ -265,7 +265,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d)
/* Derived parameters */
int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu;
unsigned long bitrate;
unsigned int num_vpp_pipes;
fp_t bins_to_bit_factor, vsp_read_factor, vsp_write_factor,
dpb_factor, dpb_write_factor, y_bw_no_ubwc_8bpp;
@@ -317,8 +316,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d)
opb_write_compression_factor = opb_compression_enabled ?
dpb_write_compression_factor : FP_ONE;
num_vpp_pipes = d->num_vpp_pipes;
if (d->use_sys_cache) {
llc_ref_read_l2_cache_enabled = true;
if (is_h264_category)

45
driver/variant/iris33/src/msm_vidc_iris33.c
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@@ -280,7 +280,6 @@ static bool is_iris33_hw_power_collapsed(struct msm_vidc_core *core)
static int __power_off_iris33_hardware(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0, i;
u32 value = 0;
bool pwr_collapsed = false;
@@ -368,13 +367,13 @@ static int __power_off_iris33_hardware(struct msm_vidc_core *core)
disable_power:
/* power down process */
rc = res_ops->gdsc_off(core, "vcodec");
rc = call_res_op(core, gdsc_off, core, "vcodec");
if (rc) {
d_vpr_e("%s: disable regulator vcodec failed\n", __func__);
rc = 0;
}
rc = res_ops->clk_disable(core, "vcodec_clk");
rc = call_res_op(core, clk_disable, core, "vcodec_clk");
if (rc) {
d_vpr_e("%s: disable unprepare vcodec_clk failed\n", __func__);
rc = 0;
@@ -385,7 +384,6 @@ disable_power:
static int __power_off_iris33_controller(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
int value = 0;
@@ -493,21 +491,21 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core)
/* Turn off MVP MVS0C core clock */
rc = res_ops->clk_disable(core, "core_clk");
rc = call_res_op(core, clk_disable, core, "core_clk");
if (rc) {
d_vpr_e("%s: disable unprepare core_clk failed\n", __func__);
rc = 0;
}
/* power down process */
rc = res_ops->gdsc_off(core, "iris-ctl");
rc = call_res_op(core, gdsc_off, core, "iris-ctl");
if (rc) {
d_vpr_e("%s: disable regulator iris-ctl failed\n", __func__);
rc = 0;
}
/* Turn off GCC AXI clock */
rc = res_ops->clk_disable(core, "gcc_video_axi0");
rc = call_res_op(core, clk_disable, core, "gcc_video_axi0");
if (rc) {
d_vpr_e("%s: disable unprepare core_clk failed\n", __func__);
rc = 0;
@@ -518,7 +516,6 @@ static int __power_off_iris33_controller(struct msm_vidc_core *core)
static int __power_off_iris33(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
if (!core || !core->capabilities) {
@@ -533,7 +530,7 @@ static int __power_off_iris33(struct msm_vidc_core *core)
* Reset video_cc_mvs0_clk_src value to resolve MMRM high video
* clock projection issue.
*/
rc = res_ops->set_clks(core, 0);
rc = call_res_op(core, set_clks, core, 0);
if (rc)
d_vpr_e("%s: resetting clocks failed\n", __func__);
@@ -543,7 +540,8 @@ static int __power_off_iris33(struct msm_vidc_core *core)
if (__power_off_iris33_controller(core))
d_vpr_e("%s: failed to power off controller\n", __func__);
if (res_ops->set_bw(core, 0, 0))
rc = call_res_op(core, set_bw, core, 0, 0);
if (rc)
d_vpr_e("%s: failed to unvote buses\n", __func__);
if (!(core->intr_status & WRAPPER_INTR_STATUS_A2HWD_BMSK_IRIS33))
@@ -557,60 +555,57 @@ static int __power_off_iris33(struct msm_vidc_core *core)
static int __power_on_iris33_controller(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
rc = res_ops->gdsc_on(core, "iris-ctl");
rc = call_res_op(core, gdsc_on, core, "iris-ctl");
if (rc)
goto fail_regulator;
rc = res_ops->reset_bridge(core);
rc = call_res_op(core, reset_bridge, core);
if (rc)
goto fail_reset_ahb2axi;
rc = res_ops->clk_enable(core, "gcc_video_axi0");
rc = call_res_op(core, clk_enable, core, "gcc_video_axi0");
if (rc)
goto fail_clk_axi;
rc = res_ops->clk_enable(core, "core_clk");
rc = call_res_op(core, clk_enable, core, "core_clk");
if (rc)
goto fail_clk_controller;
return 0;
fail_clk_controller:
res_ops->clk_disable(core, "gcc_video_axi0");
call_res_op(core, clk_disable, core, "gcc_video_axi0");
fail_clk_axi:
fail_reset_ahb2axi:
res_ops->gdsc_off(core, "iris-ctl");
call_res_op(core, gdsc_off, core, "iris-ctl");
fail_regulator:
return rc;
}
static int __power_on_iris33_hardware(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
int rc = 0;
rc = res_ops->gdsc_on(core, "vcodec");
rc = call_res_op(core, gdsc_on, core, "vcodec");
if (rc)
goto fail_regulator;
rc = res_ops->clk_enable(core, "vcodec_clk");
rc = call_res_op(core, clk_enable, core, "vcodec_clk");
if (rc)
goto fail_clk_controller;
return 0;
fail_clk_controller:
res_ops->gdsc_off(core, "vcodec");
call_res_op(core, gdsc_off, core, "vcodec");
fail_regulator:
return rc;
}
static int __power_on_iris33(struct msm_vidc_core *core)
{
const struct msm_vidc_resources_ops *res_ops = core->res_ops;
struct frequency_table *freq_tbl;
u32 freq = 0;
int rc = 0;
@@ -619,7 +614,7 @@ static int __power_on_iris33(struct msm_vidc_core *core)
return 0;
/* Vote for all hardware resources */
rc = res_ops->set_bw(core, INT_MAX, INT_MAX);
rc = call_res_op(core, set_bw, core, INT_MAX, INT_MAX);
if (rc) {
d_vpr_e("%s: failed to vote buses, rc %d\n", __func__, rc);
goto fail_vote_buses;
@@ -643,7 +638,7 @@ static int __power_on_iris33(struct msm_vidc_core *core)
freq = core->power.clk_freq ? core->power.clk_freq :
freq_tbl[0].freq;
rc = res_ops->set_clks(core, freq);
rc = call_res_op(core, set_clks, core, freq);
if (rc) {
d_vpr_e("%s: failed to scale clocks\n", __func__);
rc = 0;
@@ -663,7 +658,7 @@ static int __power_on_iris33(struct msm_vidc_core *core)
fail_power_on_hardware:
__power_off_iris33_controller(core);
fail_power_on_controller:
res_ops->set_bw(core, 0, 0);
call_res_op(core, set_bw, core, 0, 0);
fail_vote_buses:
core->power_enabled = false;
return rc;

3
driver/variant/iris33/src/msm_vidc_power_iris33.c
Wyświetl plik

@@ -264,7 +264,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d)
/* Derived parameters */
int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu;
unsigned long bitrate;
unsigned int num_vpp_pipes;
fp_t bins_to_bit_factor, vsp_read_factor, vsp_write_factor,
dpb_factor, dpb_write_factor, y_bw_no_ubwc_8bpp;
@@ -316,8 +315,6 @@ static u64 __calculate_decoder(struct vidc_bus_vote_data *d)
opb_write_compression_factor = opb_compression_enabled ?
dpb_write_compression_factor : FP_ONE;
num_vpp_pipes = d->num_vpp_pipes;
if (d->use_sys_cache) {
llc_ref_read_l2_cache_enabled = true;
if (is_h264_category)