qcacmn: Add support to configure phy error mask
The monitor status ring is configured for filtering in undecoded phy error packets. Each phy error can be controlled using a specific error mask configuration. Added below cfg80211tool command to configure phy error mask for filtering undecoded phy error packets. cfg80211tool wifix set_phyrx_error_mask mask_0to31 mask_32to63 cfg80211tool wifix get_phyrx_error_mask Change-Id: I5e4f6a49458cc534d6d1d0f7f2a7424f3cc747b4
This commit is contained in:

committed by
Madan Koyyalamudi

parent
e85fbce095
commit
3498dbc3a6
@@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -1428,4 +1429,53 @@ static inline QDF_STATUS cdp_get_uplink_delay(ol_txrx_soc_handle soc,
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}
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#endif /* WLAN_FEATURE_TSF_UPLINK_DELAY */
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#ifdef QCA_UNDECODED_METADATA_SUPPORT
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/**
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* cdp_txrx_set_pdev_phyrx_error_mask() - set phyrx error mask
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* @soc: opaque soc handle
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* @pdev_id: id of data path pdev handle
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* @mask1: mask to configure 0 to 31 phy error
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* @mask2: mask to configure 32 to 63 phy error
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*
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* Return: status: 0 - Success, non-zero: Failure
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*/
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static inline
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QDF_STATUS cdp_txrx_set_pdev_phyrx_error_mask(ol_txrx_soc_handle soc,
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uint8_t pdev_id, uint32_t mask,
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uint32_t mask_cont)
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{
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if (!soc || !soc->ops) {
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dp_cdp_debug("Invalid Instance:");
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QDF_BUG(0);
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return QDF_STATUS_E_FAILURE;
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}
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if (!soc->ops->ctrl_ops ||
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!soc->ops->ctrl_ops->txrx_set_pdev_phyrx_error_mask)
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return QDF_STATUS_E_FAILURE;
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return soc->ops->ctrl_ops->txrx_set_pdev_phyrx_error_mask
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(soc, pdev_id, mask, mask_cont);
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}
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static inline
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QDF_STATUS cdp_txrx_get_pdev_phyrx_error_mask(ol_txrx_soc_handle soc,
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uint8_t pdev_id, uint32_t *mask,
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uint32_t *mask_cont)
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{
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if (!soc || !soc->ops) {
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dp_cdp_debug("Invalid Instance:");
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QDF_BUG(0);
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return QDF_STATUS_E_FAILURE;
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}
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if (!soc->ops->ctrl_ops ||
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!soc->ops->ctrl_ops->txrx_get_pdev_phyrx_error_mask)
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return QDF_STATUS_E_FAILURE;
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return soc->ops->ctrl_ops->txrx_get_pdev_phyrx_error_mask
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(soc, pdev_id, mask, mask_cont);
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}
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#endif
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#endif /* _CDP_TXRX_CTRL_H_ */
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@@ -862,6 +862,16 @@ struct cdp_ctrl_ops {
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uint8_t vdev_id,
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uint32_t *val);
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#endif
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#ifdef QCA_UNDECODED_METADATA_SUPPORT
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QDF_STATUS (*txrx_set_pdev_phyrx_error_mask)(struct cdp_soc_t *soc,
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uint8_t pdev_id,
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uint32_t mask,
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uint32_t mask_cont);
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QDF_STATUS (*txrx_get_pdev_phyrx_error_mask)(struct cdp_soc_t *soc,
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uint8_t pdev_id,
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uint32_t *mask,
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uint32_t *mask_cont);
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#endif
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};
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struct cdp_me_ops {
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@@ -9630,6 +9630,40 @@ static QDF_STATUS dp_set_pdev_param(struct cdp_soc_t *cdp_soc, uint8_t pdev_id,
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return QDF_STATUS_SUCCESS;
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}
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#ifdef QCA_UNDECODED_METADATA_SUPPORT
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static
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QDF_STATUS dp_set_pdev_phyrx_error_mask(struct cdp_soc_t *cdp_soc,
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uint8_t pdev_id, uint32_t mask,
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uint32_t mask_cont)
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{
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struct dp_pdev *pdev =
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dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)cdp_soc,
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pdev_id);
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if (!pdev)
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return QDF_STATUS_E_FAILURE;
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return dp_monitor_config_undecoded_metadata_phyrx_error_mask(pdev,
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mask, mask_cont);
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}
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static
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QDF_STATUS dp_get_pdev_phyrx_error_mask(struct cdp_soc_t *cdp_soc,
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uint8_t pdev_id, uint32_t *mask,
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uint32_t *mask_cont)
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{
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struct dp_pdev *pdev =
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dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)cdp_soc,
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pdev_id);
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if (!pdev)
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return QDF_STATUS_E_FAILURE;
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return dp_monitor_get_undecoded_metadata_phyrx_error_mask(pdev,
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mask, mask_cont);
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}
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#endif
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#ifdef QCA_PEER_EXT_STATS
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static void dp_rx_update_peer_delay_stats(struct dp_soc *soc,
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qdf_nbuf_t nbuf)
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@@ -12165,6 +12199,10 @@ static struct cdp_ctrl_ops dp_ops_ctrl = {
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.txrx_set_tsf_ul_delay_report = dp_set_tsf_ul_delay_report,
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.txrx_get_uplink_delay = dp_get_uplink_delay,
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#endif
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#ifdef QCA_UNDECODED_METADATA_SUPPORT
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.txrx_set_pdev_phyrx_error_mask = dp_set_pdev_phyrx_error_mask,
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.txrx_get_pdev_phyrx_error_mask = dp_get_pdev_phyrx_error_mask,
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#endif
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};
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static struct cdp_me_ops dp_ops_me = {
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@@ -209,6 +209,8 @@ void dp_mon_filter_setup_undecoded_metadata_capture_1_0(struct dp_pdev *pdev)
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filter.tlv_filter.fp_phy_err = 1;
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filter.tlv_filter.fp_phy_err_buf_src = SW2RXDMA_BUF_SOURCE_RING;
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filter.tlv_filter.fp_phy_err_buf_dest = RXDMA2SW_RING;
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filter.tlv_filter.phy_err_mask = mon_pdev->phyrx_error_mask;
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filter.tlv_filter.phy_err_mask_cont = mon_pdev->phyrx_error_mask_cont;
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filter.tlv_filter.phy_err_filter_valid = 1;
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@@ -1001,6 +1001,10 @@ struct dp_mon_pdev {
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/* indicates if spcl vap is configured */
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bool scan_spcl_vap_configured;
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bool undecoded_metadata_capture;
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#ifdef QCA_UNDECODED_METADATA_SUPPORT
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uint32_t phyrx_error_mask;
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uint32_t phyrx_error_mask_cont;
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#endif
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#ifdef QCA_SUPPORT_SCAN_SPCL_VAP_STATS
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/* enable spcl vap stats reset on ch change */
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bool reset_scan_spcl_vap_stats_enable;
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@@ -2035,6 +2039,53 @@ QDF_STATUS dp_monitor_config_undecoded_metadata_capture(struct dp_pdev *pdev,
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return monitor_ops->mon_config_undecoded_metadata_capture(pdev, val);
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}
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static inline QDF_STATUS
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dp_monitor_config_undecoded_metadata_phyrx_error_mask(struct dp_pdev *pdev,
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int mask, int mask_cont)
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{
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struct dp_mon_ops *monitor_ops;
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struct dp_mon_pdev *mon_pdev = pdev->monitor_pdev;
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struct dp_mon_soc *mon_soc = pdev->soc->monitor_soc;
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if (!mon_soc)
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return QDF_STATUS_E_FAILURE;
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if (!mon_pdev)
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return QDF_STATUS_E_FAILURE;
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monitor_ops = mon_soc->mon_ops;
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if (!monitor_ops ||
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!monitor_ops->mon_config_undecoded_metadata_capture) {
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dp_mon_debug("callback not registered");
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return QDF_STATUS_E_FAILURE;
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}
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if (!mon_pdev->undecoded_metadata_capture) {
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qdf_info("mask:0x%x mask_cont:0x%x", mask, mask_cont);
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return QDF_STATUS_SUCCESS;
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}
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mon_pdev->phyrx_error_mask = mask;
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mon_pdev->phyrx_error_mask_cont = mask_cont;
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return monitor_ops->mon_config_undecoded_metadata_capture(pdev, 1);
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}
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static inline QDF_STATUS
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dp_monitor_get_undecoded_metadata_phyrx_error_mask(struct dp_pdev *pdev,
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int *mask, int *mask_cont)
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{
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struct dp_mon_pdev *mon_pdev = pdev->monitor_pdev;
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if (!mon_pdev)
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return QDF_STATUS_E_FAILURE;
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*mask = mon_pdev->phyrx_error_mask;
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*mask_cont = mon_pdev->phyrx_error_mask_cont;
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return QDF_STATUS_SUCCESS;
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}
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#else
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static inline
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QDF_STATUS dp_monitor_config_undecoded_metadata_capture(struct dp_pdev *pdev,
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@@ -2042,7 +2093,21 @@ QDF_STATUS dp_monitor_config_undecoded_metadata_capture(struct dp_pdev *pdev,
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{
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return QDF_STATUS_SUCCESS;
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}
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#endif
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static inline QDF_STATUS
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dp_monitor_config_undecoded_metadata_phyrx_error_mask(struct dp_pdev *pdev,
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int mask1, int mask2)
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{
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return QDF_STATUS_SUCCESS;
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}
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static inline QDF_STATUS
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dp_monitor_get_undecoded_metadata_phyrx_error_mask(struct dp_pdev *pdev,
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int *mask, int *mask_cont)
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{
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return QDF_STATUS_SUCCESS;
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}
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#endif /* QCA_UNDECODED_METADATA_SUPPORT */
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/*
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* dp_monitor_htt_srng_setup() - Setup htt srng
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@@ -49,6 +49,9 @@ int8_t *dp_mon_filter_mode_type_to_str[DP_MON_FILTER_MAX_MODE] = {
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"DP MON FILTER PKT LOG HYBRID MODE",
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#endif
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#endif /* WDI_EVENT_ENABLE */
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#ifdef QCA_UNDECODED_METADATA_SUPPORT
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"DP MON FILTER RX UNDECODED METADATA CAPTURE MODE",
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#endif
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};
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void dp_mon_filter_show_filter(struct dp_mon_pdev *mon_pdev,
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