qcacmn: Add support to configure phy error mask

The monitor status ring is configured for filtering
in undecoded phy error packets. Each phy error can
be controlled using a specific error mask configuration.

Added below cfg80211tool command to configure phy error
mask for filtering undecoded phy error packets.

cfg80211tool wifix set_phyrx_error_mask mask_0to31 mask_32to63
cfg80211tool wifix get_phyrx_error_mask

Change-Id: I5e4f6a49458cc534d6d1d0f7f2a7424f3cc747b4

dp/inc/cdp_txrx_ctrl.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -1428,4 +1429,53 @@ static inline QDF_STATUS cdp_get_uplink_delay(ol_txrx_soc_handle soc,
 }
 #endif /* WLAN_FEATURE_TSF_UPLINK_DELAY */
 
+#ifdef QCA_UNDECODED_METADATA_SUPPORT
+/**
+ * cdp_txrx_set_pdev_phyrx_error_mask() - set phyrx error mask
+ * @soc: opaque soc handle
+ * @pdev_id: id of data path pdev handle
+ * @mask1: mask to configure 0 to 31 phy error
+ * @mask2: mask to configure 32 to 63 phy error
+ *
+ * Return: status: 0 - Success, non-zero: Failure
+ */
+static inline
+QDF_STATUS cdp_txrx_set_pdev_phyrx_error_mask(ol_txrx_soc_handle soc,
+					      uint8_t pdev_id, uint32_t mask,
+					      uint32_t mask_cont)
+{
+	if (!soc || !soc->ops) {
+		dp_cdp_debug("Invalid Instance:");
+		QDF_BUG(0);
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	if (!soc->ops->ctrl_ops ||
+	    !soc->ops->ctrl_ops->txrx_set_pdev_phyrx_error_mask)
+		return QDF_STATUS_E_FAILURE;
+
+	return soc->ops->ctrl_ops->txrx_set_pdev_phyrx_error_mask
+			(soc, pdev_id, mask, mask_cont);
+}
+
+static inline
+QDF_STATUS cdp_txrx_get_pdev_phyrx_error_mask(ol_txrx_soc_handle soc,
+					      uint8_t pdev_id, uint32_t *mask,
+					      uint32_t *mask_cont)
+{
+	if (!soc || !soc->ops) {
+		dp_cdp_debug("Invalid Instance:");
+		QDF_BUG(0);
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	if (!soc->ops->ctrl_ops ||
+	    !soc->ops->ctrl_ops->txrx_get_pdev_phyrx_error_mask)
+		return QDF_STATUS_E_FAILURE;
+
+	return soc->ops->ctrl_ops->txrx_get_pdev_phyrx_error_mask
+			(soc, pdev_id, mask, mask_cont);
+}
+#endif
+
 #endif /* _CDP_TXRX_CTRL_H_ */