dsp: afe: Add support for Rx and TX codec dma interface

New codec dma interfaces have been introduced to connect
LPASS and Codec macros. This change is to add Rx and Tx
codec dma interface related updates to Q6 AFE native driver.

CRs-Fixed: 2281591
Change-Id: I2edbe904cd4c13801f06cdd7bd226a82db5d6d51
Signed-off-by: Aditya Bavanari <[email protected]>

dsp/q6afe.c

@@ -836,6 +836,20 @@ int afe_sizeof_cfg_cmd(u16 port_id)
 	case AFE_PORT_ID_WSA_CODEC_DMA_TX_2:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_0:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_0:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_0:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_1:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_2:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_2:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_3:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_3:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_4:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_4:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_5:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_5:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_6:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_7:
 		ret_size = SIZEOF_CFG_CMD(afe_param_id_cdc_dma_cfg_t);
 		break;
 	case AFE_PORT_ID_PRIMARY_PCM_RX:
@@ -3965,6 +3979,20 @@ static int __afe_port_start(u16 port_id, union afe_port_config *afe_config,
 	case AFE_PORT_ID_WSA_CODEC_DMA_TX_2:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_0:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_0:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_0:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_1:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_2:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_2:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_3:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_3:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_4:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_4:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_5:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_5:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_6:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_7:
 		cfg_type = AFE_PARAM_ID_CODEC_DMA_CONFIG;
 		break;
 	default:
@@ -4556,6 +4584,20 @@ int afe_open(u16 port_id,
 	case AFE_PORT_ID_WSA_CODEC_DMA_TX_2:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_0:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_0:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_0:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_1:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_2:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_2:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_3:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_3:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_4:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_4:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_5:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_5:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_6:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_7:
 		cfg_type = AFE_PARAM_ID_CODEC_DMA_CONFIG;
 		break;
 	default:

dsp/q6audio-v2.c

@@ -318,6 +318,34 @@ int q6audio_get_port_index(u16 port_id)
 		return IDX_AFE_PORT_ID_VA_CODEC_DMA_TX_0;
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_1:
 		return IDX_AFE_PORT_ID_VA_CODEC_DMA_TX_1;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_0:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_0;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_0:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_0;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_1:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_1;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_1:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_1;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_2:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_2;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_2:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_2;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_3:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_3;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_3:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_3;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_4:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_4;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_4:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_4;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_5:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_5;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_5:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_5;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_6:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_6;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_7:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_7;
 	default: return -EINVAL;
 	}
 }
@@ -626,6 +654,34 @@ int q6audio_get_port_id(u16 port_id)
 		return AFE_PORT_ID_VA_CODEC_DMA_TX_0;
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_1:
 		return AFE_PORT_ID_VA_CODEC_DMA_TX_1;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_0:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_0;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_0:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_0;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_1:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_1;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_1:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_1;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_2:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_2;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_2:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_2;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_3:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_3;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_3:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_3;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_4:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_4;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_4:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_4;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_5:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_5;
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_5:
+		return IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_5;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_6:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_6;
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_7:
+		return IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_7;
 	default:
 		pr_warn("%s: Invalid port_id %d\n", __func__, port_id);
 		return -EINVAL;
@@ -787,6 +843,20 @@ int q6audio_is_digital_pcm_interface(u16 port_id)
 	case AFE_PORT_ID_WSA_CODEC_DMA_TX_2:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_0:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_0:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_0:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_1:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_2:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_2:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_3:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_3:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_4:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_4:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_5:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_5:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_6:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_7:
 	case AFE_PORT_ID_PRIMARY_SPDIF_RX:
 	case AFE_PORT_ID_PRIMARY_SPDIF_TX:
 	case AFE_PORT_ID_SECONDARY_SPDIF_RX:
@@ -981,6 +1051,20 @@ int q6audio_validate_port(u16 port_id)
 	case AFE_PORT_ID_WSA_CODEC_DMA_TX_2:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_0:
 	case AFE_PORT_ID_VA_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_0:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_0:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_1:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_1:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_2:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_2:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_3:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_3:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_4:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_4:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_5:
+	case AFE_PORT_ID_TX_CODEC_DMA_TX_5:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_6:
+	case AFE_PORT_ID_RX_CODEC_DMA_RX_7:
 	{
 		ret = 0;
 		break;

include/dsp/apr_audio-v2.h

@@ -1311,6 +1311,48 @@ struct adm_cmd_connect_afe_port_v5 {
 /* AFE VA Codec DMA Tx port 1 */
 #define AFE_PORT_ID_VA_CODEC_DMA_TX_1            0xB023
 
+/* AFE Rx Codec DMA Rx port 0 */
+#define AFE_PORT_ID_RX_CODEC_DMA_RX_0            0xB030
+
+/* AFE Tx Codec DMA Tx port 0 */
+#define AFE_PORT_ID_TX_CODEC_DMA_TX_0            0xB031
+
+/* AFE Rx Codec DMA Rx port 1 */
+#define AFE_PORT_ID_RX_CODEC_DMA_RX_1            0xB032
+
+/* AFE Tx Codec DMA Tx port 1 */
+#define AFE_PORT_ID_TX_CODEC_DMA_TX_1            0xB033
+
+/* AFE Rx Codec DMA Rx port 2 */
+#define AFE_PORT_ID_RX_CODEC_DMA_RX_2            0xB034
+
+/* AFE Tx Codec DMA Tx port 2 */
+#define AFE_PORT_ID_TX_CODEC_DMA_TX_2            0xB035
+
+/* AFE Rx Codec DMA Rx port 3 */
+#define AFE_PORT_ID_RX_CODEC_DMA_RX_3            0xB036
+
+/* AFE Tx Codec DMA Tx port 3 */
+#define AFE_PORT_ID_TX_CODEC_DMA_TX_3            0xB037
+
+/* AFE Rx Codec DMA Rx port 4 */
+#define AFE_PORT_ID_RX_CODEC_DMA_RX_4            0xB038
+
+/* AFE Tx Codec DMA Tx port 4 */
+#define AFE_PORT_ID_TX_CODEC_DMA_TX_4            0xB039
+
+/* AFE Rx Codec DMA Rx port 5 */
+#define AFE_PORT_ID_RX_CODEC_DMA_RX_5            0xB03A
+
+/* AFE Tx Codec DMA Tx port 5 */
+#define AFE_PORT_ID_TX_CODEC_DMA_TX_5            0xB03B
+
+/* AFE Rx Codec DMA Rx port 6 */
+#define AFE_PORT_ID_RX_CODEC_DMA_RX_6            0xB03C
+
+/* AFE Rx Codec DMA Rx port 7 */
+#define AFE_PORT_ID_RX_CODEC_DMA_RX_7            0xB03E
+
 /* Generic pseudoport 1. */
 #define AFE_PORT_ID_PSEUDOPORT_01      0x8001
 /* Generic pseudoport 2. */

include/dsp/q6afe-v2.h

@@ -229,7 +229,7 @@ enum {
 	IDX_AFE_PORT_ID_QUINARY_TDM_TX_6,
 	IDX_AFE_PORT_ID_QUINARY_TDM_RX_7,
 	IDX_AFE_PORT_ID_QUINARY_TDM_TX_7,
-	/* IDX 161 to 167 */
+	/* IDX 161 to 181 */
 	IDX_AFE_PORT_ID_WSA_CODEC_DMA_RX_0,
 	IDX_AFE_PORT_ID_WSA_CODEC_DMA_TX_0,
 	IDX_AFE_PORT_ID_WSA_CODEC_DMA_RX_1,
@@ -237,7 +237,21 @@ enum {
 	IDX_AFE_PORT_ID_WSA_CODEC_DMA_TX_2,
 	IDX_AFE_PORT_ID_VA_CODEC_DMA_TX_0,
 	IDX_AFE_PORT_ID_VA_CODEC_DMA_TX_1,
-	/* IDX 168 to 170 */
+	IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_0,
+	IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_0,
+	IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_1,
+	IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_1,
+	IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_2,
+	IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_2,
+	IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_3,
+	IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_3,
+	IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_4,
+	IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_4,
+	IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_5,
+	IDX_AFE_PORT_ID_TX_CODEC_DMA_TX_5,
+	IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_6,
+	IDX_AFE_PORT_ID_RX_CODEC_DMA_RX_7,
+	/* IDX 182 to 185 */
 	IDX_SECONDARY_SPDIF_RX,
 	IDX_PRIMARY_SPDIF_TX,
 	IDX_SECONDARY_SPDIF_TX,