msm: camera: memmgr: Reduce potential mutex optimistic spin

When a client driver tries to obtain the HW iova for a given buffer,
the call is directed to SMMU layer. In mem_mgr each buffer entry
has it's own lock, but in SMMU it is a singleton lock for the
entire context bank. If there are multiple clients trying to
obtain iova for buffers from the same bank, it leads to waiting
on the same singleton mutex. To avoid this, when allocating
or mapping a buffer, save the iova addr of the buffer for a given
device in the mem_mgr bufq entry. When a client requests, check
the bufq entry for iova, redirect the call to SMMU only if the
address is not found in the mem_mgr. The change attempts to
reduce the number of CPU cycles in trying to obtain a buffer
iova.

CRs-Fixed: 3466755
Change-Id: I19b983ee59704eccf421ab808cbe885725571f5b
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>

drivers/cam_req_mgr/cam_mem_mgr.h

@@ -40,20 +40,39 @@ struct cam_presil_dmabuf_params {
 };
 #endif
 
+/**
+ * struct cam_mem_buf_hw_vaddr_info
+ *
+ * @iommu_hdl:     IOMMU handle for the given bank
+ * @vaddr:         IOVA of the buffer
+ * @len:           cached length for a given handle
+ * @addr_updated:  Indicates if entry is updated only for addr caching
+ * @valid_mapping: Indicates if entry is indeed a valid mapping for this buf
+ *
+ */
+struct cam_mem_buf_hw_hdl_info {
+	int32_t iommu_hdl;
+	dma_addr_t vaddr;
+	size_t len;
+
+	bool addr_updated;
+	bool valid_mapping;
+};
+
 /**
  * struct cam_mem_buf_queue
  *
  * @dma_buf:        pointer to the allocated dma_buf in the table
  * @q_lock:         mutex lock for buffer
- * @hdls:           list of mapped handles
- * @num_hdl:        number of handles
  * @fd:             file descriptor of buffer
  * @i_ino:          inode number of this dmabuf. Uniquely identifies a buffer
  * @buf_handle:     unique handle for buffer
  * @align:          alignment for allocation
  * @len:            size of buffer
  * @flags:          attributes of buffer
- * @vaddr:          IOVA of buffer
+ * @num_hdls:       number of valid handles
+ * @vaddr_info:     Array of IOVA addresses mapped for different devices
+ *                  using the same indexing as SMMU
  * @kmdvaddr:       Kernel virtual address
  * @active:         state of the buffer
  * @is_imported:    Flag indicating if buffer is imported from an FD in user space
@@ -64,16 +83,15 @@ struct cam_presil_dmabuf_params {
 struct cam_mem_buf_queue {
 	struct dma_buf *dma_buf;
 	struct mutex q_lock;
-	int32_t hdls[CAM_MEM_MMU_MAX_HANDLE];
-	int32_t num_hdl;
 	int32_t fd;
 	unsigned long i_ino;
 	int32_t buf_handle;
 	int32_t align;
 	size_t len;
 	uint32_t flags;
-	dma_addr_t vaddr;
 	uintptr_t kmdvaddr;
+	int32_t num_hdls;
+	struct cam_mem_buf_hw_hdl_info *hdls_info;
 	bool active;
 	bool is_imported;
 	bool is_internal;
@@ -92,6 +110,11 @@ struct cam_mem_buf_queue {
  * @bits: max bits of the utility
  * @bufq: array of buffers
  * @dbg_buf_idx: debug buffer index to get usecases info
+ * @max_hdls_supported: Maximum number of SMMU device handles supported
+ *                      A buffer can only be mapped for these number of
+ *                      device context banks
+ * @max_hdls_info_size: Size of the hdls array allocated per buffer,
+ *                      computed value to be used in driver
  * @force_cache_allocs: Force all internal buffer allocations with cache
  * @need_shared_buffer_padding: Whether padding is needed for shared buffer
  *                              allocations.
@@ -111,6 +134,8 @@ struct cam_mem_table {
 	size_t bits;
 	struct cam_mem_buf_queue bufq[CAM_MEM_BUFQ_MAX];
 	size_t dbg_buf_idx;
+	int32_t max_hdls_supported;
+	size_t max_hdls_info_size;
 	bool force_cache_allocs;
 	bool need_shared_buffer_padding;
 	struct cam_csf_version csf_version;