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video-drvier: update NOC register programming

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Update NOC register programming based on vpu
version like iris33 and iris3_2pipe.

Change-Id: I98e879cdd0f89584dfc2c6fad8345979403b2b3e
Signed-off-by: Manikanta Kanamarlapudi <quic_kmanikan@quicinc.com>
This commit is contained in:
Manikanta Kanamarlapudi
2023-07-31 14:24:11 +05:30
parent 3d17324c68
commit 3296a4dacb
5 changed files with 191 additions and 75 deletions
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2
driver/platform/cliffs/src/msm_vidc_cliffs.c
View File

@@ -5108,6 +5108,7 @@ static const struct msm_vidc_platform_data cliffs_data_v0 = {
.fwname = "vpu30_2v",
.pas_id = 9,
.supports_mmrm = 1,
.vpu_ver = VPU_VERSION_IRIS33_2P,
/* caps related resorces */
.core_data = core_data_cliffs_v0,
@@ -5194,6 +5195,7 @@ static const struct msm_vidc_platform_data cliffs_data_v1 = {
.csc_data.vpe_csc_custom_limit_coeff = vpe_csc_custom_limit_coeff,
.ubwc_config = ubwc_config_cliffs,
.format_data = &format_data_cliffs_v1,
.vpu_ver = VPU_VERSION_IRIS33_2P,
/* decoder properties related*/
.psc_avc_tbl = cliffs_vdec_psc_avc,

6
driver/platform/common/inc/msm_vidc_platform.h
View File

@@ -198,6 +198,11 @@ struct msm_vidc_format_capability {
u32 matrix_coeff_info_size;
};
enum vpu_version {
VPU_VERSION_IRIS33 = 1,
VPU_VERSION_IRIS33_2P, // IRIS3 2 PIPE
};
struct msm_vidc_platform_data {
const struct bw_table *bw_tbl;
unsigned int bw_tbl_size;
@@ -235,6 +240,7 @@ struct msm_vidc_platform_data {
struct msm_vidc_efuse_data *efuse_data;
unsigned int efuse_data_size;
unsigned int sku_version;
unsigned int vpu_ver;
struct msm_vidc_format_capability *format_data;
const u32 *psc_avc_tbl;
unsigned int psc_avc_tbl_size;

1
driver/platform/pineapple/src/msm_vidc_pineapple.c
View File

@@ -2905,6 +2905,7 @@ static const struct msm_vidc_platform_data pineapple_data = {
.fwname = "vpu33_4v",
.pas_id = 9,
.supports_mmrm = 1,
.vpu_ver = VPU_VERSION_IRIS33,
/* caps related resorces */
.core_data = core_data_pineapple,

1
driver/variant/iris33/src/msm_vidc_clock_iris33.c
View File

@@ -22,6 +22,7 @@ static u32 frequency_table_iris33[2][6] = {
{840, 720, 652, 570, 450, 294},
};
/*
* TODO Move to pineapple.c
* TODO Replace hardcoded values with

216
driver/variant/iris33/src/msm_vidc_iris33.c
View File

@@ -122,17 +122,30 @@ typedef enum {
* --------------------------------------------------------------------------
*/
#define NOC_BASE_OFFS 0x00010000
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW (NOC_BASE_OFFS + 0xA008)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW (NOC_BASE_OFFS + 0xA018)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW (NOC_BASE_OFFS + 0xA020)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH (NOC_BASE_OFFS + 0xA024)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW (NOC_BASE_OFFS + 0xA028)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH (NOC_BASE_OFFS + 0xA02C)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW (NOC_BASE_OFFS + 0xA030)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH (NOC_BASE_OFFS + 0xA034)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW (NOC_BASE_OFFS + 0xA038)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH (NOC_BASE_OFFS + 0xA03C)
#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW (NOC_BASE_OFFS + 0x7040)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33 (NOC_BASE_OFFS + 0xA008)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33 (NOC_BASE_OFFS + 0xA018)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW_IRIS33 (NOC_BASE_OFFS + 0xA020)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA024)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW_IRIS33 (NOC_BASE_OFFS + 0xA028)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA02C)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW_IRIS33 (NOC_BASE_OFFS + 0xA030)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA034)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33 (NOC_BASE_OFFS + 0xA038)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33 (NOC_BASE_OFFS + 0xA03C)
#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33 (NOC_BASE_OFFS + 0x7040)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3508)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3518)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3520)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x3524)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3528)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x352C)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3530)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x3534)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3538)
#define NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33_2P (NOC_BASE_OFFS + 0x353C)
#define NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33_2P (NOC_BASE_OFFS + 0x3240)
static int __interrupt_init_iris33(struct msm_vidc_core *core)
{
@@ -739,8 +752,9 @@ static int __power_on_iris33(struct msm_vidc_core *core)
* Programm NOC error registers before releasing xo reset
* Clear error logger registers and then enable StallEn
*/
if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33) {
rc = __write_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW, 0x1);
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33, 0x1);
if (rc) {
d_vpr_e(
"%s: error clearing NOC_MAIN_ERRORLOGGER_ERRCLR_LOW\n",
@@ -749,7 +763,7 @@ static int __power_on_iris33(struct msm_vidc_core *core)
}
rc = __write_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW, 0x3);
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33, 0x3);
if (rc) {
d_vpr_e(
"%s: failed to set NOC_ERL_MAIN_ERRORLOGGER_MAINCTL_LOW\n",
@@ -757,13 +771,42 @@ static int __power_on_iris33(struct msm_vidc_core *core)
goto fail_program_noc_regs;
}
rc = __write_register(core,
NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW, 0x1);
NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33,
0x1);
if (rc) {
d_vpr_e(
"%s: failed to set NOC_SIDEBANDMANAGER_FAULTINEN0_LOW\n",
__func__);
goto fail_program_noc_regs;
}
} else if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33_2P) {
rc = __write_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRCLR_LOW_IRIS33_2P, 0x1);
if (rc) {
d_vpr_e(
"%s: error clearing NOC_MAIN_ERRORLOGGER_ERRCLR_LOW\n",
__func__);
goto fail_program_noc_regs;
}
rc = __write_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_MAINCTL_LOW_IRIS33_2P, 0x3);
if (rc) {
d_vpr_e(
"%s: failed to set NOC_ERL_MAIN_ERRORLOGGER_MAINCTL_LOW\n",
__func__);
goto fail_program_noc_regs;
}
rc = __write_register(core,
NOC_SIDEBANDMANAGER_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW_IRIS33_2P,
0x1);
if (rc) {
d_vpr_e(
"%s: failed to set NOC_SIDEBANDMANAGER_FAULTINEN0_LOW\n",
__func__);
goto fail_program_noc_regs;
}
}
/* release reset control for other consumers */
rc = call_res_op(core, reset_control_release, core, "video_xo_reset");
@@ -877,9 +920,107 @@ static int __watchdog_iris33(struct msm_vidc_core *core, u32 intr_status)
return rc;
}
static int __read_noc_err_register_iris33(struct msm_vidc_core *core)
{
int rc = 0;
u32 value;
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW_IRIS33, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH_IRIS33, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW_IRIS33, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH_IRIS33, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW_IRIS33, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH_IRIS33, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH: %#x\n",
__func__, value);
return rc;
}
static int __read_noc_err_register_iris33_2p(struct msm_vidc_core *core)
{
int rc = 0;
u32 value;
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW_IRIS33_2P, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH_IRIS33_2P, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW_IRIS33_2P, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH_IRIS33_2P, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW_IRIS33_2P, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH_IRIS33_2P, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW_IRIS33_2P, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH_IRIS33_2P, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH: %#x\n",
__func__, value);
return rc;
}
static int __noc_error_info_iris33(struct msm_vidc_core *core)
{
u32 value, count = 0;
u32 count = 0;
int rc = 0;
/*
@@ -947,46 +1088,11 @@ static int __noc_error_info_iris33(struct msm_vidc_core *core)
goto fail_assert_xo_reset;
}
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG0_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG1_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG2_HIGH: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_LOW: %#x\n",
__func__, value);
rc = __read_register(core,
NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH, &value);
if (!rc)
d_vpr_e("%s: NOC_ERL_ERRORLOGGER_MAIN_ERRORLOGGER_ERRLOG3_HIGH: %#x\n",
__func__, value);
if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33)
rc = __read_noc_err_register_iris33(core);
else if (core->platform->data.vpu_ver == VPU_VERSION_IRIS33_2P)
rc = __read_noc_err_register_iris33_2p(core);
/* release reset control for other consumers */
rc = call_res_op(core, reset_control_release, core, "video_xo_reset");
if (rc) {