From 322f08f457b5b0fb9c96eb93889c39bb91638215 Mon Sep 17 00:00:00 2001 From: Meng Wang Date: Tue, 28 Sep 2021 14:23:52 +0800 Subject: [PATCH] asoc: lpass-cdc: reset RX_TX_CORE_CLK and WSA_TX_CORE_CLK during SSR/PDR Sometimes after SSR/DPR is triggered, RX_TX_CORE_CLK, WSA_TX_CORE_CLK and WSA2_TX_CORE_CLK are not reset which causes WSA or WCD not detected. Make this change to add reset during SSR. Change-Id: I343f2f92244de3eee844e220a6201b389dc647b4 Signed-off-by: Meng Wang --- asoc/codecs/lpass-cdc/lpass-cdc-rx-macro.c | 1 + asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c | 1 + asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c | 3 ++- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/asoc/codecs/lpass-cdc/lpass-cdc-rx-macro.c b/asoc/codecs/lpass-cdc/lpass-cdc-rx-macro.c index 820bb73f5e..90f917a0be 100644 --- a/asoc/codecs/lpass-cdc/lpass-cdc-rx-macro.c +++ b/asoc/codecs/lpass-cdc/lpass-cdc-rx-macro.c @@ -1567,6 +1567,7 @@ static int lpass_cdc_rx_macro_event_handler(struct snd_soc_component *component, break; case LPASS_CDC_MACRO_EVT_CLK_RESET: lpass_cdc_rsc_clk_reset(rx_dev, RX_CORE_CLK); + lpass_cdc_rsc_clk_reset(rx_dev, RX_TX_CORE_CLK); break; case LPASS_CDC_MACRO_EVT_RX_PA_GAIN_UPDATE: rx_priv->rx0_gain_val = snd_soc_component_read(component, diff --git a/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c b/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c index d9cd5dc732..fe9661fb06 100644 --- a/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c +++ b/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c @@ -998,6 +998,7 @@ static int lpass_cdc_wsa_macro_event_handler(struct snd_soc_component *component break; case LPASS_CDC_MACRO_EVT_CLK_RESET: lpass_cdc_rsc_clk_reset(wsa_dev, WSA_CORE_CLK); + lpass_cdc_rsc_clk_reset(wsa_dev, WSA_TX_CORE_CLK); break; } return 0; diff --git a/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c b/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c index 7095154785..b2da78e141 100644 --- a/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c +++ b/asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c @@ -997,7 +997,8 @@ static int lpass_cdc_wsa2_macro_event_handler(struct snd_soc_component *componen SWR_DEVICE_SSR_UP, NULL); break; case LPASS_CDC_MACRO_EVT_CLK_RESET: - lpass_cdc_rsc_clk_reset(wsa2_dev, WSA_CORE_CLK); + lpass_cdc_rsc_clk_reset(wsa2_dev, WSA2_CORE_CLK); + lpass_cdc_rsc_clk_reset(wsa2_dev, WSA2_TX_CORE_CLK); break; } return 0;