samsung-sm8650/android_kernel_samsung_sm8650-modules
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asoc: codec: update SOC_SINGLE_SX_TLV to SOC_SINGLE_S8_TLV

소스 검색 
Update SOC_SINGLE_SX_TLV to SOC_SINGLE_S8_TLV to make codec
driver compatiable with upstream driver.

Change-Id: I4061b015d715978f3b294ad630f53b64bf66c2b7
Signed-off-by: Meng Wang <mengw@codeaurora.org>
This commit is contained in:
Meng Wang
2020-04-27 09:18:27 +08:00
부모 127718f3d9
커밋 30fad2dc20
6개의 변경된 파일과 205개의 추가작업 그리고 202개의 파일을 삭제
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106
asoc/codecs/wcd934x/wcd934x.c
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@@ -6548,77 +6548,77 @@ static const struct snd_kcontrol_new tavil_snd_controls[] = {
SOC_SINGLE_TLV("ADC3 Volume", WCD934X_ANA_AMIC3, 0, 20, 0, analog_gain),
SOC_SINGLE_TLV("ADC4 Volume", WCD934X_ANA_AMIC4, 0, 20, 0, analog_gain),
SOC_SINGLE_SX_TLV("RX0 Digital Volume", WCD934X_CDC_RX0_RX_VOL_CTL,
0, -84, 40, digital_gain), /* -84dB min - 40dB max */
SOC_SINGLE_SX_TLV("RX1 Digital Volume", WCD934X_CDC_RX1_RX_VOL_CTL,
0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX2 Digital Volume", WCD934X_CDC_RX2_RX_VOL_CTL,
0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX3 Digital Volume", WCD934X_CDC_RX3_RX_VOL_CTL,
0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX4 Digital Volume", WCD934X_CDC_RX4_RX_VOL_CTL,
0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX7 Digital Volume", WCD934X_CDC_RX7_RX_VOL_CTL,
0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX8 Digital Volume", WCD934X_CDC_RX8_RX_VOL_CTL,
0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX0 Mix Digital Volume",
WCD934X_CDC_RX0_RX_VOL_MIX_CTL, 0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX1 Mix Digital Volume",
WCD934X_CDC_RX1_RX_VOL_MIX_CTL, 0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX2 Mix Digital Volume",
WCD934X_CDC_RX2_RX_VOL_MIX_CTL, 0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX3 Mix Digital Volume",
WCD934X_CDC_RX3_RX_VOL_MIX_CTL, 0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX4 Mix Digital Volume",
WCD934X_CDC_RX4_RX_VOL_MIX_CTL, 0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX7 Mix Digital Volume",
WCD934X_CDC_RX7_RX_VOL_MIX_CTL, 0, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("RX8 Mix Digital Volume",
WCD934X_CDC_RX8_RX_VOL_MIX_CTL, 0, -84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX0 Digital Volume", WCD934X_CDC_RX0_RX_VOL_CTL,
-84, 40, digital_gain), /* -84dB min - 40dB max */
SOC_SINGLE_S8_TLV("RX1 Digital Volume", WCD934X_CDC_RX1_RX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX2 Digital Volume", WCD934X_CDC_RX2_RX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX3 Digital Volume", WCD934X_CDC_RX3_RX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX4 Digital Volume", WCD934X_CDC_RX4_RX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX7 Digital Volume", WCD934X_CDC_RX7_RX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX8 Digital Volume", WCD934X_CDC_RX8_RX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX0 Mix Digital Volume",
WCD934X_CDC_RX0_RX_VOL_MIX_CTL, -84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX1 Mix Digital Volume",
WCD934X_CDC_RX1_RX_VOL_MIX_CTL, -84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX2 Mix Digital Volume",
WCD934X_CDC_RX2_RX_VOL_MIX_CTL, -84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX3 Mix Digital Volume",
WCD934X_CDC_RX3_RX_VOL_MIX_CTL, -84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX4 Mix Digital Volume",
WCD934X_CDC_RX4_RX_VOL_MIX_CTL, -84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX7 Mix Digital Volume",
WCD934X_CDC_RX7_RX_VOL_MIX_CTL, -84, 40, digital_gain),
SOC_SINGLE_S8_TLV("RX8 Mix Digital Volume",
WCD934X_CDC_RX8_RX_VOL_MIX_CTL, -84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC0 Volume", WCD934X_CDC_TX0_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC0 Volume", WCD934X_CDC_TX0_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC1 Volume", WCD934X_CDC_TX1_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC1 Volume", WCD934X_CDC_TX1_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC2 Volume", WCD934X_CDC_TX2_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC2 Volume", WCD934X_CDC_TX2_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC3 Volume", WCD934X_CDC_TX3_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC3 Volume", WCD934X_CDC_TX3_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC4 Volume", WCD934X_CDC_TX4_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC4 Volume", WCD934X_CDC_TX4_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC5 Volume", WCD934X_CDC_TX5_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC5 Volume", WCD934X_CDC_TX5_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC6 Volume", WCD934X_CDC_TX6_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC6 Volume", WCD934X_CDC_TX6_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC7 Volume", WCD934X_CDC_TX7_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC7 Volume", WCD934X_CDC_TX7_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("DEC8 Volume", WCD934X_CDC_TX8_TX_VOL_CTL, 0,
SOC_SINGLE_S8_TLV("DEC8 Volume", WCD934X_CDC_TX8_TX_VOL_CTL,
-84, 40, digital_gain),
SOC_SINGLE_SX_TLV("IIR0 INP0 Volume",
WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B1_CTL, 0, -84, 40,
SOC_SINGLE_S8_TLV("IIR0 INP0 Volume",
WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B1_CTL, -84, 40,
digital_gain),
SOC_SINGLE_SX_TLV("IIR0 INP1 Volume",
WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B2_CTL, 0, -84, 40,
SOC_SINGLE_S8_TLV("IIR0 INP1 Volume",
WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B2_CTL, -84, 40,
digital_gain),
SOC_SINGLE_SX_TLV("IIR0 INP2 Volume",
WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B3_CTL, 0, -84, 40,
SOC_SINGLE_S8_TLV("IIR0 INP2 Volume",
WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B3_CTL, -84, 40,
digital_gain),
SOC_SINGLE_SX_TLV("IIR0 INP3 Volume",
WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B4_CTL, 0, -84, 40,
SOC_SINGLE_S8_TLV("IIR0 INP3 Volume",
WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B4_CTL, -84, 40,
digital_gain),
SOC_SINGLE_SX_TLV("IIR1 INP0 Volume",
WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B1_CTL, 0, -84, 40,
SOC_SINGLE_S8_TLV("IIR1 INP0 Volume",
WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B1_CTL, -84, 40,
digital_gain),
SOC_SINGLE_SX_TLV("IIR1 INP1 Volume",
WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B2_CTL, 0, -84, 40,
SOC_SINGLE_S8_TLV("IIR1 INP1 Volume",
WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B2_CTL, -84, 40,
digital_gain),
SOC_SINGLE_SX_TLV("IIR1 INP2 Volume",
WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B3_CTL, 0, -84, 40,
SOC_SINGLE_S8_TLV("IIR1 INP2 Volume",
WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B3_CTL, -84, 40,
digital_gain),
SOC_SINGLE_SX_TLV("IIR1 INP3 Volume",
WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B4_CTL, 0, -84, 40,
SOC_SINGLE_S8_TLV("IIR1 INP3 Volume",
WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B4_CTL, -84, 40,
digital_gain),
SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 100, 0, tavil_get_anc_slot,