disp: msm: dsi: add mutex lock before link clock frequency update

Acquire mngr clk_mutex before updating link clock frequencies.
Failing this may lead to race around condition while setting the
link clock frequency rates.
Make sure byteclk and pclk rates of PLL are configured according
to clock manager and not the controller.

Change-Id: I2cd26e659ce166d5bc55eb6c060672eeee192bea
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
This commit is contained in:
Anand Tarakh
2023-02-23 15:33:21 +05:30
parent 04e6f35c65
commit 307aea3dc1
4 changed files with 126 additions and 19 deletions

View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
*/
@@ -1114,11 +1114,6 @@ static int dsi_ctrl_update_link_freqs(struct dsi_ctrl *dsi_ctrl,
dsi_ctrl->clk_freq.pix_clk_rate = pclk_rate;
dsi_ctrl->clk_freq.esc_clk_rate = config->esc_clk_rate_hz;
rc = dsi_clk_set_link_frequencies(clk_handle, dsi_ctrl->clk_freq,
dsi_ctrl->cell_index);
if (rc)
DSI_CTRL_ERR(dsi_ctrl, "Failed to update link frequencies\n");
return rc;
}