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qcacld-3.0: Add QDF osdep changes

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Replace CDF osdep with QDF osdep

Change-Id: Id2ba89c75df1fb8c4973a87219785353c3c2ff3c
CRs-Fixed: 981188
This commit is contained in:
Anurag Chouhan
2016-02-22 15:07:01 +05:30
committed by Gerrit - the friendly Code Review server
parent c554842327
commit 2ed1fced92
11 changed files with 154 additions and 453 deletions
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4
core/cdf/inc/cdf_nbuf.h
View File

@@ -835,7 +835,7 @@ static inline qdf_nbuf_tx_cksum_t cdf_nbuf_get_tx_cksum(cdf_nbuf_t buf)
} }
/** /**
* qdf_nbuf_set_rx_cksum() - drivers that support hw checksumming use this to * cdf_nbuf_set_rx_cksum() - drivers that support hw checksumming use this to
* indicate checksum info to the stack. * indicate checksum info to the stack.
* @buf: Network buffer * @buf: Network buffer
* @cksum: Checksum * @cksum: Checksum
@@ -843,7 +843,7 @@ static inline qdf_nbuf_tx_cksum_t cdf_nbuf_get_tx_cksum(cdf_nbuf_t buf)
* Return: none * Return: none
*/ */
static inline void static inline void
qdf_nbuf_set_rx_cksum(cdf_nbuf_t buf, qdf_nbuf_rx_cksum_t *cksum) cdf_nbuf_set_rx_cksum(cdf_nbuf_t buf, qdf_nbuf_rx_cksum_t *cksum)
{ {
__cdf_nbuf_set_rx_cksum(buf, cksum); __cdf_nbuf_set_rx_cksum(buf, cksum);
} }

300
core/cdf/inc/osdep.h
View File

@@ -1,300 +0,0 @@
/*
* Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/*
* This file was originally distributed by Qualcomm Atheros, Inc.
* under proprietary terms before Copyright ownership was assigned
* to the Linux Foundation.
*/
#ifndef _OSDEP_H
#define _OSDEP_H
#include <qdf_types.h>
#include <cdf_memory.h>
#include <qdf_lock.h>
#include <qdf_time.h>
#include <qdf_timer.h>
#include <qdf_defer.h>
#include <cdf_nbuf.h>
#include <cds_if_upperproto.h>
#include <cds_queue.h>
/**
* enum ath_hal_bus_type - Supported Bus types
* @HAL_BUS_TYPE_PCI: PCI Bus
* @HAL_BUS_TYPE_AHB: AHB Bus
* @HAL_BUS_TYPE_SNOC: SNOC Bus
* @HAL_BUS_TYPE_SIM: Simulator
*/
enum ath_hal_bus_type {
HAL_BUS_TYPE_PCI,
HAL_BUS_TYPE_AHB,
HAL_BUS_TYPE_SNOC,
HAL_BUS_TYPE_SIM
};
/**
* sturct hal_bus_context - Bus to hal context handoff
* @bc_tag: bus context tag
* @bc_handle: bus context handle
* @bc_bustype: bus type
*/
typedef struct hal_bus_context {
int bc_tag;
char *bc_handle;
enum ath_hal_bus_type bc_bustype;
} HAL_BUS_CONTEXT;
#define INLINE inline
/* ATH_DEBUG -
* Control whether debug features (printouts, assertions) are compiled
* into the driver.
*/
#ifndef ATH_DEBUG
#define ATH_DEBUG 1 /* default: include debug code */
#endif
#if ATH_DEBUG
#ifndef ASSERT
#define ASSERT(expr) qdf_assert(expr)
#endif
#else
#define ASSERT(expr)
#endif /* ATH_DEBUG */
/*
* Need to define byte order based on the CPU configuration.
*/
#ifndef _LITTLE_ENDIAN
#define _LITTLE_ENDIAN 1234
#endif
#ifndef _BIG_ENDIAN
#define _BIG_ENDIAN 4321
#endif
#ifdef __BIG_ENDIAN
#define _BYTE_ORDER _BIG_ENDIAN
#else
#define _BYTE_ORDER _LITTLE_ENDIAN
#endif
/*
* Deduce if tasklets are available. If not then
* fall back to using the immediate work queue.
*/
#define ath_sysctl_decl(f, ctl, write, filp, buffer, lenp, ppos) \
f(struct ctl_table *ctl, int write, void *buffer, \
size_t *lenp, loff_t *ppos)
#define ATH_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer, lenp, ppos) \
proc_dointvec(ctl, write, buffer, lenp, ppos)
#define ATH_SYSCTL_PROC_DOSTRING(ctl, write, filp, buffer, lenp, ppos) \
proc_dostring(ctl, write, filp, buffer, lenp, ppos)
/*
* Byte Order stuff
*/
#define le16toh(_x) le16_to_cpu(_x)
#define htole16(_x) cpu_to_le16(_x)
#define htobe16(_x) cpu_to_be16(_x)
#define le32toh(_x) le32_to_cpu(_x)
#define htole32(_x) cpu_to_le32(_x)
#define be16toh(_x) be16_to_cpu(_x)
#define be32toh(_x) be32_to_cpu(_x)
#define htobe32(_x) cpu_to_be32(_x)
#define EOK (0)
#ifndef false
#define false 0
#endif
#ifndef true
#define true 1
#endif
#ifndef ARPHRD_IEEE80211
#define ARPHRD_IEEE80211 801 /* IEEE 802.11. */
#endif
/*
* Normal Delay functions. Time specified in microseconds.
*/
#define OS_DELAY(_us) qdf_udelay(_us)
/*
* memory data manipulation functions.
*/
#define OS_MEMCPY(_dst, _src, _len) cdf_mem_copy(_dst, _src, _len)
#define OS_MEMMOVE(_dst, _src, _len) cdf_mem_move(_dst, _src, _len)
#define OS_MEMZERO(_buf, _len) cdf_mem_zero(_buf, _len)
#define OS_MEMSET(_buf, _ch, _len) cdf_mem_set(_buf, _len, _ch)
#define OS_MEMCMP(_mem1, _mem2, _len) cdf_mem_compare(_mem1, _mem2, _len)
#ifdef CONFIG_SMP
/* Undo the one provided by the kernel to debug spin locks */
#undef spin_lock
#undef spin_unlock
#undef spin_trylock
#define spin_lock(x) \
do { \
spin_lock_bh(x); \
} while (0)
#define spin_unlock(x) \
do { \
if (!spin_is_locked(x)) { \
WARN_ON(1); \
printk(KERN_EMERG " %s:%d unlock addr=%p, %s \n", __func__, __LINE__, x, \
!spin_is_locked(x) ? "Not locked" : ""); \
} \
spin_unlock_bh(x); \
} while (0)
#define spin_trylock(x) spin_trylock_bh(x)
#define OS_SUPPORT_ASYNC_Q 1 /* support for handling asyn function calls */
#else
#define OS_SUPPORT_ASYNC_Q 0
#endif /* ifdef CONFIG_SMP */
/*
* System time interface
*/
typedef qdf_time_t systime_t;
typedef qdf_time_t systick_t;
static INLINE qdf_time_t os_get_timestamp(void)
{
return qdf_system_ticks(); /* Fix double conversion from jiffies to ms */
}
struct _NIC_DEV;
typedef struct _NIC_DEV *osdev_t;
typedef struct timer_list os_timer_t;
typedef struct _os_mesg_t {
STAILQ_ENTRY(_os_mesg_t) mesg_next;
uint16_t mesg_type;
uint16_t mesg_len;
/* followed by mesg_len bytes */
} os_mesg_t;
typedef void (*os_mesg_handler_t)(void *ctx,
uint16_t mesg_type,
uint16_t mesg_len, void *mesg);
typedef struct {
osdev_t dev_handle;
int32_t num_queued;
int32_t mesg_len;
uint8_t *mesg_queue_buf;
STAILQ_HEAD(, _os_mesg_t) mesg_head; /* queued mesg buffers */
STAILQ_HEAD(, _os_mesg_t) mesg_free_head; /* free mesg buffers */
spinlock_t lock;
spinlock_t ev_handler_lock;
#ifdef USE_SOFTINTR
void *_task;
#else
os_timer_t _timer;
#endif
os_mesg_handler_t handler;
void *ctx;
uint8_t is_synchronous : 1;
} os_mesg_queue_t;
/*
* Definition of OS-dependent device structure.
* It'll be opaque to the actual ATH layer.
*/
struct _NIC_DEV {
void *bdev; /* bus device handle */
struct net_device *netdev; /* net device handle (wifi%d) */
qdf_bh_t intr_tq; /* tasklet */
struct net_device_stats devstats; /* net device statisitics */
HAL_BUS_CONTEXT bc;
#ifdef ATH_PERF_PWR_OFFLOAD
struct device *device; /* generic device */
wait_queue_head_t event_queue;
#endif /* PERF_PWR_OFFLOAD */
#if OS_SUPPORT_ASYNC_Q
os_mesg_queue_t async_q; /* mesgq to handle async calls */
#endif
#ifdef ATH_BUS_PM
uint8_t isDeviceAsleep;
#endif /* ATH_BUS_PM */
};
static INLINE unsigned char *os_malloc(osdev_t pNicDev,
unsigned long ulSizeInBytes, int gfp)
{
return cdf_mem_malloc(ulSizeInBytes);
}
#define OS_FREE(_p) cdf_mem_free(_p)
#define OS_DMA_MEM_CONTEXT(context) \
dma_addr_t context;
#define OS_GET_DMA_MEM_CONTEXT(var, field) \
&(var->field)
#define OS_COPY_DMA_MEM_CONTEXT(dst, src) \
*dst = *src
#define OS_ZERO_DMA_MEM_CONTEXT(context) \
*context = 0
/*
* Timer Interfaces. Use these macros to declare timer
* and retrieve timer argument. This is mainly for resolving
* different argument types for timer function in different OS.
*/
#define OS_DECLARE_TIMER(_fn) void _fn(void *)
#define os_timer_func(_fn) \
void _fn(void *timer_arg)
#define OS_GET_TIMER_ARG(_arg, _type) \
(_arg) = (_type)(timer_arg)
#define OS_INIT_TIMER(_osdev, _timer, _fn, _ctx, type) \
qdf_timer_init(_osdev, _timer, _fn, _ctx, type)
#define OS_SET_TIMER(_timer, _ms) qdf_timer_mod(_timer, _ms)
#define OS_CANCEL_TIMER(_timer) qdf_timer_stop(_timer)
#define OS_FREE_TIMER(_timer) qdf_timer_stop(_timer)
/*
* These are required for network manager support
*/
#ifndef SET_NETDEV_DEV
#define SET_NETDEV_DEV(ndev, pdev)
#endif
#endif /* end of _OSDEP_H */

2
core/dp/htt/htt_rx.c
View File

@@ -704,7 +704,7 @@ htt_set_checksum_result_ll(htt_pdev_handle pdev, cdf_nbuf_t msdu,
QDF_NBUF_RX_CKSUM_NONE : QDF_NBUF_RX_CKSUM_NONE :
QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY; QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
} }
qdf_nbuf_set_rx_cksum(msdu, &cksum); cdf_nbuf_set_rx_cksum(msdu, &cksum);
#undef MAX_IP_VER #undef MAX_IP_VER
#undef MAX_PROTO_VAL #undef MAX_PROTO_VAL
} }

2
core/dp/htt/htt_tx.c
View File

@@ -525,7 +525,7 @@ void htt_tx_desc_frags_table_set(htt_pdev_handle pdev,
} }
} }
/* PUT THESE AS INLINE IN ol_htt_tx_api.h */ /* PUT THESE AS inline IN ol_htt_tx_api.h */
void htt_tx_desc_flag_postponed(htt_pdev_handle pdev, void *desc) void htt_tx_desc_flag_postponed(htt_pdev_handle pdev, void *desc)
{ {

12
core/hdd/src/wlan_hdd_driver_ops.c
View File

@@ -221,7 +221,7 @@ static void hdd_deinit_cds_hif_context(void)
* Return: 0 on success and errno on failure. * Return: 0 on success and errno on failure.
*/ */
static int hdd_hif_open(struct device *dev, void *bdev, const hif_bus_id *bid, static int hdd_hif_open(struct device *dev, void *bdev, const hif_bus_id *bid,
enum ath_hal_bus_type bus_type, bool reinit) enum qdf_bus_type bus_type, bool reinit)
{ {
QDF_STATUS status; QDF_STATUS status;
int ret = 0; int ret = 0;
@@ -324,7 +324,7 @@ void hdd_init_cdf_ctx(struct device *dev, void *bdev)
* Return: 0 on successfull probe * Return: 0 on successfull probe
*/ */
static int wlan_hdd_probe(struct device *dev, void *bdev, const hif_bus_id *bid, static int wlan_hdd_probe(struct device *dev, void *bdev, const hif_bus_id *bid,
enum ath_hal_bus_type bus_type, bool reinit) enum qdf_bus_type bus_type, bool reinit)
{ {
void *hif_ctx; void *hif_ctx;
QDF_STATUS status; QDF_STATUS status;
@@ -792,7 +792,7 @@ static int wlan_hdd_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *id) const struct pci_device_id *id)
{ {
return wlan_hdd_probe(&pdev->dev, pdev, (void *)id, return wlan_hdd_probe(&pdev->dev, pdev, (void *)id,
HAL_BUS_TYPE_PCI, false); QDF_BUS_TYPE_PCI, false);
} }
/** /**
@@ -816,7 +816,7 @@ int wlan_hdd_pci_reinit(struct pci_dev *pdev,
const struct pci_device_id *id) const struct pci_device_id *id)
{ {
return wlan_hdd_probe(&pdev->dev, pdev, id, return wlan_hdd_probe(&pdev->dev, pdev, id,
HAL_BUS_TYPE_PCI, true); QDF_BUS_TYPE_PCI, true);
} }
/** /**
@@ -910,7 +910,7 @@ static int wlan_hdd_pci_runtime_resume(struct pci_dev *pdev)
*/ */
static int wlan_hdd_snoc_probe(struct device *dev) static int wlan_hdd_snoc_probe(struct device *dev)
{ {
return wlan_hdd_probe(dev, NULL, NULL, HAL_BUS_TYPE_SNOC, false); return wlan_hdd_probe(dev, NULL, NULL, QDF_BUS_TYPE_SNOC, false);
} }
/** /**
@@ -943,7 +943,7 @@ void wlan_hdd_snoc_shutdown(struct device *dev)
*/ */
int wlan_hdd_snoc_reinit(struct device *dev) int wlan_hdd_snoc_reinit(struct device *dev)
{ {
return wlan_hdd_probe(dev, NULL, NULL, HAL_BUS_TYPE_SNOC, true); return wlan_hdd_probe(dev, NULL, NULL, QDF_BUS_TYPE_SNOC, true);
} }
/** /**

3
core/sap/dfs/src/dfs.c
View File

@@ -229,8 +229,7 @@ int dfs_attach(struct ieee80211com *ic)
return 1; return 1;
} }
dfs = dfs = (struct ath_dfs *)os_malloc(NULL, sizeof(struct ath_dfs),
(struct ath_dfs *)os_malloc(NULL, sizeof(struct ath_dfs),
GFP_ATOMIC); GFP_ATOMIC);
if (dfs == NULL) { if (dfs == NULL) {

12
core/utils/pktlog/linux_ac.c
View File

@@ -201,7 +201,7 @@ void pktlog_cleanup(struct ath_pktlog_info *pl_info)
/* sysctl procfs handler to enable pktlog */ /* sysctl procfs handler to enable pktlog */
static int static int
ath_sysctl_decl(ath_sysctl_pktlog_enable, ctl, write, filp, buffer, lenp, ppos) qdf_sysctl_decl(ath_sysctl_pktlog_enable, ctl, write, filp, buffer, lenp, ppos)
{ {
int ret, enable; int ret, enable;
ol_ath_generic_softc_handle scn; ol_ath_generic_softc_handle scn;
@@ -227,7 +227,7 @@ ath_sysctl_decl(ath_sysctl_pktlog_enable, ctl, write, filp, buffer, lenp, ppos)
ctl->maxlen = sizeof(enable); ctl->maxlen = sizeof(enable);
if (write) { if (write) {
ret = ATH_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer, ret = QDF_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer,
lenp, ppos); lenp, ppos);
if (ret == 0) if (ret == 0)
ret = pl_dev->pl_funcs->pktlog_enable( ret = pl_dev->pl_funcs->pktlog_enable(
@@ -236,7 +236,7 @@ ath_sysctl_decl(ath_sysctl_pktlog_enable, ctl, write, filp, buffer, lenp, ppos)
printk(PKTLOG_TAG "%s:proc_dointvec failed\n", printk(PKTLOG_TAG "%s:proc_dointvec failed\n",
__func__); __func__);
} else { } else {
ret = ATH_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer, ret = QDF_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer,
lenp, ppos); lenp, ppos);
if (ret) if (ret)
printk(PKTLOG_TAG "%s:proc_dointvec failed\n", printk(PKTLOG_TAG "%s:proc_dointvec failed\n",
@@ -256,7 +256,7 @@ static int get_pktlog_bufsize(struct ol_pktlog_dev_t *pl_dev)
/* sysctl procfs handler to set/get pktlog size */ /* sysctl procfs handler to set/get pktlog size */
static int static int
ath_sysctl_decl(ath_sysctl_pktlog_size, ctl, write, filp, buffer, lenp, ppos) qdf_sysctl_decl(ath_sysctl_pktlog_size, ctl, write, filp, buffer, lenp, ppos)
{ {
int ret, size; int ret, size;
ol_ath_generic_softc_handle scn; ol_ath_generic_softc_handle scn;
@@ -282,14 +282,14 @@ ath_sysctl_decl(ath_sysctl_pktlog_size, ctl, write, filp, buffer, lenp, ppos)
ctl->maxlen = sizeof(size); ctl->maxlen = sizeof(size);
if (write) { if (write) {
ret = ATH_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer, ret = QDF_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer,
lenp, ppos); lenp, ppos);
if (ret == 0) if (ret == 0)
ret = pl_dev->pl_funcs->pktlog_setsize( ret = pl_dev->pl_funcs->pktlog_setsize(
(struct hif_opaque_softc *)scn, size); (struct hif_opaque_softc *)scn, size);
} else { } else {
size = get_pktlog_bufsize(pl_dev); size = get_pktlog_bufsize(pl_dev);
ret = ATH_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer, ret = QDF_SYSCTL_PROC_DOINTVEC(ctl, write, filp, buffer,
lenp, ppos); lenp, ppos);
} }

2
core/wma/inc/wma_dfs_interface.h
View File

@@ -274,7 +274,7 @@ typedef struct ieee80211com {
* *
* Return: freqency in MHz * Return: freqency in MHz
*/ */
static INLINE u_int static inline u_int
ieee80211_chan2freq(struct ieee80211com *ic, ieee80211_chan2freq(struct ieee80211com *ic,
const struct dfs_ieee80211_channel *c) const struct dfs_ieee80211_channel *c)
{ {

10
target/inc/htt_isoc.h
View File

@@ -90,13 +90,13 @@ typedef enum htt_isoc_t2h_msg_type {
#define HTT_ISOC_T2H_MSG_TYPE_GET(msg_addr) \ #define HTT_ISOC_T2H_MSG_TYPE_GET(msg_addr) \
(*((A_UINT8 *) msg_addr)) (*((A_UINT8 *) msg_addr))
#ifndef INLINE #ifndef inline
/* target FW */ /* target FW */
#define INLINE __inline #define inline __inline
#define HTT_ISOC_INLINE_DEF #define HTT_ISOC_INLINE_DEF
#endif /* INLINE */ #endif /* inline */
static INLINE void static inline void
htt_isoc_t2h_field_set(A_UINT32 *msg_addr32, htt_isoc_t2h_field_set(A_UINT32 *msg_addr32,
unsigned offset32, unsigned offset32,
unsigned mask, unsigned shift, unsigned value) unsigned mask, unsigned shift, unsigned value)
@@ -113,7 +113,7 @@ htt_isoc_t2h_field_set(A_UINT32 *msg_addr32,
#ifdef HTT_ISOC_INLINE_DEF #ifdef HTT_ISOC_INLINE_DEF
#undef HTT_ISOC_INLINE_DEF #undef HTT_ISOC_INLINE_DEF
#undef INLINE #undef inline
#endif #endif
#define HTT_ISOC_T2H_FIELD_GET(msg_addr32, offset32, mask, shift) \ #define HTT_ISOC_T2H_FIELD_GET(msg_addr32, offset32, mask, shift) \

216
target/inc/wmi_unified.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2013-2015 The Linux Foundation. All rights reserved. * Copyright (c) 2013-2016 The Linux Foundation. All rights reserved.
* *
* Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
* *
@@ -89,7 +89,7 @@ extern "C" {
* ar6000_internal.h to be included, it may not be defined as yet. * ar6000_internal.h to be included, it may not be defined as yet.
*/ */
#define WMI_F_MS(_v, _f) \ #define WMI_F_MS(_v, _f) \
( ((_v) & (_f)) >> (_f ## _S) ) (((_v) & (_f)) >> (_f ## _S))
/* /*
* This breaks the "good macro practice" of only referencing each * This breaks the "good macro practice" of only referencing each
@@ -98,7 +98,7 @@ extern "C" {
#define WMI_F_RMW(_var, _v, _f) \ #define WMI_F_RMW(_var, _v, _f) \
do { \ do { \
(_var) &= ~(_f); \ (_var) &= ~(_f); \
(_var) |= ( ((_v) << (_f ## _S)) & (_f)); \ (_var) |= (((_v) << (_f ## _S)) & (_f)); \
} while (0) } while (0)
#define WMI_GET_BITS(_val, _index, _num_bits) \ #define WMI_GET_BITS(_val, _index, _num_bits) \
@@ -121,7 +121,7 @@ extern "C" {
(((num_entries) / (32 / (bits_per_entry))) + \ (((num_entries) / (32 / (bits_per_entry))) + \
(((num_entries) % (32 / (bits_per_entry))) ? 1 : 0)) (((num_entries) % (32 / (bits_per_entry))) ? 1 : 0))
static INLINE A_UINT32 wmi_packed_arr_get_bits(A_UINT32 * arr, static inline A_UINT32 wmi_packed_arr_get_bits(A_UINT32 *arr,
A_UINT32 entry_index, A_UINT32 bits_per_entry) A_UINT32 entry_index, A_UINT32 bits_per_entry)
{ {
A_UINT32 entries_per_uint = (32 / bits_per_entry); A_UINT32 entries_per_uint = (32 / bits_per_entry);
@@ -129,11 +129,11 @@ static INLINE A_UINT32 wmi_packed_arr_get_bits(A_UINT32 * arr,
A_UINT32 num_entries_in_prev_uints = (uint_index * entries_per_uint); A_UINT32 num_entries_in_prev_uints = (uint_index * entries_per_uint);
A_UINT32 index_in_uint = (entry_index - num_entries_in_prev_uints); A_UINT32 index_in_uint = (entry_index - num_entries_in_prev_uints);
A_UINT32 start_bit_in_uint = (index_in_uint * bits_per_entry); A_UINT32 start_bit_in_uint = (index_in_uint * bits_per_entry);
return ((arr[uint_index] >> start_bit_in_uint) & return (arr[uint_index] >> start_bit_in_uint) &
((1 << bits_per_entry) - 1)); ((1 << bits_per_entry) - 1);
} }
static INLINE void wmi_packed_arr_set_bits(A_UINT32 *arr, A_UINT32 entry_index, static inline void wmi_packed_arr_set_bits(A_UINT32 *arr, A_UINT32 entry_index,
A_UINT32 bits_per_entry, A_UINT32 val) A_UINT32 bits_per_entry, A_UINT32 val)
{ {
A_UINT32 entries_per_uint = (32 / bits_per_entry); A_UINT32 entries_per_uint = (32 / bits_per_entry);
@@ -156,23 +156,23 @@ typedef struct {
} wmi_mac_addr; } wmi_mac_addr;
/** macro to convert MAC address from WMI word format to char array */ /** macro to convert MAC address from WMI word format to char array */
#define WMI_MAC_ADDR_TO_CHAR_ARRAY(pwmi_mac_addr,c_macaddr) do { \ #define WMI_MAC_ADDR_TO_CHAR_ARRAY(pwmi_mac_addr, c_macaddr) do { \
(c_macaddr)[0] = ((pwmi_mac_addr)->mac_addr31to0) & 0xff; \ (c_macaddr)[0] = ((pwmi_mac_addr)->mac_addr31to0) & 0xff; \
(c_macaddr)[1] = ( ((pwmi_mac_addr)->mac_addr31to0) >> 8) & 0xff; \ (c_macaddr)[1] = (((pwmi_mac_addr)->mac_addr31to0) >> 8) & 0xff; \
(c_macaddr)[2] = ( ((pwmi_mac_addr)->mac_addr31to0) >> 16) & 0xff; \ (c_macaddr)[2] = (((pwmi_mac_addr)->mac_addr31to0) >> 16) & 0xff; \
(c_macaddr)[3] = ( ((pwmi_mac_addr)->mac_addr31to0) >> 24) & 0xff; \ (c_macaddr)[3] = (((pwmi_mac_addr)->mac_addr31to0) >> 24) & 0xff; \
(c_macaddr)[4] = ((pwmi_mac_addr)->mac_addr47to32) & 0xff; \ (c_macaddr)[4] = ((pwmi_mac_addr)->mac_addr47to32) & 0xff; \
(c_macaddr)[5] = ( ((pwmi_mac_addr)->mac_addr47to32) >> 8) & 0xff; \ (c_macaddr)[5] = (((pwmi_mac_addr)->mac_addr47to32) >> 8) & 0xff; \
} while(0) } while (0)
/** macro to convert MAC address from char array to WMI word format */ /** macro to convert MAC address from char array to WMI word format */
#define WMI_CHAR_ARRAY_TO_MAC_ADDR(c_macaddr,pwmi_mac_addr) do { \ #define WMI_CHAR_ARRAY_TO_MAC_ADDR(c_macaddr, pwmi_mac_addr) do { \
(pwmi_mac_addr)->mac_addr31to0 = \ (pwmi_mac_addr)->mac_addr31to0 = \
( (c_macaddr)[0] | ((c_macaddr)[1] << 8) \ ((c_macaddr)[0] | ((c_macaddr)[1] << 8) \
| ((c_macaddr)[2] << 16) | ((c_macaddr)[3] << 24) ); \ | ((c_macaddr)[2] << 16) | ((c_macaddr)[3] << 24)); \
(pwmi_mac_addr)->mac_addr47to32 = \ (pwmi_mac_addr)->mac_addr47to32 = \
( (c_macaddr)[4] | ((c_macaddr)[5] << 8)); \ ((c_macaddr)[4] | ((c_macaddr)[5] << 8)); \
} while(0) } while (0)
/* /*
* wmi command groups. * wmi command groups.
@@ -1265,12 +1265,12 @@ typedef enum {
/** channel info consists of 6 bits of channel mode */ /** channel info consists of 6 bits of channel mode */
#define WMI_SET_CHANNEL_MODE(pwmi_channel,val) do { \ #define WMI_SET_CHANNEL_MODE(pwmi_channel, val) do { \
(pwmi_channel)->info &= 0xffffffc0; \ (pwmi_channel)->info &= 0xffffffc0; \
(pwmi_channel)->info |= (val); \ (pwmi_channel)->info |= (val); \
} while(0) } while (0)
#define WMI_GET_CHANNEL_MODE(pwmi_channel) ((pwmi_channel)->info & 0x0000003f ) #define WMI_GET_CHANNEL_MODE(pwmi_channel) ((pwmi_channel)->info & 0x0000003f)
#define WMI_CHAN_FLAG_HT40_PLUS 6 #define WMI_CHAN_FLAG_HT40_PLUS 6
#define WMI_CHAN_FLAG_PASSIVE 7 #define WMI_CHAN_FLAG_PASSIVE 7
@@ -1283,48 +1283,48 @@ typedef enum {
#define WMI_CHAN_FLAG_HALF_RATE 14 /* Indicates half rate channel */ #define WMI_CHAN_FLAG_HALF_RATE 14 /* Indicates half rate channel */
#define WMI_CHAN_FLAG_QUARTER_RATE 15 /* Indicates quarter rate channel */ #define WMI_CHAN_FLAG_QUARTER_RATE 15 /* Indicates quarter rate channel */
#define WMI_SET_CHANNEL_FLAG(pwmi_channel,flag) do { \ #define WMI_SET_CHANNEL_FLAG(pwmi_channel, flag) do { \
(pwmi_channel)->info |= (1 << flag); \ (pwmi_channel)->info |= (1 << flag); \
} while(0) } while (0)
#define WMI_GET_CHANNEL_FLAG(pwmi_channel,flag) \ #define WMI_GET_CHANNEL_FLAG(pwmi_channel, flag) \
(((pwmi_channel)->info & (1 << flag)) >> flag) (((pwmi_channel)->info & (1 << flag)) >> flag)
#define WMI_SET_CHANNEL_MIN_POWER(pwmi_channel,val) do { \ #define WMI_SET_CHANNEL_MIN_POWER(pwmi_channel, val) do { \
(pwmi_channel)->reg_info_1 &= 0xffffff00; \ (pwmi_channel)->reg_info_1 &= 0xffffff00; \
(pwmi_channel)->reg_info_1 |= (val&0xff); \ (pwmi_channel)->reg_info_1 |= (val&0xff); \
} while(0) } while (0)
#define WMI_GET_CHANNEL_MIN_POWER(pwmi_channel) ((pwmi_channel)->reg_info_1 & 0xff ) #define WMI_GET_CHANNEL_MIN_POWER(pwmi_channel) ((pwmi_channel)->reg_info_1 & 0xff)
#define WMI_SET_CHANNEL_MAX_POWER(pwmi_channel,val) do { \ #define WMI_SET_CHANNEL_MAX_POWER(pwmi_channel, val) do { \
(pwmi_channel)->reg_info_1 &= 0xffff00ff; \ (pwmi_channel)->reg_info_1 &= 0xffff00ff; \
(pwmi_channel)->reg_info_1 |= ((val&0xff) << 8); \ (pwmi_channel)->reg_info_1 |= ((val&0xff) << 8); \
} while(0) } while (0)
#define WMI_GET_CHANNEL_MAX_POWER(pwmi_channel) ( (((pwmi_channel)->reg_info_1) >> 8) & 0xff ) #define WMI_GET_CHANNEL_MAX_POWER(pwmi_channel) ((((pwmi_channel)->reg_info_1) >> 8) & 0xff)
#define WMI_SET_CHANNEL_REG_POWER(pwmi_channel,val) do { \ #define WMI_SET_CHANNEL_REG_POWER(pwmi_channel, val) do { \
(pwmi_channel)->reg_info_1 &= 0xff00ffff; \ (pwmi_channel)->reg_info_1 &= 0xff00ffff; \
(pwmi_channel)->reg_info_1 |= ((val&0xff) << 16); \ (pwmi_channel)->reg_info_1 |= ((val&0xff) << 16); \
} while(0) } while (0)
#define WMI_GET_CHANNEL_REG_POWER(pwmi_channel) ( (((pwmi_channel)->reg_info_1) >> 16) & 0xff ) #define WMI_GET_CHANNEL_REG_POWER(pwmi_channel) ((((pwmi_channel)->reg_info_1) >> 16) & 0xff)
#define WMI_SET_CHANNEL_REG_CLASSID(pwmi_channel,val) do { \ #define WMI_SET_CHANNEL_REG_CLASSID(pwmi_channel, val) do { \
(pwmi_channel)->reg_info_1 &= 0x00ffffff; \ (pwmi_channel)->reg_info_1 &= 0x00ffffff; \
(pwmi_channel)->reg_info_1 |= ((val&0xff) << 24); \ (pwmi_channel)->reg_info_1 |= ((val&0xff) << 24); \
} while(0) } while (0)
#define WMI_GET_CHANNEL_REG_CLASSID(pwmi_channel) ( (((pwmi_channel)->reg_info_1) >> 24) & 0xff ) #define WMI_GET_CHANNEL_REG_CLASSID(pwmi_channel) ((((pwmi_channel)->reg_info_1) >> 24) & 0xff)
#define WMI_SET_CHANNEL_ANTENNA_MAX(pwmi_channel,val) do { \ #define WMI_SET_CHANNEL_ANTENNA_MAX(pwmi_channel, val) do { \
(pwmi_channel)->reg_info_2 &= 0xffffff00; \ (pwmi_channel)->reg_info_2 &= 0xffffff00; \
(pwmi_channel)->reg_info_2 |= (val&0xff); \ (pwmi_channel)->reg_info_2 |= (val&0xff); \
} while(0) } while (0)
#define WMI_GET_CHANNEL_ANTENNA_MAX(pwmi_channel) ((pwmi_channel)->reg_info_2 & 0xff ) #define WMI_GET_CHANNEL_ANTENNA_MAX(pwmi_channel) ((pwmi_channel)->reg_info_2 & 0xff)
/* max tx power is in 1 dBm units */ /* max tx power is in 1 dBm units */
#define WMI_SET_CHANNEL_MAX_TX_POWER(pwmi_channel,val) do { \ #define WMI_SET_CHANNEL_MAX_TX_POWER(pwmi_channel, val) do { \
(pwmi_channel)->reg_info_2 &= 0xffff00ff; \ (pwmi_channel)->reg_info_2 &= 0xffff00ff; \
(pwmi_channel)->reg_info_2 |= ((val&0xff)<<8); \ (pwmi_channel)->reg_info_2 |= ((val&0xff)<<8); \
} while(0) } while (0)
#define WMI_GET_CHANNEL_MAX_TX_POWER(pwmi_channel) ( (((pwmi_channel)->reg_info_2)>>8) & 0xff ) #define WMI_GET_CHANNEL_MAX_TX_POWER(pwmi_channel) ((((pwmi_channel)->reg_info_2)>>8) & 0xff)
/** HT Capabilities*/ /** HT Capabilities*/
@@ -1417,7 +1417,7 @@ typedef enum {
/* Interested readers refer to Rx/Tx MCS Map definition as defined in /* Interested readers refer to Rx/Tx MCS Map definition as defined in
802.11ac 802.11ac
*/ */
#define WMI_VHT_MAX_MCS_4_SS_MASK(r,ss) ((3 & (r)) << (((ss) - 1) << 1)) #define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000 #define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16 #define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
@@ -2617,10 +2617,10 @@ typedef struct {
* assumptions; don't be clever with them. * assumptions; don't be clever with them.
*/ */
#define WMI_UNIFIED_FREQ_INFO_GET(hdr, f) \ #define WMI_UNIFIED_FREQ_INFO_GET(hdr, f) \
( WMI_F_MS( (hdr)->freq_info_1, \ (WMI_F_MS((hdr)->freq_info_1, \
WMI_UNIFIED_FREQINFO_ ## f ## _LO ) \ WMI_UNIFIED_FREQINFO_ ## f ## _LO) \
| (WMI_F_MS( (hdr)->freq_info_1, \ | (WMI_F_MS((hdr)->freq_info_1, \
WMI_UNIFIED_FREQINFO_ ## f ## _HI ) << 8) ) WMI_UNIFIED_FREQINFO_ ## f ## _HI) << 8))
#define WMI_UNIFIED_FREQ_INFO_SET(hdr, f, v) \ #define WMI_UNIFIED_FREQ_INFO_SET(hdr, f, v) \
do { \ do { \
@@ -2638,7 +2638,7 @@ typedef struct {
#define WMI_UNIFIED_FREQINFO_2_PHYERRCODE_S 16 #define WMI_UNIFIED_FREQINFO_2_PHYERRCODE_S 16
#define WMI_UNIFIED_RSSI_COMB_GET(hdr) \ #define WMI_UNIFIED_RSSI_COMB_GET(hdr) \
( (int8_t) (WMI_F_MS((hdr)->freq_info_2, \ ((int8_t) (WMI_F_MS((hdr)->freq_info_2, \
WMI_UNIFIED_FREQINFO_2_RSSI_COMB))) WMI_UNIFIED_FREQINFO_2_RSSI_COMB)))
#define WMI_UNIFIED_RSSI_COMB_SET(hdr, v) \ #define WMI_UNIFIED_RSSI_COMB_SET(hdr, v) \
@@ -2714,7 +2714,7 @@ typedef struct {
/* PHY ERROR MASK 0 */ /* PHY ERROR MASK 0 */
/* bits 1:0 defined but not published */ /* bits 1:0 defined but not published */
#define WMI_PHY_ERROR_MASK0_RADAR (1<<2 ) #define WMI_PHY_ERROR_MASK0_RADAR (1<<2)
/* bits 23:3 defined but not published */ /* bits 23:3 defined but not published */
#define WMI_PHY_ERROR_MASK0_FALSE_RADAR_EXT (1<<24) #define WMI_PHY_ERROR_MASK0_FALSE_RADAR_EXT (1<<24)
/* bits 25:24 defined but not published */ /* bits 25:24 defined but not published */
@@ -4686,11 +4686,11 @@ enum wmi_pkt_type {
}; };
typedef struct { typedef struct {
A_UINT8 sutxbfee : 1, mutxbfee : 1, sutxbfer : 1, mutxbfer : 1, A_UINT8 sutxbfee:1, mutxbfee:1, sutxbfer:1, mutxbfer:1,
#if defined(AR900B) #if defined(AR900B)
txb_sts_cap : 3, implicit_bf : 1; txb_sts_cap:3, implicit_bf:1;
#else #else
reserved : 4; reserved:4;
#endif #endif
} wmi_vdev_txbf_en; } wmi_vdev_txbf_en;
@@ -4956,7 +4956,11 @@ enum wmi_sta_ps_param_pspoll_count {
#define WMI_UAPSD_AC_TYPE_DELI 0 #define WMI_UAPSD_AC_TYPE_DELI 0
#define WMI_UAPSD_AC_TYPE_TRIG 1 #define WMI_UAPSD_AC_TYPE_TRIG 1
#define WMI_UAPSD_AC_BIT_MASK(ac,type) (type == WMI_UAPSD_AC_TYPE_DELI) ? (1<<(ac<<1)) : (1<<((ac<<1)+1)) #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
do { \
(type == WMI_UAPSD_AC_TYPE_DELI) ? (1<<(ac<<1)) : \
(1<<((ac<<1)+1)) \
} while (0)
enum wmi_sta_ps_param_uapsd { enum wmi_sta_ps_param_uapsd {
WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
@@ -6365,11 +6369,11 @@ typedef struct {
#define WMI_SET_ROAM_OFFLOAD_OKC_ENABLED(flag) do { \ #define WMI_SET_ROAM_OFFLOAD_OKC_ENABLED(flag) do { \
(flag) |= (1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED); \ (flag) |= (1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED); \
} while(0) } while (0)
#define WMI_SET_ROAM_OFFLOAD_OKC_DISABLED(flag) do { \ #define WMI_SET_ROAM_OFFLOAD_OKC_DISABLED(flag) do { \
(flag) &= ~(1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED); \ (flag) &= ~(1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED); \
} while(0) } while (0)
#define WMI_GET_ROAM_OFFLOAD_OKC_ENABLED(flag) \ #define WMI_GET_ROAM_OFFLOAD_OKC_ENABLED(flag) \
((flag) & (1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED)) ((flag) & (1 << WMI_ROAM_OFFLOAD_FLAG_OKC_ENABLED))
@@ -6499,11 +6503,11 @@ typedef struct {
#define WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE(flag) do { \ #define WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE(flag) do { \
(flag) |= (1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE); \ (flag) |= (1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE); \
} while(0) } while (0)
#define WMI_CLEAR_ROAM_INVOKE_ADD_CH_TO_CACHE(flag) do { \ #define WMI_CLEAR_ROAM_INVOKE_ADD_CH_TO_CACHE(flag) do { \
(flag) &= ~(1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE); \ (flag) &= ~(1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE); \
} while(0) } while (0)
#define WMI_GET_ROAM_INVOKE_ADD_CH_TO_CACHE(flag) \ #define WMI_GET_ROAM_INVOKE_ADD_CH_TO_CACHE(flag) \
((flag) & (1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE)) ((flag) & (1 << WMI_SET_ROAM_INVOKE_ADD_CH_TO_CACHE))
@@ -7880,7 +7884,7 @@ typedef struct wmi_nlo_event {
* array will end on a 4-byte boundary. * array will end on a 4-byte boundary.
* (This 4-byte alignment simplifies endianness-correction byte swapping.) * (This 4-byte alignment simplifies endianness-correction byte swapping.)
*/ */
A_COMPILE_TIME_ASSERT(check_passpoint_realm_size,(PASSPOINT_REALM_LEN % sizeof(A_UINT32)) == 0); A_COMPILE_TIME_ASSERT(check_passpoint_realm_size, (PASSPOINT_REALM_LEN % sizeof(A_UINT32)) == 0);
/* /*
* Confirm the product of PASSPOINT_ROAMING_CONSORTIUM_ID_NUM and * Confirm the product of PASSPOINT_ROAMING_CONSORTIUM_ID_NUM and
@@ -8586,10 +8590,10 @@ typedef struct {
#define WMI_TDLS_QOS_SP_FLAG 5 #define WMI_TDLS_QOS_SP_FLAG 5
#define WMI_TDLS_QOS_MOREDATA_FLAG 7 #define WMI_TDLS_QOS_MOREDATA_FLAG 7
#define WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps,flag) do { \ #define WMI_TDLS_PEER_SET_QOS_FLAG(ppeer_caps, flag) do { \
(ppeer_caps)->peer_qos |= (1 << flag); \ (ppeer_caps)->peer_qos |= (1 << flag); \
} while(0) } while (0)
#define WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps,flag) \ #define WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, flag) \
(((ppeer_caps)->peer_qos & (1 << flag)) >> flag) (((ppeer_caps)->peer_qos & (1 << flag)) >> flag)
#define WMI_SET_TDLS_PEER_VO_UAPSD(ppeer_caps) \ #define WMI_SET_TDLS_PEER_VO_UAPSD(ppeer_caps) \
@@ -8613,9 +8617,9 @@ typedef struct {
#define WMI_GET_TDLS_PEER_ACK_UAPSD(ppeer_caps) \ #define WMI_GET_TDLS_PEER_ACK_UAPSD(ppeer_caps) \
WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_ACK_FLAG) WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_ACK_FLAG)
/* SP has 2 bits */ /* SP has 2 bits */
#define WMI_SET_TDLS_PEER_SP_UAPSD(ppeer_caps,val) do { \ #define WMI_SET_TDLS_PEER_SP_UAPSD(ppeer_caps, val) do { \
(ppeer_caps)->peer_qos |= (((val)&0x3) << WMI_TDLS_QOS_SP_FLAG); \ (ppeer_caps)->peer_qos |= (((val)&0x3) << WMI_TDLS_QOS_SP_FLAG); \
} while(0) } while (0)
#define WMI_GET_TDLS_PEER_SP_UAPSD(ppeer_caps) \ #define WMI_GET_TDLS_PEER_SP_UAPSD(ppeer_caps) \
(((ppeer_caps)->peer_qos & (0x3 << WMI_TDLS_QOS_SP_FLAG)) >> WMI_TDLS_QOS_SP_FLAG) (((ppeer_caps)->peer_qos & (0x3 << WMI_TDLS_QOS_SP_FLAG)) >> WMI_TDLS_QOS_SP_FLAG)
@@ -8624,10 +8628,10 @@ typedef struct {
#define WMI_GET_TDLS_PEER_MORE_DATA_ACK_UAPSD(ppeer_caps) \ #define WMI_GET_TDLS_PEER_MORE_DATA_ACK_UAPSD(ppeer_caps) \
WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_MOREDATA_FLAG) WMI_TDLS_PEER_GET_QOS_FLAG(ppeer_caps, WMI_TDLS_QOS_MOREDATA_FLAG)
#define WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd,flag) do { \ #define WMI_TDLS_SELF_SET_QOS_FLAG(pset_cmd, flag) do { \
(pset_cmd)->tdls_puapsd_mask |= (1 << flag); \ (pset_cmd)->tdls_puapsd_mask |= (1 << flag); \
} while(0) } while (0)
#define WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd,flag) \ #define WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, flag) \
(((pset_cmd)->tdls_puapsd_mask & (1 << flag)) >> flag) (((pset_cmd)->tdls_puapsd_mask & (1 << flag)) >> flag)
#define WMI_SET_TDLS_SELF_VO_UAPSD(pset_cmd) \ #define WMI_SET_TDLS_SELF_VO_UAPSD(pset_cmd) \
@@ -8651,9 +8655,9 @@ typedef struct {
#define WMI_GET_TDLS_SELF_ACK_UAPSD(pset_cmd) \ #define WMI_GET_TDLS_SELF_ACK_UAPSD(pset_cmd) \
WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_ACK_FLAG) WMI_TDLS_SELF_GET_QOS_FLAG(pset_cmd, WMI_TDLS_QOS_ACK_FLAG)
/* SP has 2 bits */ /* SP has 2 bits */
#define WMI_SET_TDLS_SELF_SP_UAPSD(pset_cmd,val) do { \ #define WMI_SET_TDLS_SELF_SP_UAPSD(pset_cmd, val) do { \
(pset_cmd)->tdls_puapsd_mask |= (((val)&0x3) << WMI_TDLS_QOS_SP_FLAG); \ (pset_cmd)->tdls_puapsd_mask |= (((val)&0x3) << WMI_TDLS_QOS_SP_FLAG); \
} while(0) } while (0)
#define WMI_GET_TDLS_SELF_SP_UAPSD(pset_cmd) \ #define WMI_GET_TDLS_SELF_SP_UAPSD(pset_cmd) \
(((pset_cmd)->tdls_puapsd_mask & (0x3 << WMI_TDLS_QOS_SP_FLAG)) >> WMI_TDLS_QOS_SP_FLAG) (((pset_cmd)->tdls_puapsd_mask & (0x3 << WMI_TDLS_QOS_SP_FLAG)) >> WMI_TDLS_QOS_SP_FLAG)
@@ -9615,43 +9619,43 @@ typedef struct {
/** Bit map definition for basic_config_info starts */ /** Bit map definition for basic_config_info starts */
#define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_S 0 #define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_S 0
#define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET (0x1f << WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_S) #define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET (0x1f << WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_S)
#define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET) #define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET)
#define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_SET(x,z) WMI_F_RMW(x,(z) & 0x1f,WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET) #define WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET_SET(x, z) WMI_F_RMW(x, (z) & 0x1f, WMI_TPC_CHAINMASK_CONFIG_TPC_OFFSET)
#define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_S 5 #define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_S 5
#define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET (0x1f << WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_S) #define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET (0x1f << WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_S)
#define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET) #define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET)
#define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_SET(x,z) WMI_F_RMW(x, (z) & 0x1f, WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET) #define WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET_SET(x, z) WMI_F_RMW(x, (z) & 0x1f, WMI_TPC_CHAINMASK_CONFIG_ACK_OFFSET)
#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_S 10 #define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_S 10
#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK (0x3 << WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_S) #define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK (0x3 << WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_S)
#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_CHAINMASK) #define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_CHAINMASK)
#define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_SET(x,z) WMI_F_RMW(x, (z)&0x3, WMI_TPC_CHAINMASK_CONFIG_CHAINMASK) #define WMI_TPC_CHAINMASK_CONFIG_CHAINMASK_SET(x, z) WMI_F_RMW(x, (z)&0x3, WMI_TPC_CHAINMASK_CONFIG_CHAINMASK)
#define WMI_TPC_CHAINMASK_CONFIG_BT_S 12 #define WMI_TPC_CHAINMASK_CONFIG_BT_S 12
#define WMI_TPC_CHAINMASK_CONFIG_BT (0x3 << WMI_TPC_CHAINMASK_CONFIG_BT_S) #define WMI_TPC_CHAINMASK_CONFIG_BT (0x3 << WMI_TPC_CHAINMASK_CONFIG_BT_S)
#define WMI_TPC_CHAINMASK_CONFIG_BT_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_BT) #define WMI_TPC_CHAINMASK_CONFIG_BT_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_BT)
#define WMI_TPC_CHAINMASK_CONFIG_BT_SET(x,z) WMI_F_RMW(x, (z)&0x3, WMI_TPC_CHAINMASK_CONFIG_BT) #define WMI_TPC_CHAINMASK_CONFIG_BT_SET(x, z) WMI_F_RMW(x, (z)&0x3, WMI_TPC_CHAINMASK_CONFIG_BT)
#define WMI_TPC_CHAINMASK_CONFIG_STBC_S 14 #define WMI_TPC_CHAINMASK_CONFIG_STBC_S 14
#define WMI_TPC_CHAINMASK_CONFIG_STBC (0x3 << WMI_TPC_CHAINMASK_CONFIG_STBC_S) #define WMI_TPC_CHAINMASK_CONFIG_STBC (0x3 << WMI_TPC_CHAINMASK_CONFIG_STBC_S)
#define WMI_TPC_CHAINMASK_CONFIG_STBC_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_STBC) #define WMI_TPC_CHAINMASK_CONFIG_STBC_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_STBC)
#define WMI_TPC_CHAINMASK_CONFIG_STBC_SET(x,z) WMI_F_RMW(x, (z)& 0x3, WMI_TPC_CHAINMASK_CONFIG_STBC) #define WMI_TPC_CHAINMASK_CONFIG_STBC_SET(x, z) WMI_F_RMW(x, (z) & 0x3, WMI_TPC_CHAINMASK_CONFIG_STBC)
#define WMI_TPC_CHAINMASK_CONFIG_BAND_S 16 #define WMI_TPC_CHAINMASK_CONFIG_BAND_S 16
#define WMI_TPC_CHAINMASK_CONFIG_BAND (0x1 << WMI_TPC_CHAINMASK_CONFIG_BAND_S) #define WMI_TPC_CHAINMASK_CONFIG_BAND (0x1 << WMI_TPC_CHAINMASK_CONFIG_BAND_S)
#define WMI_TPC_CHAINMASK_CONFIG_BAND_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_BAND) #define WMI_TPC_CHAINMASK_CONFIG_BAND_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_BAND)
#define WMI_TPC_CHAINMASK_CONFIG_BAND_SET(x,z) WMI_F_RMW(x, (z) &0x1, WMI_TPC_CHAINMASK_CONFIG_BAND) #define WMI_TPC_CHAINMASK_CONFIG_BAND_SET(x, z) WMI_F_RMW(x, (z) & 0x1, WMI_TPC_CHAINMASK_CONFIG_BAND)
#define WMI_TPC_CHAINMASK_CONFIG_STREAM_S 17 #define WMI_TPC_CHAINMASK_CONFIG_STREAM_S 17
#define WMI_TPC_CHAINMASK_CONFIG_STREAM (0x1 << WMI_TPC_CHAINMASK_CONFIG_STREAM_S) #define WMI_TPC_CHAINMASK_CONFIG_STREAM (0x1 << WMI_TPC_CHAINMASK_CONFIG_STREAM_S)
#define WMI_TPC_CHAINMASK_CONFIG_STREAM_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_STREAM) #define WMI_TPC_CHAINMASK_CONFIG_STREAM_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_STREAM)
#define WMI_TPC_CHAINMASK_CONFIG_STREAM_SET(x,z) WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_STREAM) #define WMI_TPC_CHAINMASK_CONFIG_STREAM_SET(x, z) WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_STREAM)
#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_S 18 #define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_S 18
#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE (0x7 << WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_S) #define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE (0x7 << WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_S)
#define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_PHY_MODE) #define WMI_TPC_CHAINMASK_CONFIG_PHY_MODE_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_PHY_MODE)
#define WMI_TPC_CHAINAMSK_CONFIG_PHY_MODE_SET(x,z) WMI_F_RMW(x, (z)&0x7, WMI_TPC_CHAINMASK_CONFIG_PHY_MODE) #define WMI_TPC_CHAINAMSK_CONFIG_PHY_MODE_SET(x, z) WMI_F_RMW(x, (z)&0x7, WMI_TPC_CHAINMASK_CONFIG_PHY_MODE)
#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_S 21 #define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_S 21
/* /*
@@ -9661,8 +9665,8 @@ typedef struct {
*/ */
#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_EXIST WMI_TPC_CHAINMASK_CONFIG_CHANNEL #define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_EXIST WMI_TPC_CHAINMASK_CONFIG_CHANNEL
#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL (0x1 << WMI_TPC_CHAINMASK_CONFIG_CHANNEL_S) #define WMI_TPC_CHAINMASK_CONFIG_CHANNEL (0x1 << WMI_TPC_CHAINMASK_CONFIG_CHANNEL_S)
#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_GET(x) WMI_F_MS(x,WMI_TPC_CHAINMASK_CONFIG_CHANNEL) #define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_CHANNEL)
#define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_SET(x,z) WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_CHANNEL) #define WMI_TPC_CHAINMASK_CONFIG_CHANNEL_SET(x, z) WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_CHANNEL)
#define WMI_TPC_CHAINMASK_CONFIG_RATE_S 22 #define WMI_TPC_CHAINMASK_CONFIG_RATE_S 22
/* /*
@@ -9673,7 +9677,7 @@ typedef struct {
#define WMI_TPC_CHAINMASK_CONFIG_RATE_EXIST WMI_TPC_CHAINMASK_CONFIG_RATE #define WMI_TPC_CHAINMASK_CONFIG_RATE_EXIST WMI_TPC_CHAINMASK_CONFIG_RATE
#define WMI_TPC_CHAINMASK_CONFIG_RATE (0x1 << WMI_TPC_CHAINMASK_CONFIG_RATE_S) #define WMI_TPC_CHAINMASK_CONFIG_RATE (0x1 << WMI_TPC_CHAINMASK_CONFIG_RATE_S)
#define WMI_TPC_CHAINMASK_CONFIG_RATE_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_RATE) #define WMI_TPC_CHAINMASK_CONFIG_RATE_GET(x) WMI_F_MS(x, WMI_TPC_CHAINMASK_CONFIG_RATE)
#define WMI_TPC_CHAINMASK_CONFIG_RATE_SET(x,z) WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_RATE) #define WMI_TPC_CHAINMASK_CONFIG_RATE_SET(x, z) WMI_F_RMW(x, (z)&0x1, WMI_TPC_CHAINMASK_CONFIG_RATE)
/** Bit map definition for basic_config_info ends */ /** Bit map definition for basic_config_info ends */
@@ -10380,7 +10384,7 @@ typedef struct {
/** table ID - to allow support for multiple simultaneous tables */ /** table ID - to allow support for multiple simultaneous tables */
A_UINT32 table_id; A_UINT32 table_id;
/** operation mode: start/stop */ /** operation mode: start/stop */
A_UINT32 mode; // wmi_extscan_operation_mode A_UINT32 mode; /* wmi_extscan_operation_mode */
/**total number of ssids (in all pages) */ /**total number of ssids (in all pages) */
A_UINT32 total_entries; A_UINT32 total_entries;
/**index of the first ssid entry found in the TLV extscan_hotlist_ssid_entry*/ /**index of the first ssid entry found in the TLV extscan_hotlist_ssid_entry*/
@@ -10841,17 +10845,17 @@ typedef struct {
*/ */
#define WMI_DEBUG_LOG_PARAM_LOG_LEVEL 0x1 #define WMI_DEBUG_LOG_PARAM_LOG_LEVEL 0x1
#define WMI_DBGLOG_SET_LOG_LEVEL(val,lvl) do { \ #define WMI_DBGLOG_SET_LOG_LEVEL(val, lvl) do { \
(val) |= (lvl & 0xff); \ (val) |= (lvl & 0xff); \
} while(0) } while (0)
#define WMI_DBGLOG_GET_LOG_LEVEL(val) ((val) & 0xff) #define WMI_DBGLOG_GET_LOG_LEVEL(val) ((val) & 0xff)
#define WMI_DBGLOG_SET_MODULE_ID(val,mid) do { \ #define WMI_DBGLOG_SET_MODULE_ID(val, mid) do { \
(val) |= ((mid & 0xffff) << 16); \ (val) |= ((mid & 0xffff) << 16); \
} while(0) } while (0)
#define WMI_DBGLOG_GET_MODULE_ID(val) (( (val) >> 16) & 0xffff) #define WMI_DBGLOG_GET_MODULE_ID(val) (((val) >> 16) & 0xffff)
/** /**
* Enable the debug log for a given vdev. Value is vdev id * Enable the debug log for a given vdev. Value is vdev id
@@ -10881,17 +10885,17 @@ typedef struct {
#define NUM_MODULES_PER_ENTRY ((sizeof(A_UINT32)) << 3) #define NUM_MODULES_PER_ENTRY ((sizeof(A_UINT32)) << 3)
#define WMI_MODULE_ENABLE(pmid_bitmap,mod_id) \ #define WMI_MODULE_ENABLE(pmid_bitmap, mod_id) \
( (pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY] |= \ ((pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY] |= \
(1 << ((mod_id)%NUM_MODULES_PER_ENTRY)) ) (1 << ((mod_id)%NUM_MODULES_PER_ENTRY)))
#define WMI_MODULE_DISABLE(pmid_bitmap,mod_id) \ #define WMI_MODULE_DISABLE(pmid_bitmap, mod_id) \
( (pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY] &= \ ((pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY] &= \
( ~(1 << ((mod_id)%NUM_MODULES_PER_ENTRY)) ) ) (~(1 << ((mod_id)%NUM_MODULES_PER_ENTRY))))
#define WMI_MODULE_IS_ENABLED(pmid_bitmap,mod_id) \ #define WMI_MODULE_IS_ENABLED(pmid_bitmap, mod_id) \
( ((pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY ] & \ (((pmid_bitmap)[(mod_id)/NUM_MODULES_PER_ENTRY] & \
(1 << ((mod_id)%NUM_MODULES_PER_ENTRY)) ) != 0) (1 << ((mod_id)%NUM_MODULES_PER_ENTRY))) != 0)
#define MAX_MODULE_ID_BITMAP_WORDS 16 /* 16*32=512 module ids. should be more than sufficient */ #define MAX_MODULE_ID_BITMAP_WORDS 16 /* 16*32=512 module ids. should be more than sufficient */
typedef struct { typedef struct {
@@ -12614,8 +12618,7 @@ typedef struct wmi_bpf_del_vdev_instructions_cmd_s {
/* NOTE: Make sure these data structures are identical to those 9235 /* NOTE: Make sure these data structures are identical to those 9235
* defined in sirApi.h */ * defined in sirApi.h */
typedef struct typedef struct {
{
/** Arbitration Inter-Frame Spacing. Range: 2-15 */ /** Arbitration Inter-Frame Spacing. Range: 2-15 */
A_UINT32 aifsn; A_UINT32 aifsn;
/** Contention Window minimum. Range: 1 - 10 */ /** Contention Window minimum. Range: 1 - 10 */
@@ -12624,8 +12627,7 @@ typedef struct
A_UINT32 cwmax; A_UINT32 cwmax;
} wmi_qos_params_t; } wmi_qos_params_t;
typedef struct typedef struct {
{
/** Channel frequency in MHz */ /** Channel frequency in MHz */
A_UINT32 chan_freq; A_UINT32 chan_freq;
/** Channel duration in ms */ /** Channel duration in ms */
@@ -12655,7 +12657,7 @@ typedef struct {
/** The array of channels */ /** The array of channels */
wmi_ocb_channel_t channels[OCB_CHANNEL_MAX]; wmi_ocb_channel_t channels[OCB_CHANNEL_MAX];
/** 1 to allow off-channel tx, 0 otherwise */ /** 1 to allow off-channel tx, 0 otherwise */
A_UINT32 off_channel_tx; // Not supported A_UINT32 off_channel_tx; /* Not supported */
} wmi_ocb_set_sched_cmd_fixed_param; } wmi_ocb_set_sched_cmd_fixed_param;
typedef struct { typedef struct {

8
uapi/linux/osapi_linux.h
View File

@@ -237,15 +237,15 @@ void a_netbuf_queue_init(A_NETBUF_QUEUE_T *q);
#define __ATTRIB_PACK __attribute__ ((packed)) #define __ATTRIB_PACK __attribute__ ((packed))
#define __ATTRIB_PRINTF __attribute__ ((format (printf, 1, 2))) #define __ATTRIB_PRINTF __attribute__ ((format (printf, 1, 2)))
#define __ATTRIB_NORETURN __attribute__ ((noreturn)) #define __ATTRIB_NORETURN __attribute__ ((noreturn))
#ifndef INLINE #ifndef inline
#define INLINE __inline__ #define inline __inline__
#endif #endif
#else /* Not GCC */ #else /* Not GCC */
#define __ATTRIB_PACK #define __ATTRIB_PACK
#define __ATTRIB_PRINTF #define __ATTRIB_PRINTF
#define __ATTRIB_NORETURN #define __ATTRIB_NORETURN
#ifndef INLINE #ifndef inline
#define INLINE __inline #define inline __inline
#endif #endif
#endif /* End __GNUC__ */ #endif /* End __GNUC__ */