disp: msm: typecast variables as long long for 64 bit operations

Define 64 bit variables as unsigned long long to ensure
8 bytes in 32 bit builds.

Change-Id: I723ae0c4ba6a0de07c92d14eeef95bde095c8e3d
Signed-off-by: Venkata Prahlad Valluru <vvalluru@codeaurora.org>
This commit is contained in:
Venkata Prahlad Valluru
2021-01-06 00:52:36 +05:30
committed by Gerrit - the friendly Code Review server
parent 6ec2c7e072
commit 2ec9452162
5 changed files with 17 additions and 16 deletions

View File

@@ -270,11 +270,11 @@ static void dsi_pll_calc_dec_frac(struct dsi_pll_5nm *pll,
switch (rsc->pll_revision) {
case DSI_PLL_5NM:
default:
if (pll_freq <= 1000000000)
if (pll_freq <= 1000000000ULL)
regs->pll_clock_inverters = 0xA0;
else if (pll_freq <= 2500000000)
else if (pll_freq <= 2500000000ULL)
regs->pll_clock_inverters = 0x20;
else if (pll_freq <= 3500000000)
else if (pll_freq <= 3500000000ULL)
regs->pll_clock_inverters = 0x00;
else
regs->pll_clock_inverters = 0x40;
@@ -369,16 +369,16 @@ static void dsi_pll_config_hzindep_reg(struct dsi_pll_5nm *pll,
switch (rsc->pll_revision) {
case DSI_PLL_5NM:
default:
if (vco_rate < 3100000000)
if (vco_rate < 3100000000ULL)
DSI_PLL_REG_W(pll_base,
PLL_ANALOG_CONTROLS_FIVE_1, 0x01);
else
DSI_PLL_REG_W(pll_base,
PLL_ANALOG_CONTROLS_FIVE_1, 0x03);
if (vco_rate < 1520000000)
if (vco_rate < 1520000000ULL)
DSI_PLL_REG_W(pll_base, PLL_VCO_CONFIG_1, 0x08);
else if (vco_rate < 2990000000)
else if (vco_rate < 2990000000ULL)
DSI_PLL_REG_W(pll_base, PLL_VCO_CONFIG_1, 0x00);
else
DSI_PLL_REG_W(pll_base, PLL_VCO_CONFIG_1, 0x01);