qcacmn: Fix interrupt batch count initialization

Interrupt batch count configuration "dp_int_batch_threshold_other"
was initialized to wrong values, which was causing missed interrupts
from REO status ring.
Also remove the extra RXDMA2SW ring handling, which is currently
done in both UMAC and LMAC interrupt processing loops.

Change-Id: I9a9e951780356db6b491d1301d2c08ef1ac585d5
このコミットが含まれているのは:
Karunakar Dasineni
2018-10-23 22:59:37 -07:00
committed by nshrivas
コミット 2b7628c863
2個のファイルの変更3行の追加9行の削除

ファイルの表示

@@ -1217,12 +1217,6 @@ static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
remaining_quota = budget;
}
}
for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
work_done = dp_rxdma_err_process(soc, ring,
remaining_quota);
budget -= work_done;
}
}
if (reo_status_mask)

ファイルの表示

@@ -292,9 +292,9 @@
#define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
CFG_INI_UINT("dp_int_batch_threshold_other", \
WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
CFG_VALUE_OR_DEFAULT, "DP INT threshold Other")
#define CFG_DP_INT_BATCH_THRESHOLD_RX \