qcacmn: Fix interrupt batch count initialization
Interrupt batch count configuration "dp_int_batch_threshold_other" was initialized to wrong values, which was causing missed interrupts from REO status ring. Also remove the extra RXDMA2SW ring handling, which is currently done in both UMAC and LMAC interrupt processing loops. Change-Id: I9a9e951780356db6b491d1301d2c08ef1ac585d5
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committed by
nshrivas

parent
8d80aa857b
commit
2b7628c863
@@ -292,9 +292,9 @@
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#define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
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CFG_INI_UINT("dp_int_batch_threshold_other", \
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WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
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WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
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WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
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WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
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WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
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WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
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CFG_VALUE_OR_DEFAULT, "DP INT threshold Other")
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#define CFG_DP_INT_BATCH_THRESHOLD_RX \
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