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@@ -79,10 +79,16 @@ static int cam_top_tpg_ver3_process_cmd(void *hw_priv,
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tpg_data->pix_pattern = core_cfg->pix_pattern;
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tpg_data->pix_pattern = core_cfg->pix_pattern;
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tpg_data->vc_dt_pattern_id = core_cfg->vc_dt_pattern_id;
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tpg_data->vc_dt_pattern_id = core_cfg->vc_dt_pattern_id;
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tpg_data->qcfa_en = core_cfg->qcfa_en;
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tpg_data->qcfa_en = core_cfg->qcfa_en;
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+ tpg_data->h_blank_count = core_cfg->hbi_clk_cnt;
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+ tpg_data->v_blank_count = core_cfg->vbi_clk_cnt;
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+ if (core_cfg->throttle_pattern <= 0xFFFF)
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+ tpg_data->throttle_pattern = core_cfg->throttle_pattern;
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+
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CAM_DBG(CAM_ISP,
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CAM_DBG(CAM_ISP,
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- "pattern_id: 0x%x pix_pattern: 0x%x qcfa_en: 0x%x",
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+ "pattern_id: 0x%x pix_pattern: 0x%x qcfa_en: 0x%x hbi: 0x%x vbi: 0x%x throttle: 0x%x",
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tpg_data->vc_dt_pattern_id, tpg_data->pix_pattern,
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tpg_data->vc_dt_pattern_id, tpg_data->pix_pattern,
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- tpg_data->qcfa_en);
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+ tpg_data->qcfa_en, tpg_data->h_blank_count,
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+ tpg_data->v_blank_count, tpg_data->throttle_pattern);
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break;
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break;
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default:
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default:
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CAM_ERR(CAM_ISP, "Invalid TPG cmd type %u", cmd_type);
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CAM_ERR(CAM_ISP, "Invalid TPG cmd type %u", cmd_type);
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@@ -184,8 +190,6 @@ static int cam_top_tpg_ver3_reserve(
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if (!tpg_hw->reserve_cnt) {
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if (!tpg_hw->reserve_cnt) {
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tpg_data->phy_sel = reserv->in_port->lane_type;
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tpg_data->phy_sel = reserv->in_port->lane_type;
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tpg_data->num_active_lanes = reserv->in_port->lane_num;
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tpg_data->num_active_lanes = reserv->in_port->lane_num;
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- tpg_data->h_blank_count = reserv->in_port->hbi_cnt;
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- tpg_data->v_blank_count = 600;
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}
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}
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for (i = 0; i < reserv->in_port->num_valid_vc_dt; i++) {
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for (i = 0; i < reserv->in_port->num_valid_vc_dt; i++) {
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@@ -335,6 +339,13 @@ static int cam_top_tpg_ver3_start(
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i, val);
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i, val);
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}
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}
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+ if (tpg_data->throttle_pattern)
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+ cam_io_w_mb(tpg_data->throttle_pattern,
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+ soc_info->reg_map[0].mem_base + tpg_reg->tpg_throttle);
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+ else
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+ cam_io_w_mb(0x1111,
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+ soc_info->reg_map[0].mem_base + tpg_reg->tpg_throttle);
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+
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cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
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cam_io_w_mb(1, soc_info->reg_map[0].mem_base +
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tpg_reg->tpg_top_irq_mask);
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tpg_reg->tpg_top_irq_mask);
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