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msm: camera: csiphy: Update the csiphy programming sequence

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Update CSIPHY 2.1.0 bringup sequence.

CRs-Fixed: 2929063
Change-Id: I1e7b3560094f82e572b6543a336c5926bd9c5220
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
This commit is contained in:
Jigar Agrawal
2021-04-21 20:14:45 -07:00
parent 020e9a7d77
commit 2aee6a3692
1 changed files with 25 additions and 30 deletions
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55
drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_2_1_0_hwreg.h
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@@ -18,14 +18,15 @@ struct csiphy_reg_parms_t csiphy_v2_1_0 = {
.mipi_csiphy_interrupt_status0_addr = 0x10B0,
.mipi_csiphy_interrupt_clear0_addr = 0x1058,
.mipi_csiphy_glbl_irq_cmd_addr = 0x1028,
.csiphy_common_array_size = 7,
.csiphy_reset_array_size = 5,
.csiphy_common_array_size = 4,
.csiphy_reset_array_size = 2,
.csiphy_2ph_config_array_size = 24,
.csiphy_3ph_config_array_size = 44,
.csiphy_3ph_config_array_size = 45,
.csiphy_2ph_clock_lane = 0x1,
.csiphy_2ph_combo_ck_ln = 0x10,
.csiphy_interrupt_status_size = 11,
.aon_sel_params = &aon_cam_select_params,
.prgm_cmn_reg_across_csiphy = 1,
};
struct csiphy_reg_t csiphy_common_reg_2_1_0[] = {
@@ -33,18 +34,9 @@ struct csiphy_reg_t csiphy_common_reg_2_1_0[] = {
{0x1014, 0x2A, 0x00, CSIPHY_3PH_REGS},
{0x1018, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x101C, 0x7A, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x02F0, 0x00, 0x00, CSIPHY_3PH_REGS},
{0x06F0, 0x00, 0x00, CSIPHY_3PH_REGS},
{0x0AF0, 0x00, 0x00, CSIPHY_3PH_REGS},
{0x1000, 0x01, 0x01, CSIPHY_DEFAULT_PARAMS},
{0x1000, 0x02, 0x00, CSIPHY_2PH_REGS},
{0x1000, 0x0E, 0x00, CSIPHY_3PH_REGS},
};
struct csiphy_reg_t csiphy_reset_reg_2_1_0[] = {
{0x1014, 0x00, 0x00, CSIPHY_LANE_ENABLE},
{0x101C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x1018, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x1000, 0x01, 0x01, CSIPHY_DEFAULT_PARAMS},
{0x1000, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
};
@@ -332,17 +324,18 @@ struct csiphy_reg_t
struct csiphy_reg_t csiphy_3ph_v2_1_0_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
{
{0x0274, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0278, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0288, 0xAC, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x028C, 0x85, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x026C, 0x3B, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0274, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0278, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0288, 0xAA, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x028C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x026C, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0268, 0xF1, 0x64, CSIPHY_DEFAULT_PARAMS},
{0x0294, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x02F4, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x02F8, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x02FC, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x02F0, 0xEF, 0x03, CSIPHY_DEFAULT_PARAMS},
{0x02F0, 0x00, 0x02, CSIPHY_DEFAULT_PARAMS},
{0x02F0, 0xEF, 0x64, CSIPHY_DEFAULT_PARAMS},
{0x0294, 0x09, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0290, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0204, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -378,17 +371,18 @@ struct csiphy_reg_t csiphy_3ph_v2_1_0_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
{0x1000, 0x0E, 0x00, CSIPHY_DEFAULT_PARAMS},
},
{
{0x0674, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0678, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0688, 0xAC, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x068C, 0x85, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x066C, 0x3B, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0674, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0678, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0688, 0xAA, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x068C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x066C, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0668, 0xF1, 0x64, CSIPHY_DEFAULT_PARAMS},
{0x0694, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x06F4, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x06F8, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x06FC, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x06F0, 0xEF, 0x03, CSIPHY_DEFAULT_PARAMS},
{0x06F0, 0x00, 0x02, CSIPHY_DEFAULT_PARAMS},
{0x06F0, 0xEF, 0x64, CSIPHY_DEFAULT_PARAMS},
{0x0694, 0x09, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0690, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0604, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -424,17 +418,18 @@ struct csiphy_reg_t csiphy_3ph_v2_1_0_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
{0x1000, 0x0E, 0x00, CSIPHY_DEFAULT_PARAMS},
},
{
{0x0A74, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A78, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A88, 0xAC, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A8C, 0x85, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A6C, 0x3B, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A74, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A78, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A88, 0xAA, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A8C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A6C, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A68, 0xF1, 0x64, CSIPHY_DEFAULT_PARAMS},
{0x0A94, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0AF4, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0AF8, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0AFC, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0AF0, 0xEF, 0x03, CSIPHY_DEFAULT_PARAMS},
{0x0AF0, 0x00, 0x02, CSIPHY_DEFAULT_PARAMS},
{0x0AF0, 0xEF, 0x64, CSIPHY_DEFAULT_PARAMS},
{0x0A94, 0x09, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A90, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
{0x0A04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},