qcacmn: DP changes to add new RHINE arch specific files

This change introduces new RHINE architecture specific DP files.
RHINE is new SOFTUMAC based architecture, unlike LI/BE targets
all the HW UMAC functionality will be replaced with software base
UMAC functionality. So current RHINE arch specific implementation
is aligned to softumac based implementation.

Change-Id: I70baf11130afc07c5c85437d2343d0976ce0ea0a
CRs-Fixed: 3382880

dp/wifi3.0/rh/dp_rh.c

@@ -0,0 +1,442 @@
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "dp_types.h"
+#include <dp_internal.h>
+#include <dp_htt.h>
+#include "dp_rh.h"
+#include "dp_rh_tx.h"
+#include "dp_rh_htt.h"
+#include "dp_tx_desc.h"
+#include "dp_rh_rx.h"
+#include "dp_peer.h"
+#include <wlan_utility.h>
+
+static void dp_soc_cfg_attach_rh(struct dp_soc *soc)
+{
+}
+
+qdf_size_t dp_get_context_size_rh(enum dp_context_type context_type)
+{
+	switch (context_type) {
+	case DP_CONTEXT_TYPE_SOC:
+		return sizeof(struct dp_soc_rh);
+	case DP_CONTEXT_TYPE_PDEV:
+		return sizeof(struct dp_pdev_rh);
+	case DP_CONTEXT_TYPE_VDEV:
+		return sizeof(struct dp_vdev_rh);
+	case DP_CONTEXT_TYPE_PEER:
+		return sizeof(struct dp_peer_rh);
+	default:
+		return 0;
+	}
+}
+
+qdf_size_t dp_mon_get_context_size_rh(enum dp_context_type context_type)
+{
+	switch (context_type) {
+	case DP_CONTEXT_TYPE_MON_PDEV:
+		return sizeof(struct dp_mon_pdev_rh);
+	case DP_CONTEXT_TYPE_MON_SOC:
+		return sizeof(struct dp_mon_soc_rh);
+	default:
+		return 0;
+	}
+}
+
+static QDF_STATUS dp_soc_attach_rh(struct dp_soc *soc,
+				   struct cdp_soc_attach_params *params)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static QDF_STATUS dp_soc_detach_rh(struct dp_soc *soc)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static QDF_STATUS dp_soc_init_rh(struct dp_soc *soc)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static QDF_STATUS dp_soc_deinit_rh(struct dp_soc *soc)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static QDF_STATUS dp_pdev_attach_rh(struct dp_pdev *pdev,
+				    struct cdp_pdev_attach_params *params)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static QDF_STATUS dp_pdev_detach_rh(struct dp_pdev *pdev)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static QDF_STATUS dp_vdev_attach_rh(struct dp_soc *soc, struct dp_vdev *vdev)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static QDF_STATUS dp_vdev_detach_rh(struct dp_soc *soc, struct dp_vdev *vdev)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+#ifdef AST_OFFLOAD_ENABLE
+static void dp_peer_map_detach_rh(struct dp_soc *soc)
+{
+	dp_soc_wds_detach(soc);
+	dp_peer_ast_table_detach(soc);
+	dp_peer_ast_hash_detach(soc);
+	dp_peer_mec_hash_detach(soc);
+}
+
+static QDF_STATUS dp_peer_map_attach_rh(struct dp_soc *soc)
+{
+	QDF_STATUS status;
+
+	soc->max_peer_id = soc->max_peers;
+
+	status = dp_peer_ast_table_attach(soc);
+	if (!QDF_IS_STATUS_SUCCESS(status))
+		return status;
+
+	status = dp_peer_ast_hash_attach(soc);
+	if (!QDF_IS_STATUS_SUCCESS(status))
+		goto ast_table_detach;
+
+	status = dp_peer_mec_hash_attach(soc);
+	if (!QDF_IS_STATUS_SUCCESS(status))
+		goto hash_detach;
+
+	dp_soc_wds_attach(soc);
+
+	return QDF_STATUS_SUCCESS;
+
+hash_detach:
+	dp_peer_ast_hash_detach(soc);
+ast_table_detach:
+	dp_peer_ast_table_detach(soc);
+
+	return status;
+}
+#else
+static void dp_peer_map_detach_rh(struct dp_soc *soc)
+{
+}
+
+static QDF_STATUS dp_peer_map_attach_rh(struct dp_soc *soc)
+{
+	soc->max_peer_id = soc->max_peers;
+
+	return QDF_STATUS_SUCCESS;
+}
+#endif
+
+qdf_size_t dp_get_soc_context_size_rh(void)
+{
+	return sizeof(struct dp_soc_rh);
+}
+
+#ifdef NO_RX_PKT_HDR_TLV
+/**
+ * dp_rxdma_ring_sel_cfg_rh() - Setup RXDMA ring config
+ * @soc: Common DP soc handle
+ *
+ * Return: QDF_STATUS
+ */
+static QDF_STATUS
+dp_rxdma_ring_sel_cfg_rh(struct dp_soc *soc)
+{
+	int i;
+	int mac_id;
+	struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
+	struct dp_srng *rx_mac_srng;
+	QDF_STATUS status = QDF_STATUS_SUCCESS;
+
+	htt_tlv_filter.mpdu_start = 1;
+	htt_tlv_filter.msdu_start = 1;
+	htt_tlv_filter.mpdu_end = 1;
+	htt_tlv_filter.msdu_end = 1;
+	htt_tlv_filter.attention = 1;
+	htt_tlv_filter.packet = 1;
+	htt_tlv_filter.packet_header = 0;
+
+	htt_tlv_filter.ppdu_start = 0;
+	htt_tlv_filter.ppdu_end = 0;
+	htt_tlv_filter.ppdu_end_user_stats = 0;
+	htt_tlv_filter.ppdu_end_user_stats_ext = 0;
+	htt_tlv_filter.ppdu_end_status_done = 0;
+	htt_tlv_filter.enable_fp = 1;
+	htt_tlv_filter.enable_md = 0;
+	htt_tlv_filter.enable_md = 0;
+	htt_tlv_filter.enable_mo = 0;
+
+	htt_tlv_filter.fp_mgmt_filter = 0;
+	htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
+	htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
+					 FILTER_DATA_MCAST |
+					 FILTER_DATA_DATA);
+	htt_tlv_filter.mo_mgmt_filter = 0;
+	htt_tlv_filter.mo_ctrl_filter = 0;
+	htt_tlv_filter.mo_data_filter = 0;
+	htt_tlv_filter.md_data_filter = 0;
+
+	htt_tlv_filter.offset_valid = true;
+
+	htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
+	/*Not subscribing rx_pkt_header*/
+	htt_tlv_filter.rx_header_offset = 0;
+	htt_tlv_filter.rx_mpdu_start_offset =
+				hal_rx_mpdu_start_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_mpdu_end_offset =
+				hal_rx_mpdu_end_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_msdu_start_offset =
+				hal_rx_msdu_start_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_msdu_end_offset =
+				hal_rx_msdu_end_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_attn_offset =
+				hal_rx_attn_offset_get(soc->hal_soc);
+
+	for (i = 0; i < MAX_PDEV_CNT; i++) {
+		struct dp_pdev *pdev = soc->pdev_list[i];
+
+		if (!pdev)
+			continue;
+
+		for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
+			int mac_for_pdev =
+				dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
+			/*
+			 * Obtain lmac id from pdev to access the LMAC ring
+			 * in soc context
+			 */
+			int lmac_id =
+				dp_get_lmac_id_for_pdev_id(soc, mac_id,
+							   pdev->pdev_id);
+
+			rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
+			htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
+					    rx_mac_srng->hal_srng,
+					    RXDMA_BUF, RX_DATA_BUFFER_SIZE,
+					    &htt_tlv_filter);
+		}
+	}
+	return status;
+}
+#else
+
+static QDF_STATUS
+dp_rxdma_ring_sel_cfg_rh(struct dp_soc *soc)
+{
+	int i;
+	int mac_id;
+	struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
+	struct dp_srng *rx_mac_srng;
+	QDF_STATUS status = QDF_STATUS_SUCCESS;
+
+	htt_tlv_filter.mpdu_start = 1;
+	htt_tlv_filter.msdu_start = 1;
+	htt_tlv_filter.mpdu_end = 1;
+	htt_tlv_filter.msdu_end = 1;
+	htt_tlv_filter.attention = 1;
+	htt_tlv_filter.packet = 1;
+	htt_tlv_filter.packet_header = 1;
+
+	htt_tlv_filter.ppdu_start = 0;
+	htt_tlv_filter.ppdu_end = 0;
+	htt_tlv_filter.ppdu_end_user_stats = 0;
+	htt_tlv_filter.ppdu_end_user_stats_ext = 0;
+	htt_tlv_filter.ppdu_end_status_done = 0;
+	htt_tlv_filter.enable_fp = 1;
+	htt_tlv_filter.enable_md = 0;
+	htt_tlv_filter.enable_md = 0;
+	htt_tlv_filter.enable_mo = 0;
+
+	htt_tlv_filter.fp_mgmt_filter = 0;
+	htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
+	htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
+					 FILTER_DATA_MCAST |
+					 FILTER_DATA_DATA);
+	htt_tlv_filter.mo_mgmt_filter = 0;
+	htt_tlv_filter.mo_ctrl_filter = 0;
+	htt_tlv_filter.mo_data_filter = 0;
+	htt_tlv_filter.md_data_filter = 0;
+
+	htt_tlv_filter.offset_valid = true;
+
+	htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
+	htt_tlv_filter.rx_header_offset =
+				hal_rx_pkt_tlv_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_mpdu_start_offset =
+				hal_rx_mpdu_start_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_mpdu_end_offset =
+				hal_rx_mpdu_end_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_msdu_start_offset =
+				hal_rx_msdu_start_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_msdu_end_offset =
+				hal_rx_msdu_end_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_attn_offset =
+				hal_rx_attn_offset_get(soc->hal_soc);
+
+	for (i = 0; i < MAX_PDEV_CNT; i++) {
+		struct dp_pdev *pdev = soc->pdev_list[i];
+
+		if (!pdev)
+			continue;
+
+		for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
+			int mac_for_pdev =
+				dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
+			/*
+			 * Obtain lmac id from pdev to access the LMAC ring
+			 * in soc context
+			 */
+			int lmac_id =
+				dp_get_lmac_id_for_pdev_id(soc, mac_id,
+							   pdev->pdev_id);
+
+			rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
+			htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
+					    rx_mac_srng->hal_srng,
+					    RXDMA_BUF, RX_DATA_BUFFER_SIZE,
+					    &htt_tlv_filter);
+		}
+	}
+	return status;
+}
+#endif
+
+static void dp_soc_srng_deinit_rh(struct dp_soc *soc)
+{
+}
+
+static void dp_soc_srng_free_rh(struct dp_soc *soc)
+{
+}
+
+static QDF_STATUS dp_soc_srng_alloc_rh(struct dp_soc *soc)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static QDF_STATUS dp_soc_srng_init_rh(struct dp_soc *soc)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static void dp_tx_implicit_rbm_set_rh(struct dp_soc *soc,
+				      uint8_t tx_ring_id,
+				      uint8_t bm_id)
+{
+}
+
+static QDF_STATUS dp_txrx_set_vdev_param_rh(struct dp_soc *soc,
+					    struct dp_vdev *vdev,
+					    enum cdp_vdev_param_type param,
+					    cdp_config_param_type val)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static struct dp_peer *dp_find_peer_by_destmac_rh(struct dp_soc *soc,
+						  uint8_t *dest_mac,
+						  uint8_t vdev_id)
+{
+	struct dp_peer *peer = NULL;
+	struct dp_ast_entry *ast_entry = NULL;
+	uint16_t peer_id;
+
+	qdf_spin_lock_bh(&soc->ast_lock);
+	ast_entry = dp_peer_ast_hash_find_by_vdevid(soc, dest_mac, vdev_id);
+
+	if (!ast_entry) {
+		qdf_spin_unlock_bh(&soc->ast_lock);
+		dp_err("NULL ast entry");
+		return NULL;
+	}
+
+	peer_id = ast_entry->peer_id;
+	qdf_spin_unlock_bh(&soc->ast_lock);
+
+	if (peer_id == HTT_INVALID_PEER)
+		return NULL;
+
+	peer = dp_peer_get_ref_by_id(soc, peer_id,
+				     DP_MOD_ID_SAWF);
+	return peer;
+}
+
+static void dp_get_rx_hash_key_rh(struct dp_soc *soc,
+				  struct cdp_lro_hash_config *lro_hash)
+{
+	dp_get_rx_hash_key_bytes(lro_hash);
+}
+
+void dp_initialize_arch_ops_rh(struct dp_arch_ops *arch_ops)
+{
+	arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_rh;
+	arch_ops->tx_comp_get_params_from_hal_desc =
+		dp_tx_comp_get_params_from_hal_desc_rh;
+	arch_ops->dp_tx_process_htt_completion =
+			dp_tx_process_htt_completion_rh;
+	arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
+			dp_wbm_get_rx_desc_from_hal_desc_rh;
+	arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_rh;
+	arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_rh;
+	arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_rh;
+	arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_rh;
+	arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_rh;
+	arch_ops->txrx_get_context_size = dp_get_context_size_rh;
+	arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_rh;
+	arch_ops->txrx_soc_attach = dp_soc_attach_rh;
+	arch_ops->txrx_soc_detach = dp_soc_detach_rh;
+	arch_ops->txrx_soc_init = dp_soc_init_rh;
+	arch_ops->txrx_soc_deinit = dp_soc_deinit_rh;
+	arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_rh;
+	arch_ops->txrx_soc_srng_init = dp_soc_srng_init_rh;
+	arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_rh;
+	arch_ops->txrx_soc_srng_free = dp_soc_srng_free_rh;
+	arch_ops->txrx_pdev_attach = dp_pdev_attach_rh;
+	arch_ops->txrx_pdev_detach = dp_pdev_detach_rh;
+	arch_ops->txrx_vdev_attach = dp_vdev_attach_rh;
+	arch_ops->txrx_vdev_detach = dp_vdev_detach_rh;
+	arch_ops->txrx_peer_map_attach = dp_peer_map_attach_rh;
+	arch_ops->txrx_peer_map_detach = dp_peer_map_detach_rh;
+	arch_ops->get_rx_hash_key = dp_get_rx_hash_key_rh;
+	arch_ops->dp_rx_desc_cookie_2_va =
+			dp_rx_desc_cookie_2_va_rh;
+	arch_ops->dp_rx_intrabss_handle_nawds = dp_rx_intrabss_handle_nawds_rh;
+	arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_rh;
+	arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_rh;
+	arch_ops->dp_rx_peer_metadata_peer_id_get =
+					dp_rx_peer_metadata_peer_id_get_rh;
+	arch_ops->soc_cfg_attach = dp_soc_cfg_attach_rh;
+	arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_rh;
+	arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_rh;
+	arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_rh;
+	arch_ops->dp_peer_rx_reorder_queue_setup =
+					dp_peer_rx_reorder_queue_setup_rh;
+	arch_ops->dp_find_peer_by_destmac = dp_find_peer_by_destmac_rh;
+	arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_rh;
+	arch_ops->reo_remap_config = dp_reo_remap_config_rh;
+}

dp/wifi3.0/rh/dp_rh.h

@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+#ifndef __DP_RH_H
+#define __DP_RH_H
+
+#include <dp_types.h>
+#include <dp_mon.h>
+#include <hal_rh_tx.h>
+#include <hal_rh_rx.h>
+#include <qdf_pkt_add_timestamp.h>
+
+/**
+ * struct dp_soc_rh - Extended DP soc for RH targets
+ * @soc: dp soc structure
+ */
+struct dp_soc_rh {
+	struct dp_soc soc;
+};
+
+/**
+ * struct dp_pdev_rh - Extended DP pdev for RH targets
+ * @pdev: dp_pdev structure
+ */
+struct dp_pdev_rh {
+	struct dp_pdev pdev;
+};
+
+/**
+ * struct dp_vdev_rh - Extended DP vdev for RH targets
+ * @vdev: dp_vdev structure
+ */
+struct dp_vdev_rh {
+	struct dp_vdev vdev;
+};
+
+/**
+ * struct dp_peer_rh - Extended DP peer for RH targets
+ * @peer: dp_peer structure
+ */
+struct dp_peer_rh {
+	struct dp_peer peer;
+};
+
+/**
+ * struct dp_mon_soc_rh - Extended DP mon soc for RH targets
+ * @mon_soc: dp_mon_soc structure
+ */
+struct dp_mon_soc_rh {
+	struct dp_mon_soc mon_soc;
+};
+
+/**
+ * struct dp_mon_pdev_rh - Extended DP mon pdev for RH targets
+ * @mon_pdev: dp_mon_pdev structure
+ */
+struct dp_mon_pdev_rh {
+	struct dp_mon_pdev mon_pdev;
+};
+
+/**
+ * dp_get_soc_context_size_rh() - get context size for dp_soc_rh
+ *
+ * Return: value in bytes for RH specific soc structure
+ */
+qdf_size_t dp_get_soc_context_size_rh(void);
+
+/**
+ * dp_initialize_arch_ops_rh() - initialize RH specific arch ops
+ * @arch_ops: arch ops pointer
+ *
+ * Return: none
+ */
+void dp_initialize_arch_ops_rh(struct dp_arch_ops *arch_ops);
+
+/**
+ * dp_get_context_size_rh() - get RH specific size for peer/vdev/pdev/soc
+ * @context_type: Context type to get size
+ *
+ * Return: size in bytes for the context_type
+ */
+
+qdf_size_t dp_get_context_size_rh(enum dp_context_type context_type);
+
+/**
+ * dp_mon_get_context_size_rh() - get RH specific size for mon pdev/soc
+ * @context_type: Mon context type to get size
+ *
+ * Return: size in bytes for the context_type
+ */
+
+qdf_size_t dp_mon_get_context_size_rh(enum dp_context_type context_type);
+
+#endif

dp/wifi3.0/rh/dp_rh_htt.c

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <htt.h>
+#include "dp_types.h"
+#include "dp_internal.h"
+#include "dp_rh_htt.h"
+#include "dp_rh_rx.h"
+#include "qdf_mem.h"
+#include "cdp_txrx_cmn_struct.h"
+
+/*
+ * dp_htt_soc_initialize_rh() - SOC level HTT initialization
+ * @htt_soc: Opaque htt SOC handle
+ * @ctrl_psoc: Opaque ctrl SOC handle
+ * @htc_soc: SOC level HTC handle
+ * @hal_soc: Opaque HAL SOC handle
+ * @osdev: QDF device
+ *
+ * Return: HTT handle on success; NULL on failure
+ */
+void *
+dp_htt_soc_initialize_rh(struct htt_soc *htt_soc,
+			 struct cdp_ctrl_objmgr_psoc *ctrl_psoc,
+			 HTC_HANDLE htc_soc,
+			 hal_soc_handle_t hal_soc_hdl, qdf_device_t osdev)
+{
+	return NULL;
+}

dp/wifi3.0/rh/dp_rh_htt.h

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef __DP_RH_HTT_H
+#define __DP_RH_HTT_H
+
+#include <htt.h>
+#include "dp_types.h"
+#include "dp_internal.h"
+#include "dp_htt.h"
+#include "qdf_mem.h"
+#include "cdp_txrx_cmn_struct.h"
+
+/*
+ * dp_htt_soc_initialize_rh() - SOC level HTT initialization
+ * @htt_soc: Opaque htt SOC handle
+ * @ctrl_psoc: Opaque ctrl SOC handle
+ * @htc_soc: SOC level HTC handle
+ * @hal_soc: Opaque HAL SOC handle
+ * @osdev: QDF device
+ *
+ * Return: HTT handle on success; NULL on failure
+ */
+void *
+dp_htt_soc_initialize_rh(struct htt_soc *htt_soc,
+			 struct cdp_ctrl_objmgr_psoc *ctrl_psoc,
+			 HTC_HANDLE htc_soc,
+			 hal_soc_handle_t hal_soc_hdl, qdf_device_t osdev);
+#endif

dp/wifi3.0/rh/dp_rh_rx.c

@@ -0,0 +1,192 @@
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "cdp_txrx_cmn_struct.h"
+#include "hal_hw_headers.h"
+#include "dp_types.h"
+#include "dp_rx.h"
+#include "dp_rh_rx.h"
+#include "dp_peer.h"
+#include "hal_rx.h"
+#include "hal_rh_rx.h"
+#include "hal_api.h"
+#include "hal_rh_api.h"
+#include "qdf_nbuf.h"
+#include "dp_internal.h"
+#ifdef WIFI_MONITOR_SUPPORT
+#include <dp_mon.h>
+#endif
+#ifdef FEATURE_WDS
+#include "dp_txrx_wds.h"
+#endif
+#include "dp_hist.h"
+#include "dp_rx_buffer_pool.h"
+#include "dp_rh.h"
+
+static inline
+bool is_sa_da_idx_valid(uint32_t max_ast,
+			qdf_nbuf_t nbuf, struct hal_rx_msdu_metadata msdu_info)
+{
+	if ((qdf_nbuf_is_sa_valid(nbuf) && (msdu_info.sa_idx > max_ast)) ||
+	    (!qdf_nbuf_is_da_mcbc(nbuf) && qdf_nbuf_is_da_valid(nbuf) &&
+	     (msdu_info.da_idx > max_ast)))
+		return false;
+
+	return true;
+}
+
+#if defined(FEATURE_MCL_REPEATER) && defined(FEATURE_MEC)
+/**
+ * dp_rx_mec_check_wrapper() - wrapper to dp_rx_mcast_echo_check
+ * @soc: core DP main context
+ * @txrx_peer: dp peer handler
+ * @rx_tlv_hdr: start of the rx TLV header
+ * @nbuf: pkt buffer
+ *
+ * Return: bool (true if it is a looped back pkt else false)
+ */
+static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
+					   struct dp_txrx_peer *txrx_peer,
+					   uint8_t *rx_tlv_hdr,
+					   qdf_nbuf_t nbuf)
+{
+	return dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf);
+}
+#else
+static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
+					   struct dp_txrx_peer *txrx_peer,
+					   uint8_t *rx_tlv_hdr,
+					   qdf_nbuf_t nbuf)
+{
+	return false;
+}
+#endif
+
+static bool
+dp_rx_intrabss_ucast_check_rh(struct dp_soc *soc, qdf_nbuf_t nbuf,
+			      struct dp_txrx_peer *ta_txrx_peer,
+			      struct hal_rx_msdu_metadata *msdu_metadata,
+			      uint8_t *p_tx_vdev_id)
+{
+	uint16_t da_peer_id;
+	struct dp_txrx_peer *da_peer;
+	struct dp_ast_entry *ast_entry;
+	dp_txrx_ref_handle txrx_ref_handle = NULL;
+
+	if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
+		return false;
+
+	ast_entry = soc->ast_table[msdu_metadata->da_idx];
+	if (!ast_entry)
+		return false;
+
+	if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
+		ast_entry->is_active = TRUE;
+		return false;
+	}
+
+	da_peer_id = ast_entry->peer_id;
+	/* TA peer cannot be same as peer(DA) on which AST is present
+	 * this indicates a change in topology and that AST entries
+	 * are yet to be updated.
+	 */
+	if (da_peer_id == ta_txrx_peer->peer_id ||
+	    da_peer_id == HTT_INVALID_PEER)
+		return false;
+
+	da_peer = dp_txrx_peer_get_ref_by_id(soc, da_peer_id,
+					     &txrx_ref_handle, DP_MOD_ID_RX);
+	if (!da_peer)
+		return false;
+
+	*p_tx_vdev_id = da_peer->vdev->vdev_id;
+	/* If the source or destination peer in the isolation
+	 * list then dont forward instead push to bridge stack.
+	 */
+	if (dp_get_peer_isolation(ta_txrx_peer) ||
+	    dp_get_peer_isolation(da_peer) ||
+	    da_peer->vdev->vdev_id != ta_txrx_peer->vdev->vdev_id) {
+		dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
+		return false;
+	}
+
+	if (da_peer->bss_peer) {
+		dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
+		return false;
+	}
+
+	dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
+	return true;
+}
+
+/*
+ * dp_rx_intrabss_fwd_rh() - Implements the Intra-BSS forwarding logic
+ *
+ * @soc: core txrx main context
+ * @ta_txrx_peer	: source peer entry
+ * @rx_tlv_hdr	: start address of rx tlvs
+ * @nbuf	: nbuf that has to be intrabss forwarded
+ *
+ * Return: bool: true if it is forwarded else false
+ */
+static bool
+dp_rx_intrabss_fwd_rh(struct dp_soc *soc,
+		      struct dp_txrx_peer *ta_txrx_peer,
+		      uint8_t *rx_tlv_hdr,
+		      qdf_nbuf_t nbuf,
+		      struct hal_rx_msdu_metadata msdu_metadata,
+		      struct cdp_tid_rx_stats *tid_stats)
+{
+	uint8_t tx_vdev_id;
+
+	/* if it is a broadcast pkt (eg: ARP) and it is not its own
+	 * source, then clone the pkt and send the cloned pkt for
+	 * intra BSS forwarding and original pkt up the network stack
+	 * Note: how do we handle multicast pkts. do we forward
+	 * all multicast pkts as is or let a higher layer module
+	 * like igmpsnoop decide whether to forward or not with
+	 * Mcast enhancement.
+	 */
+	if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_txrx_peer->bss_peer)
+		return dp_rx_intrabss_mcbc_fwd(soc, ta_txrx_peer, rx_tlv_hdr,
+					       nbuf, tid_stats);
+
+	if (dp_rx_intrabss_eapol_drop_check(soc, ta_txrx_peer, rx_tlv_hdr,
+					    nbuf))
+		return true;
+
+	if (dp_rx_intrabss_ucast_check_rh(soc, nbuf, ta_txrx_peer,
+					  &msdu_metadata, &tx_vdev_id))
+		return dp_rx_intrabss_ucast_fwd(soc, ta_txrx_peer, tx_vdev_id,
+						rx_tlv_hdr, nbuf, tid_stats);
+
+	return false;
+}
+
+QDF_STATUS dp_rx_desc_pool_init_rh(struct dp_soc *soc,
+				   struct rx_desc_pool *rx_desc_pool,
+				   uint32_t pool_id)
+{
+	return dp_rx_desc_pool_init_generic(soc, rx_desc_pool, pool_id);
+}
+
+void dp_rx_desc_pool_deinit_rh(struct dp_soc *soc,
+			       struct rx_desc_pool *rx_desc_pool,
+			       uint32_t pool_id)
+{
+}

dp/wifi3.0/rh/dp_rh_rx.h

@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _DP_RH_RX_H_
+#define _DP_RH_RX_H_
+
+#include <dp_types.h>
+#include <dp_rx.h>
+#include "dp_rh.h"
+
+/**
+ * dp_rx_desc_pool_init_rh() - Initialize Rx Descriptor pool(s)
+ * @soc: Handle to DP Soc structure
+ * @rx_desc_pool: Rx descriptor pool handler
+ * @pool_id: Rx descriptor pool ID
+ *
+ * Return: None
+ */
+QDF_STATUS dp_rx_desc_pool_init_rh(struct dp_soc *soc,
+				   struct rx_desc_pool *rx_desc_pool,
+				   uint32_t pool_id);
+
+/**
+ * dp_rx_desc_pool_deinit_rh() - De-initialize Rx Descriptor pool(s)
+ * @soc: Handle to DP Soc structure
+ * @rx_desc_pool: Rx descriptor pool handler
+ * @pool_id: Rx descriptor pool ID
+ *
+ * Return: None
+ */
+void dp_rx_desc_pool_deinit_rh(struct dp_soc *soc,
+			       struct rx_desc_pool *rx_desc_pool,
+			       uint32_t pool_id);
+
+/**
+ * dp_rx_desc_cookie_2_va_rh() - Convert RX Desc cookie ID to VA
+ * @soc:Handle to DP Soc structure
+ * @cookie: cookie used to lookup virtual address
+ *
+ * Return: Rx descriptor virtual address
+ */
+static inline
+struct dp_rx_desc *dp_rx_desc_cookie_2_va_rh(struct dp_soc *soc,
+					     uint32_t cookie)
+{
+	return dp_rx_cookie_2_va_rxdma_buf(soc, cookie);
+}
+
+#define DP_PEER_METADATA_VDEV_ID_MASK	0x003f0000
+#define DP_PEER_METADATA_VDEV_ID_SHIFT	16
+#define DP_PEER_METADATA_OFFLOAD_MASK	0x01000000
+#define DP_PEER_METADATA_OFFLOAD_SHIFT	24
+
+#define DP_PEER_METADATA_VDEV_ID_GET_RH(_peer_metadata)		\
+	(((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK)	\
+			>> DP_PEER_METADATA_VDEV_ID_SHIFT)
+
+#define DP_PEER_METADATA_OFFLOAD_GET_RH(_peer_metadata)		\
+	(((_peer_metadata) & DP_PEER_METADATA_OFFLOAD_MASK)	\
+			>> DP_PEER_METADATA_OFFLOAD_SHIFT)
+
+static inline uint16_t
+dp_rx_peer_metadata_peer_id_get_rh(struct dp_soc *soc, uint32_t peer_metadata)
+{
+	struct htt_rx_peer_metadata_v0 *metadata =
+			(struct htt_rx_peer_metadata_v0 *)&peer_metadata;
+
+	return metadata->peer_id;
+}
+
+static inline bool
+dp_rx_intrabss_handle_nawds_rh(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
+			       qdf_nbuf_t nbuf_copy,
+			       struct cdp_tid_rx_stats *tid_stats)
+{
+	return false;
+}
+
+/**
+ * dp_wbm_get_rx_desc_from_hal_desc_rh() - NOP in RH arch implementation
+ *
+ * @soc: Handle to DP Soc structure
+ * @ring_desc: ring descriptor structure pointer
+ * @r_rx_desc: pointer to a pointer of Rx Desc
+ *
+ * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
+ */
+static inline
+QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_rh(
+					struct dp_soc *soc,
+					void *ring_desc,
+					struct dp_rx_desc **r_rx_desc)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+static inline
+void dp_rx_word_mask_subscribe_rh(struct dp_soc *soc,
+				  uint32_t *msg_word,
+				  void *rx_filter)
+{
+}
+
+static inline
+void dp_peer_get_reo_hash_rh(struct dp_vdev *vdev,
+			     struct cdp_peer_setup_info *setup_info,
+			     enum cdp_host_reo_dest_ring *reo_dest,
+			     bool *hash_based,
+			     uint8_t *lmac_peer_id_msb)
+{
+}
+
+static inline
+bool dp_reo_remap_config_rh(struct dp_soc *soc,
+			    uint32_t *remap0,
+			    uint32_t *remap1,
+			    uint32_t *remap2)
+{
+	return false;
+}
+
+/**
+ * dp_rx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
+ * @soc: DP soc structure
+ * @hal_soc: Handle to HAL Soc structure
+ * @quota: quota to process
+ * @hal_ring_hdl: Destination ring pointer
+ * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
+ * @last_prefetched_sw_desc: input & output param of last prefetch SW desc
+ *
+ * Return: None
+ */
+static inline
+void dp_rx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
+				    hal_soc_handle_t hal_soc,
+				    uint32_t quota,
+				    hal_ring_handle_t hal_ring_hdl,
+				    hal_ring_desc_t *last_prefetched_hw_desc,
+				    struct dp_rx_desc **last_prefetched_sw_desc)
+{
+}
+
+/**
+ * dp_peer_rx_reorder_queue_setup_rh() - NOP for RH arch implementation
+ * @soc: Handle to HAL Soc structure
+ * @peer: DP peer structure
+ * @tid: tid id
+ * @ba_window_size: BA window size
+ *
+ * Return: None
+ */
+static inline
+QDF_STATUS dp_peer_rx_reorder_queue_setup_rh(struct dp_soc *soc,
+					     struct dp_peer *peer,
+					     int tid,
+					     uint32_t ba_window_size)
+{
+	return QDF_STATUS_SUCCESS;
+}
+#endif

dp/wifi3.0/rh/dp_rh_tx.c

@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+#include "cdp_txrx_cmn_struct.h"
+#include "dp_types.h"
+#include "dp_tx.h"
+#include "dp_rh_tx.h"
+#include "dp_tx_desc.h"
+#include <dp_internal.h>
+#include <dp_htt.h>
+#include <hal_rh_api.h>
+#include <hal_rh_tx.h>
+#include "dp_peer.h"
+#ifdef FEATURE_WDS
+#include "dp_txrx_wds.h"
+#endif
+#include "dp_rh.h"
+
+extern uint8_t sec_type_map[MAX_CDP_SEC_TYPE];
+
+void dp_tx_comp_get_params_from_hal_desc_rh(struct dp_soc *soc,
+					    void *tx_comp_hal_desc,
+					    struct dp_tx_desc_s **r_tx_desc)
+{
+}
+
+void dp_tx_process_htt_completion_rh(struct dp_soc *soc,
+				     struct dp_tx_desc_s *tx_desc,
+				     uint8_t *status,
+				     uint8_t ring_id)
+{
+}
+
+QDF_STATUS
+dp_tx_hw_enqueue_rh(struct dp_soc *soc, struct dp_vdev *vdev,
+		    struct dp_tx_desc_s *tx_desc, uint16_t fw_metadata,
+		    struct cdp_tx_exception_metadata *tx_exc_metadata,
+		    struct dp_tx_msdu_info_s *msdu_info)
+{
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS dp_tx_desc_pool_init_rh(struct dp_soc *soc,
+				   uint32_t num_elem,
+				   uint8_t pool_id)
+{
+	uint32_t id, count, page_id, offset, pool_id_32;
+	struct dp_tx_desc_s *tx_desc;
+	struct dp_tx_desc_pool_s *tx_desc_pool;
+	uint16_t num_desc_per_page;
+
+	tx_desc_pool = &soc->tx_desc[pool_id];
+	tx_desc = tx_desc_pool->freelist;
+	count = 0;
+	pool_id_32 = (uint32_t)pool_id;
+	num_desc_per_page = tx_desc_pool->desc_pages.num_element_per_page;
+	while (tx_desc) {
+		page_id = count / num_desc_per_page;
+		offset = count % num_desc_per_page;
+		id = ((pool_id_32 << DP_TX_DESC_ID_POOL_OS) |
+			(page_id << DP_TX_DESC_ID_PAGE_OS) | offset);
+
+		tx_desc->id = id;
+		tx_desc->pool_id = pool_id;
+		dp_tx_desc_set_magic(tx_desc, DP_TX_MAGIC_PATTERN_FREE);
+		tx_desc = tx_desc->next;
+		count++;
+	}
+
+	return QDF_STATUS_SUCCESS;
+}
+
+void dp_tx_desc_pool_deinit_rh(struct dp_soc *soc,
+			       struct dp_tx_desc_pool_s *tx_desc_pool,
+			       uint8_t pool_id)
+{
+}
+
+QDF_STATUS dp_tx_compute_tx_delay_rh(struct dp_soc *soc,
+				     struct dp_vdev *vdev,
+				     struct hal_tx_completion_status *ts,
+				     uint32_t *delay_us)
+{
+	return QDF_STATUS_SUCCESS;
+}

dp/wifi3.0/rh/dp_rh_tx.h

@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+#ifndef __DP_RH_TX_H
+#define __DP_RH_TX_H
+
+#include <dp_types.h>
+
+/**
+ * dp_tx_hw_enqueue_rh() - Enqueue to TCL HW for transmit
+ * @soc: DP Soc Handle
+ * @vdev: DP vdev handle
+ * @tx_desc: Tx Descriptor Handle
+ * @fw_metadata: Metadata to send to Target Firmware along with frame
+ * @tx_exc_metadata: Handle that holds exception path meta data
+ * @msdu_info: Holds the MSDU information to be transmitted
+ *
+ *  Gets the next free TCL HW DMA descriptor and sets up required parameters
+ *  from software Tx descriptor
+ *
+ * Return: QDF_STATUS_SUCCESS: success
+ *         QDF_STATUS_E_RESOURCES: Error return
+ */
+QDF_STATUS
+dp_tx_hw_enqueue_rh(struct dp_soc *soc, struct dp_vdev *vdev,
+		    struct dp_tx_desc_s *tx_desc, uint16_t fw_metadata,
+		    struct cdp_tx_exception_metadata *tx_exc_metadata,
+		    struct dp_tx_msdu_info_s *msdu_info);
+/**
+ * dp_tx_comp_get_params_from_hal_desc_rh() - Get TX desc from HAL comp desc
+ * @soc: DP soc handle
+ * @tx_comp_hal_desc: HAL TX Comp Descriptor
+ * @r_tx_desc: SW Tx Descriptor retrieved from HAL desc.
+ *
+ * Return: None
+ */
+void dp_tx_comp_get_params_from_hal_desc_rh(struct dp_soc *soc,
+					    void *tx_comp_hal_desc,
+					    struct dp_tx_desc_s **r_tx_desc);
+
+/**
+ * dp_tx_process_htt_completion_rh() - Tx HTT Completion Indication Handler
+ * @soc: Handle to DP soc structure
+ * @tx_desc: software descriptor head pointer
+ * @status : Tx completion status from HTT descriptor
+ * @ring_id: ring number
+ *
+ * This function will process HTT Tx indication messages from Target
+ *
+ * Return: none
+ */
+void dp_tx_process_htt_completion_rh(struct dp_soc *soc,
+				     struct dp_tx_desc_s *tx_desc,
+				     uint8_t *status,
+				     uint8_t ring_id);
+
+/**
+ * dp_tx_desc_pool_init_rh() - Initialize Tx Descriptor pool(s)
+ * @soc: Handle to DP Soc structure
+ * @num_elem: pool descriptor number
+ * @pool_id: pool to allocate
+ *
+ * Return: QDF_STATUS_SUCCESS - success, others - failure
+ */
+QDF_STATUS dp_tx_desc_pool_init_rh(struct dp_soc *soc,
+				   uint32_t num_elem,
+				   uint8_t pool_id);
+
+/**
+ * dp_tx_desc_pool_deinit_rh() - De-initialize Tx Descriptor pool(s)
+ * @soc: Handle to DP Soc structure
+ * @tx_desc_pool: Tx descriptor pool handler
+ * @pool_id: pool to deinit
+ *
+ * Return: None.
+ */
+void dp_tx_desc_pool_deinit_rh(struct dp_soc *soc,
+			       struct dp_tx_desc_pool_s *tx_desc_pool,
+			       uint8_t pool_id);
+
+/**
+ * dp_tx_compute_tx_delay_rh() - Compute HW Tx completion delay
+ * @soc: Handle to DP Soc structure
+ * @vdev: vdev
+ * @ts: Tx completion status
+ * @delay_us: Delay to be calculated in microseconds
+ *
+ * Return: QDF_STATUS
+ */
+QDF_STATUS dp_tx_compute_tx_delay_rh(struct dp_soc *soc,
+				     struct dp_vdev *vdev,
+				     struct hal_tx_completion_status *ts,
+				     uint32_t *delay_us);
+#endif