qcacmn: Update CE registers and CE IRQ for qca6750

Update CE registers offset during hal srng configuration
and configure CE IRQ for qcac6750.

Change-Id: I4fd3d37783361f0029c7ef80e32425f8790d1250
CRs-Fixed: 2617699

hal/wifi3.0/qca6750/hal_6750.c

@@ -1566,18 +1566,18 @@ struct hal_hw_srng_config hw_srng_table_6750[] = {
 		.lmac_ring = FALSE,
 		.ring_dir = HAL_SRNG_SRC_RING,
 		.reg_start = {
-		HWIO_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,
-		HWIO_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR,
+		HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,
+		HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR,
 		},
 		.reg_size = {
-		HWIO_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR -
-		HWIO_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,
-		HWIO_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR -
-		HWIO_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,
+		HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR -
+		HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,
+		HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR -
+		HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,
 		},
 		.max_size =
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_BMSK >>
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_SHFT
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_BMSK >>
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_SHFT
 	},
 	{ /* CE_DST */
 		.start_ring_id = HAL_SRNG_CE_0_DST,
@@ -1590,18 +1590,18 @@ struct hal_hw_srng_config hw_srng_table_6750[] = {
 		.lmac_ring = FALSE,
 		.ring_dir = HAL_SRNG_SRC_RING,
 		.reg_start = {
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR,
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR,
 		},
 		.reg_size = {
-		HWIO_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR -
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,
-		HWIO_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR -
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR
+		HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR -
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,
+		HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR -
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR
 		},
 		.max_size =
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_BMSK >>
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_SHFT
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_BMSK >>
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_SHFT
 	},
 	{ /* CE_DST_STATUS */
 		.start_ring_id = HAL_SRNG_CE_0_DST_STATUS,
@@ -1610,19 +1610,19 @@ struct hal_hw_srng_config hw_srng_table_6750[] = {
 		.lmac_ring = FALSE,
 		.ring_dir = HAL_SRNG_DST_RING,
 		.reg_start = {
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR,
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR,
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR,
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR,
 		},
 		/* TODO: check destination status ring registers */
 		.reg_size = {
-		HWIO_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR -
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,
-		HWIO_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR -
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR
+		HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR -
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,
+		HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR -
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR
 		},
 		.max_size =
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_BMSK >>
-		HWIO_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_SHFT,
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_BMSK >>
+		HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_SHFT,
 	},
 	{ /* WBM_IDLE_LINK */
 		.start_ring_id = HAL_SRNG_WBM_IDLE_LINK,

hif/src/hif_io32.h

@@ -23,8 +23,7 @@
 #include "hif.h"
 #include "hif_main.h"
 
-#if defined(HIF_REG_WINDOW_SUPPORT) && (defined(HIF_PCI) || \
-    defined(HIF_IPCI))
+#if defined(HIF_REG_WINDOW_SUPPORT) && defined(HIF_PCI)
 
 static inline
 void hif_write32_mb_reg_window(void *sc,

hif/src/ipcie/if_ipci.c

@@ -401,25 +401,12 @@ static int hif_ce_msi_configure_irq(struct hif_softc *scn)
 	struct HIF_CE_state *ce_sc = HIF_GET_CE_STATE(scn);
 	struct hif_ipci_softc *ipci_sc = HIF_GET_IPCI_SOFTC(scn);
 
-	/* do wake irq assignment */
-	ret = pld_get_user_msi_assignment(scn->qdf_dev->dev, "WAKE",
-					  &msi_data_count, &msi_data_start,
-					  &msi_irq_start);
-	if (ret)
-		return ret;
-
-	scn->wake_irq = pld_get_msi_irq(scn->qdf_dev->dev, msi_irq_start);
-	ret = request_irq(scn->wake_irq, hif_wake_interrupt_handler,
-			  IRQF_NO_SUSPEND, "wlan_wake_irq", scn);
-	if (ret)
-		return ret;
-
 	/* do ce irq assignments */
 	ret = pld_get_user_msi_assignment(scn->qdf_dev->dev, "CE",
 					  &msi_data_count, &msi_data_start,
 					  &msi_irq_start);
 	if (ret)
-		goto free_wake_irq;
+		return ret;
 
 	scn->bus_ops.hif_irq_disable = &hif_ce_srng_msi_irq_disable;
 	scn->bus_ops.hif_irq_enable = &hif_ce_srng_msi_irq_enable;
@@ -462,10 +449,6 @@ free_irq:
 		free_irq(irq, &ce_sc->tasklets[ce_id]);
 	}
 
-free_wake_irq:
-	free_irq(scn->wake_irq, scn->qdf_dev->dev);
-	scn->wake_irq = 0;
-
 	return ret;
 }
 
@@ -685,7 +668,7 @@ bool hif_ipci_needs_bmi(struct hif_softc *scn)
 #ifdef FORCE_WAKE
 int hif_force_wake_request(struct hif_opaque_softc *hif_handle)
 {
-	uint32_t timeout = 0, value;
+	uint32_t timeout = 0;
 	struct hif_softc *scn = (struct hif_softc *)hif_handle;
 	struct hif_ipci_softc *ipci_scn = HIF_GET_IPCI_SOFTC(scn);
 
@@ -707,36 +690,6 @@ int hif_force_wake_request(struct hif_opaque_softc *hif_handle)
 		return -EINVAL;
 	}
 	HIF_STATS_INC(ipci_scn, mhi_force_wake_success, 1);
-	hif_write32_mb(scn,
-		       scn->mem +
-		       PCIE_SOC_PCIE_REG_PCIE_SCRATCH_0_SOC_PCIE_REG,
-		       0);
-	hif_write32_mb(scn,
-		       scn->mem +
-		       PCIE_PCIE_LOCAL_REG_PCIE_SOC_WAKE_PCIE_LOCAL_REG,
-		       1);
-
-	HIF_STATS_INC(ipci_scn, soc_force_wake_register_write_success, 1);
-	/*
-	 * do not reset the timeout
-	 * total_wake_time = MHI_WAKE_TIME + PCI_WAKE_TIME < 50 ms
-	 */
-	do {
-		value =
-		hif_read32_mb(scn,
-			      scn->mem +
-			      PCIE_SOC_PCIE_REG_PCIE_SCRATCH_0_SOC_PCIE_REG);
-		if (value)
-			break;
-		qdf_mdelay(FORCE_WAKE_DELAY_MS);
-		timeout += FORCE_WAKE_DELAY_MS;
-	} while (timeout <= FORCE_WAKE_DELAY_TIMEOUT_MS);
-
-	if (!value) {
-		hif_err("failed handshake mechanism");
-		HIF_STATS_INC(ipci_scn, soc_force_wake_failure, 1);
-		return -ETIMEDOUT;
-	}
 
 	HIF_STATS_INC(ipci_scn, soc_force_wake_success, 1);
 
@@ -757,10 +710,7 @@ int hif_force_wake_release(struct hif_opaque_softc *hif_handle)
 	}
 
 	HIF_STATS_INC(ipci_scn, mhi_force_wake_release_success, 1);
-	hif_write32_mb(scn,
-		       scn->mem +
-		       PCIE_PCIE_LOCAL_REG_PCIE_SOC_WAKE_PCIE_LOCAL_REG,
-		       0);
+
 	HIF_STATS_INC(ipci_scn, soc_force_wake_release_success, 1);
 	return 0;
 }

hif/src/qca6750def.c

@@ -150,8 +150,8 @@
 #define CE_DDR_ADDRESS_FOR_RRI_LOW MISSING
 #define CE_DDR_ADDRESS_FOR_RRI_HIGH MISSING
 
-#define HOST_IE_ADDRESS HWIO_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR
-#define HOST_IE_ADDRESS_2 HWIO_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_ADDR
+#define HOST_IE_ADDRESS HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR
+#define HOST_IE_ADDRESS_2 HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_ADDR
 
 #define HOST_IE_COPY_COMPLETE_MASK MISSING
 #define SR_BA_ADDRESS MISSING