qcacmn: DSC-Add search_idx tbl alloc framework
In STA mode ast idx override approach is used. In DSc to use ast idx Need to configure a search idx register with ast idx and cache set number. Added needed logic to instantiate search index register and use it for STA mode in DSC path. Change-Id: I6b3fb7c01a39b16ff1d473381c6155436fe2b27a CRs-Fixed: 3375219
Este commit está contenido en:

cometido por
Madan Koyyalamudi

padre
07e72e4e7e
commit
2776d767a2
@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -218,6 +218,14 @@ struct dp_ppe_vp_tbl_entry {
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bool is_configured;
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};
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/**
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* struct dp_ppe_vp_search_idx_tbl_entry - PPE Virtual search table entry
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* @is_configured: Boolean that the entry is configured.
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*/
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struct dp_ppe_vp_search_idx_tbl_entry {
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bool is_configured;
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};
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/**
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* struct dp_ppe_vp_profile - PPE direct switch profiler per vdev
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* @vp_num: Virtual port number
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@@ -288,12 +296,17 @@ struct dp_ppeds_napi {
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* @reo2ppe_ring: REO2PPE ring
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* @ppe2tcl_ring: PPE2TCL ring
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* @ppe_vp_tbl: PPE VP table
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* @ppe_vp_search_idx_tbl: PPE VP search idx table
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* @ppe_vp_tbl_lock: PPE VP table lock
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* @num_ppe_vp_entries : Number of PPE VP entries
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* @ipa_bank_id: TCL bank id used by IPA
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* @ppeds_tx_cc_ctx: Cookie conversion context for ppeds tx desc pool
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* @ppeds_tx_desc: PPEDS tx desc pool
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* @ppeds_handle: PPEDS soc instance handle
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* @ppe_vp_tbl_lock: PPEDS VP table lock
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* @num_ppe_vp_entries: PPEDS number of VP entries
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* @num_ppe_vp_search_idx_entries: PPEDS VP search idx entries
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* @irq_name: PPEDS VP irq names
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*/
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struct dp_soc_be {
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struct dp_soc soc;
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@@ -315,12 +328,14 @@ struct dp_soc_be {
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struct dp_srng ppe2tcl_ring;
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struct dp_srng ppeds_wbm_release_ring;
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struct dp_ppe_vp_tbl_entry *ppe_vp_tbl;
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struct dp_ppe_vp_search_idx_tbl_entry *ppe_vp_search_idx_tbl;
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struct dp_hw_cookie_conversion_t ppeds_tx_cc_ctx;
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struct dp_ppeds_tx_desc_pool_s ppeds_tx_desc;
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struct dp_ppeds_napi ppeds_napi_ctxt;
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void *ppeds_handle;
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qdf_mutex_t ppe_vp_tbl_lock;
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uint8_t num_ppe_vp_entries;
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uint8_t num_ppe_vp_search_idx_entries;
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char irq_name[DP_PPE_INTR_MAX][DP_PPE_INTR_STRNG_LEN];
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#endif
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#ifdef WLAN_FEATURE_11BE_MLO
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@@ -832,7 +832,7 @@ hal_tx_mcast_mlo_reinject_routing_set(
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}
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#endif
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/*
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/**
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* hal_reo_config_reo2ppe_dest_info() - Configure reo2ppe dest info
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* @hal_soc_hdl: HAL SoC Context
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*
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@@ -847,7 +847,7 @@ void hal_reo_config_reo2ppe_dest_info(hal_soc_handle_t hal_soc_hdl)
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hal_soc->ops->hal_reo_config_reo2ppe_dest_info(hal_soc_hdl);
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}
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/*
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/**
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* hal_tx_get_num_ppe_vp_tbl_entries() - Get the total number of VP table
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* @hal_soc: HAL SoC Context
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*
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@@ -861,6 +861,20 @@ uint32_t hal_tx_get_num_ppe_vp_tbl_entries(hal_soc_handle_t hal_soc_hdl)
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return hal_soc->ops->hal_tx_get_num_ppe_vp_tbl_entries(hal_soc_hdl);
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}
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/**
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* hal_tx_get_num_ppe_vp_search_idx_tbl_entries() - Get the total number of search idx registers
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* @hal_soc: HAL SoC Context
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*
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* Return: Total number of entries.
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*/
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static inline
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uint32_t hal_tx_get_num_ppe_vp_search_idx_tbl_entries(hal_soc_handle_t hal_soc_hdl)
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{
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struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
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return hal_soc->ops->hal_tx_get_num_ppe_vp_search_idx_tbl_entries(hal_soc_hdl);
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}
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/**
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* hal_tx_set_ppe_cmn_cfg()- Set the PPE common config
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* @hal_soc: HAL SoC context
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@@ -1301,6 +1301,8 @@ struct hal_hw_txrx_ops {
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void (*hal_tx_ring_halt_set)(hal_soc_handle_t hal_soc_hdl);
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void (*hal_tx_ring_halt_reset)(hal_soc_handle_t hal_soc_hdl);
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bool (*hal_tx_ring_halt_poll)(hal_soc_handle_t hal_soc_hdl);
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uint32_t (*hal_tx_get_num_ppe_vp_search_idx_tbl_entries)(
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hal_soc_handle_t hal_soc_hdl);
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};
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/**
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@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -214,6 +214,8 @@ static void hal_get_tqm_scratch_reg_qcn9224(hal_soc_handle_t hal_soc_hdl,
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#define LINK_DESC_SIZE (NUM_OF_DWORDS_RX_MSDU_LINK << 2)
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#define HAL_PPE_VP_ENTRIES_MAX 32
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#define HAL_PPE_VP_SEARCH_IDX_REG_MAX 8
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/**
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* hal_get_link_desc_size_9224(): API to get the link desc size
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*
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@@ -1511,7 +1513,7 @@ static uint32_t hal_qcn9224_get_reo_qdesc_size(uint32_t ba_window_size, int tid)
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}
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/*
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* hal_tx_dump_ppe_vp_entry_9224()
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* hal_tx_get_num_ppe_vp_tbl_entries_9224()
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* @hal_soc_hdl: HAL SoC handle
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*
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* Return: Number of PPE VP entries
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@@ -1522,6 +1524,18 @@ uint32_t hal_tx_get_num_ppe_vp_tbl_entries_9224(hal_soc_handle_t hal_soc_hdl)
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return HAL_PPE_VP_ENTRIES_MAX;
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}
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/*
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* hal_tx_get_num_ppe_vp_search_idx_reg_entries_9224()
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* @hal_soc_hdl: HAL SoC handle
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*
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* Return: Number of PPE VP search index registers
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*/
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static
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uint32_t hal_tx_get_num_ppe_vp_search_idx_reg_entries_9224(hal_soc_handle_t hal_soc_hdl)
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{
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return HAL_PPE_VP_SEARCH_IDX_REG_MAX;
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}
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/**
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* hal_rx_tlv_msdu_done_copy_get_9224() - Get msdu done copy bit from rx_tlv
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*
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@@ -1817,6 +1831,8 @@ static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
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hal_tx_ppe2tcl_ring_halt_reset_9224;
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hal_soc->ops->hal_tx_ring_halt_poll =
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hal_tx_ppe2tcl_ring_halt_done_9224;
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hal_soc->ops->hal_tx_get_num_ppe_vp_search_idx_tbl_entries =
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hal_tx_get_num_ppe_vp_search_idx_reg_entries_9224;
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};
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/**
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