qcacmn: Add support for direct buffer rx module

Direct Buffer Receive provides the driver with a mechanism by which
target can transfer information directly into host memory via DMA.

Add following support for direct buffer rx module -

1. Add UMAC component ID for direct buffer rx module to be utilized
   for object manager APIs
2. Add support for populating DMA capabilities shared by target in
   object manager maintained extended service ready event.
3. Add support for Tx Ops for direct buffer rx module.

Change-Id: I2fa60e8572cbcc0d1fa7830e7e94b6e486bdcc78
CRs-Fixed: 2158297

target_if/core/src/target_if_main.c

@@ -58,6 +58,10 @@
 #include <target_if_offchan_txrx_api.h>
 #endif
 
+#ifdef DIRECT_BUF_RX_ENABLE
+#include <target_if_direct_buf_rx_api.h>
+#endif
+
 static struct target_if_ctx *g_target_if_ctx;
 
 struct target_if_ctx *target_if_get_ctx()
@@ -215,6 +219,19 @@ static void target_if_sptrl_tx_ops_register(
 }
 #endif /* WLAN_CONV_SPECTRAL_ENABLE */
 
+#ifdef DIRECT_BUF_RX_ENABLE
+static void target_if_direct_buf_rx_tx_ops_register(
+				struct wlan_lmac_if_tx_ops *tx_ops)
+{
+	target_if_direct_buf_rx_register_tx_ops(tx_ops);
+}
+#else
+static void target_if_direct_buf_rx_tx_ops_register(
+				struct wlan_lmac_if_tx_ops *tx_ops)
+{
+}
+#endif /* DIRECT_BUF_RX_ENABLE */
+
 static void target_if_target_tx_ops_register(
 		struct wlan_lmac_if_tx_ops *tx_ops)
 {
@@ -282,6 +299,9 @@ QDF_STATUS target_if_register_tx_ops(struct wlan_lmac_if_tx_ops *tx_ops)
 	/* Components parallel to UMAC to register their TX-ops here */
 	target_if_sptrl_tx_ops_register(tx_ops);
 
+	/* Register direct buffer rx component tx ops here */
+	target_if_direct_buf_rx_tx_ops_register(tx_ops);
+
 #ifdef CONVERGED_P2P_ENABLE
 	/* Converged UMAC components to register P2P TX-ops */
 	target_if_p2p_register_tx_ops(tx_ops);

target_if/init_deinit/src/service_ready_event_handler.c

@@ -239,6 +239,49 @@ return_exit:
 	return qdf_status_to_os_return(status);
 }
 
+static int populate_dbr_ring_capability(void *handle, uint8_t *event,
+		struct wlan_objmgr_psoc_ext_service_ready_param *service_param)
+{
+	uint8_t cap_idx;
+	uint32_t num_dbr_ring_caps;
+	QDF_STATUS status = QDF_STATUS_SUCCESS;
+
+	num_dbr_ring_caps = service_param->service_ext_param.num_dbr_ring_caps;
+
+	WMI_LOGE("Num DMA Capabilities = %d", num_dbr_ring_caps);
+
+	if (!num_dbr_ring_caps) {
+		return 0;
+	}
+
+	service_param->dbr_ring_cap = qdf_mem_malloc(
+				sizeof(struct wlan_psoc_host_dbr_ring_caps) *
+				num_dbr_ring_caps);
+
+	if (!service_param->dbr_ring_cap) {
+		WMI_LOGE("Mem alloc for DMA cap failed");
+		return -EINVAL;
+	}
+
+	for (cap_idx = 0; cap_idx < num_dbr_ring_caps; cap_idx++) {
+		status = wmi_extract_dbr_ring_cap_service_ready_ext(handle,
+				event, cap_idx,
+				&(service_param->dbr_ring_cap[cap_idx]));
+		if (QDF_IS_STATUS_ERROR(status)) {
+			WMI_LOGE("Extraction of DMA cap failed");
+			goto free_and_return;
+		}
+	}
+
+	return 0;
+
+free_and_return:
+	qdf_mem_free(service_param->dbr_ring_cap);
+	service_param->dbr_ring_cap = NULL;
+
+	return qdf_status_to_os_return(status);
+}
+
 static int populate_phy_reg_capability(void *handle, uint8_t *event,
 		struct wlan_objmgr_psoc_ext_service_ready_param *service_param)
 {
@@ -321,6 +364,12 @@ int init_deinit_service_ext_ready_event_handler(ol_scn_t scn_handle,
 			goto free_param_and_exit;
 	}
 
+	err_code = populate_dbr_ring_capability(wmi_handle,
+						event, service_param);
+
+	if (err_code)
+		goto free_param_and_exit;
+
 	wlan_objmgr_populate_ext_service_ready_data(psoc, service_param);
 	legacy_callback = target_if_get_psoc_legacy_service_ready_cb();
 

umac/cmn_services/inc/wlan_cmn.h

@@ -130,6 +130,7 @@ enum wlan_umac_comp_id {
 	WLAN_UMAC_COMP_P2P,
 	WLAN_UMAC_COMP_POLICY_MGR,
 	WLAN_UMAC_COMP_CONFIG,
+	WLAN_TARGET_IF_COMP_DIRECT_BUF_RX,
 	WLAN_UMAC_COMP_WIFI_POS,
 	WLAN_UMAC_COMP_TDLS,
 	WLAN_UMAC_COMP_ATF,

umac/cmn_services/obj_mgr/inc/wlan_objmgr_cmn.h

@@ -237,6 +237,7 @@ typedef enum {
 	WLAN_SPECTRAL_ID      = 27,
 	WLAN_SPLITMAC_ID      = 28,
 	WLAN_DEBUG_ID         = 29,
+	WLAN_DIRECT_BUF_RX_ID = 30,
 	WLAN_REF_ID_MAX,
 } wlan_objmgr_ref_dbgid;
 
@@ -280,6 +281,7 @@ static inline char *string_from_dbgid(wlan_objmgr_ref_dbgid id)
 					"WLAN_SPECTRAL_ID",
 					"WLAN_SPLITMAC_ID",
 					"WLAN_DEBUG_ID",
+					"WLAN_DIRECT_BUF_RX_ID",
 					"WLAN_REF_ID_MAX" };
 
 	return (char *)strings[id];

umac/cmn_services/obj_mgr/inc/wlan_objmgr_psoc_service_ready_api.h

@@ -253,6 +253,23 @@ struct wlan_psoc_host_hw_mode_caps {
 	uint32_t hw_mode_config_type;
 };
 
+/**
+ * struct wlan_psoc_host_dbr_ring_caps - Direct buffer rx module ring
+ *                                       capability maintained by PSOC
+ * @pdev_id: Pdev id of the pdev
+ * @mod_id: Module id
+ * @ring_elems_min: Minimum number of pointers in the ring
+ * @min_buf_size: Minimum size of each buffer entry in the ring
+ * @min_buf_align: Minimum alignment of the addresses in the ring
+ */
+struct wlan_psoc_host_dbr_ring_caps {
+	uint32_t pdev_id;
+	uint32_t mod_id;
+	uint32_t ring_elems_min;
+	uint32_t min_buf_size;
+	uint32_t min_buf_align;
+};
+
 /**
  * struct wlan_psoc_host_chainmask_capabilities - chain mask capabilities list
  * @supports_chan_width_20: channel width 20 support for this chain mask.
@@ -309,6 +326,7 @@ struct wlan_psoc_host_chainmask_table {
  * @num_hw_modes: Number of HW modes in event
  * @num_phy: Number of Phy mode.
  * @num_chainmask_tables: Number of chain mask tables.
+ * @num_dbr_ring_caps: Number of direct buf rx ring capabilities
  * @chainmask_table: Available chain mask tables.
  */
 struct wlan_psoc_host_service_ext_param {
@@ -322,6 +340,7 @@ struct wlan_psoc_host_service_ext_param {
 	uint32_t num_hw_modes;
 	uint32_t num_phy;
 	uint32_t num_chainmask_tables;
+	uint32_t num_dbr_ring_caps;
 	struct wlan_psoc_host_chainmask_table chainmask_table[PSOC_MAX_CHAINMASK_TABLES];
 };
 
@@ -331,6 +350,7 @@ struct wlan_psoc_host_service_ext_param {
  * @hw_mode_caps: hw mode caps
  * @mac_phy_cap: mac phy cap
  * @reg_cap: regulatory capability
+ * @dbr_ring_cap: pointer to direct buf rx ring capability
  */
 struct wlan_objmgr_psoc_ext_service_ready_param {
 	struct wlan_psoc_host_service_ext_param service_ext_param;
@@ -339,6 +359,7 @@ struct wlan_objmgr_psoc_ext_service_ready_param {
 			mac_phy_cap[PSOC_MAX_MAC_PHY_CAP];
 	struct wlan_psoc_host_hal_reg_capabilities_ext
 			reg_cap[PSOC_MAX_PHY_REG_CAP];
+	struct wlan_psoc_host_dbr_ring_caps *dbr_ring_cap;
 };
 
 /**

umac/global_umac_dispatcher/lmac_if/inc/wlan_lmac_if_def.h

@@ -58,6 +58,11 @@ struct oem_data_req;
 struct oem_data_rsp;
 #endif /* WIFI_POS_CONVERGED */
 
+#ifdef DIRECT_BUF_RX_ENABLE
+/* forward declarations for direct buf rx */
+struct direct_buf_rx_data;
+#endif
+
 #ifdef WLAN_FEATURE_NAN_CONVERGENCE
 struct scheduler_msg;
 #endif
@@ -335,6 +340,20 @@ struct wlan_lmac_if_wifi_pos_tx_ops {
 };
 #endif
 
+#ifdef DIRECT_BUF_RX_ENABLE
+/**
+ * struct wlan_lmac_if_direct_buf_rx_tx_ops - structire of direct buf rx txops
+ * @direct_buf_rx_module_register: Registration API callback for modules
+ *                                 to register with direct buf rx framework
+ */
+struct wlan_lmac_if_direct_buf_rx_tx_ops {
+	QDF_STATUS (*direct_buf_rx_module_register)(
+			struct wlan_objmgr_pdev *pdev, uint8_t mod_id,
+			int (*dbr_rsp_handler)(struct wlan_objmgr_pdev *pdev,
+				struct direct_buf_rx_data *dbr_data));
+};
+#endif
+
 #ifdef CONVERGED_TDLS_ENABLE
 /* fwd declarations for tdls tx ops */
 struct tdls_info;
@@ -566,6 +585,9 @@ struct wlan_lmac_if_tx_ops {
 #ifdef WLAN_OFFCHAN_TXRX_ENABLE
 	struct wlan_lmac_if_offchan_txrx_ops offchan_txrx_ops;
 #endif
+#ifdef DIRECT_BUF_RX_ENABLE
+	struct wlan_lmac_if_direct_buf_rx_tx_ops dbr_tx_ops;
+#endif
 };
 
 /**