From 260b769735d348e129b1bad955db6e206b603000 Mon Sep 17 00:00:00 2001 From: Laxminath Kasam Date: Fri, 8 Mar 2019 14:56:39 +0530 Subject: [PATCH] asoc: wcd934x: Fix TX HPF setting update In case TX HPF mixer ctl set to 150Hz, go bit register is not updated. Always update go bit along with setting 150Hz at TX enable sequence. CRs-Fixed: 2407902 Change-Id: I05b8a471cb2505d1ca5b290ea7ba35da5a534170 Signed-off-by: Laxminath Kasam --- asoc/codecs/wcd934x/wcd934x.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/asoc/codecs/wcd934x/wcd934x.c b/asoc/codecs/wcd934x/wcd934x.c index 07bbcb39b7..f1c353699e 100644 --- a/asoc/codecs/wcd934x/wcd934x.c +++ b/asoc/codecs/wcd934x/wcd934x.c @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only -/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved. */ #include #include @@ -4687,20 +4687,18 @@ static int tavil_codec_enable_dec(struct snd_soc_dapm_widget *w, tavil->tx_hpf_work[decimator].hpf_cut_off_freq = hpf_cut_off_freq; - if (hpf_cut_off_freq != CF_MIN_3DB_150HZ) { - snd_soc_component_update_bits(component, dec_cfg_reg, - TX_HPF_CUT_OFF_FREQ_MASK, - CF_MIN_3DB_150HZ << 5); - snd_soc_component_update_bits(component, hpf_gate_reg, + snd_soc_component_update_bits(component, dec_cfg_reg, + TX_HPF_CUT_OFF_FREQ_MASK, + CF_MIN_3DB_150HZ << 5); + snd_soc_component_update_bits(component, hpf_gate_reg, 0x02, 0x02); - /* - * Minimum 1 clk cycle delay is required as per - * HW spec. - */ - usleep_range(1000, 1010); - snd_soc_component_update_bits(component, hpf_gate_reg, + /* + * Minimum 1 clk cycle delay is required as per + * HW spec. + */ + usleep_range(1000, 1010); + snd_soc_component_update_bits(component, hpf_gate_reg, 0x02, 0x00); - } /* schedule work queue to Remove Mute */ schedule_delayed_work(&tavil->tx_mute_dwork[decimator].dwork, msecs_to_jiffies(tx_unmute_delay));