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qcacmn: Add hal_reo_status_get_header_generic API

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Implement hal_reo_status_get_header_generic
based on the chipset as the macro to retrieve
reo_status value is chipset dependent.

Change-Id: I43bd624bec37fb051f33b4828fcf7cd3e4b2a61e
CRs-Fixed: 2522133
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-09-21 17:56:41 -07:00
committed by nshrivas
parent 84d5092701
commit 25d7dbc589
7 changed files with 588 additions and 100 deletions
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95
hal/wifi3.0/hal_generic_api.h
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@@ -1481,101 +1481,6 @@ hal_rx_status_get_tlv_info_generic(void *rx_tlv_hdr, void *ppduinfo,
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
/**
* hal_reo_status_get_header_generic - Process reo desc info
* @d - Pointer to reo descriptior
* @b - tlv type info
* @h1 - Pointer to hal_reo_status_header where info to be stored
*
* Return - none.
*
*/
static void hal_reo_status_get_header_generic(uint32_t *d, int b, void *h1)
{
uint32_t val1 = 0;
struct hal_reo_status_header *h =
(struct hal_reo_status_header *)h1;
switch (b) {
case HAL_REO_QUEUE_STATS_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_GET_QUEUE_STATS_STATUS_0,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER)];
break;
case HAL_REO_FLUSH_QUEUE_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_FLUSH_QUEUE_STATUS_0,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER)];
break;
case HAL_REO_FLUSH_CACHE_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_FLUSH_CACHE_STATUS_0,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER)];
break;
case HAL_REO_UNBLK_CACHE_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_UNBLOCK_CACHE_STATUS_0,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER)];
break;
case HAL_REO_TIMOUT_LIST_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_FLUSH_TIMEOUT_LIST_STATUS_0,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER)];
break;
case HAL_REO_DESC_THRES_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_0,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER)];
break;
case HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_UPDATE_RX_REO_QUEUE_STATUS_0,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER)];
break;
default:
qdf_nofl_err("ERROR: Unknown tlv");
break;
}
h->cmd_num =
HAL_GET_FIELD(
UNIFORM_REO_STATUS_HEADER_0, REO_STATUS_NUMBER,
val1);
h->exec_time =
HAL_GET_FIELD(UNIFORM_REO_STATUS_HEADER_0,
CMD_EXECUTION_TIME, val1);
h->status =
HAL_GET_FIELD(UNIFORM_REO_STATUS_HEADER_0,
REO_CMD_EXECUTION_STATUS, val1);
switch (b) {
case HAL_REO_QUEUE_STATS_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_GET_QUEUE_STATS_STATUS_1,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_GENERIC)];
break;
case HAL_REO_FLUSH_QUEUE_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_FLUSH_QUEUE_STATUS_1,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_GENERIC)];
break;
case HAL_REO_FLUSH_CACHE_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_FLUSH_CACHE_STATUS_1,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_GENERIC)];
break;
case HAL_REO_UNBLK_CACHE_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_UNBLOCK_CACHE_STATUS_1,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_GENERIC)];
break;
case HAL_REO_TIMOUT_LIST_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_FLUSH_TIMEOUT_LIST_STATUS_1,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_GENERIC)];
break;
case HAL_REO_DESC_THRES_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS_1,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_GENERIC)];
break;
case HAL_REO_UPDATE_RX_QUEUE_STATUS_TLV:
val1 = d[HAL_OFFSET_DW(REO_UPDATE_RX_REO_QUEUE_STATUS_1,
UNIFORM_REO_STATUS_HEADER_STATUS_HEADER_GENERIC)];
break;
default:
qdf_nofl_err("ERROR: Unknown tlv");
break;
}
h->tstamp =
HAL_GET_FIELD(UNIFORM_REO_STATUS_HEADER_1, TIMESTAMP, val1);
}
/**
* hal_reo_setup - Initialize HW REO block