qcacmn: Add hal_rx_get_mpdu_frame_control_valid API

Implement hal_rx_get_mpdu_frame_control_valid API
based on the chipset as the macro to retrieve
frame control valid value is chipset dependent.

Change-Id: I49d16ae44b2e9567ff746d2088058f0c1025ea40
CRs-Fixed: 2522133
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-09-21 13:31:30 -07:00
committed by nshrivas
parent 1e3a479fdf
commit 25ba7b8c4f
14 changed files with 143 additions and 19 deletions

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@@ -533,7 +533,9 @@ static uint16_t dp_rx_defrag_hdrsize(struct dp_soc *soc, qdf_nbuf_t nbuf)
to_ds = hal_rx_mpdu_get_to_ds(soc->hal_soc, rx_tlv_hdr); to_ds = hal_rx_mpdu_get_to_ds(soc->hal_soc, rx_tlv_hdr);
fr_ds = hal_rx_mpdu_get_fr_ds(soc->hal_soc, rx_tlv_hdr); fr_ds = hal_rx_mpdu_get_fr_ds(soc->hal_soc, rx_tlv_hdr);
frm_ctrl_valid = hal_rx_get_mpdu_frame_control_valid(rx_tlv_hdr); frm_ctrl_valid =
hal_rx_get_mpdu_frame_control_valid(soc->hal_soc,
rx_tlv_hdr);
frm_ctrl_field = hal_rx_get_frame_ctrl_field(rx_tlv_hdr); frm_ctrl_field = hal_rx_get_frame_ctrl_field(rx_tlv_hdr);
if (to_ds && fr_ds) if (to_ds && fr_ds)
@@ -894,6 +896,7 @@ static void dp_rx_defrag_err(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
/* /*
* dp_rx_defrag_nwifi_to_8023(): Transcap 802.11 to 802.3 * dp_rx_defrag_nwifi_to_8023(): Transcap 802.11 to 802.3
* @soc: dp soc handle
* @nbuf: Pointer to the fragment buffer * @nbuf: Pointer to the fragment buffer
* @hdrsize: Size of headers * @hdrsize: Size of headers
* *
@@ -902,7 +905,8 @@ static void dp_rx_defrag_err(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
* Returns: None * Returns: None
*/ */
static void static void
dp_rx_defrag_nwifi_to_8023(qdf_nbuf_t nbuf, uint16_t hdrsize) dp_rx_defrag_nwifi_to_8023(struct dp_soc *soc,
qdf_nbuf_t nbuf, uint16_t hdrsize)
{ {
struct llc_snap_hdr_t *llchdr; struct llc_snap_hdr_t *llchdr;
struct ethernet_hdr_t *eth_hdr; struct ethernet_hdr_t *eth_hdr;
@@ -930,7 +934,8 @@ dp_rx_defrag_nwifi_to_8023(qdf_nbuf_t nbuf, uint16_t hdrsize)
eth_hdr = (struct ethernet_hdr_t *)(qdf_nbuf_data(nbuf)); eth_hdr = (struct ethernet_hdr_t *)(qdf_nbuf_data(nbuf));
if (hal_rx_get_mpdu_frame_control_valid(rx_desc_info)) if (hal_rx_get_mpdu_frame_control_valid(soc->hal_soc,
rx_desc_info))
fc = hal_rx_get_frame_ctrl_field(rx_desc_info); fc = hal_rx_get_frame_ctrl_field(rx_desc_info);
dp_debug("%s: frame control type: 0x%x", __func__, fc); dp_debug("%s: frame control type: 0x%x", __func__, fc);
@@ -1309,7 +1314,7 @@ static QDF_STATUS dp_rx_defrag(struct dp_peer *peer, unsigned tid,
} }
/* Convert the header to 802.3 header */ /* Convert the header to 802.3 header */
dp_rx_defrag_nwifi_to_8023(frag_list_head, hdr_space); dp_rx_defrag_nwifi_to_8023(soc, frag_list_head, hdr_space);
dp_rx_construct_fraglist(peer, frag_list_head, hdr_space); dp_rx_construct_fraglist(peer, frag_list_head, hdr_space);
return QDF_STATUS_SUCCESS; return QDF_STATUS_SUCCESS;
@@ -1453,7 +1458,8 @@ dp_rx_defrag_store_fragment(struct dp_soc *soc,
} }
mpdu_frame_control_valid = mpdu_frame_control_valid =
hal_rx_get_mpdu_frame_control_valid(rx_desc->rx_buf_start); hal_rx_get_mpdu_frame_control_valid(soc->hal_soc,
rx_desc->rx_buf_start);
/* Invalid frame control field */ /* Invalid frame control field */
if (!mpdu_frame_control_valid) { if (!mpdu_frame_control_valid) {

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@@ -395,6 +395,7 @@ struct hal_hw_txrx_ops {
uint32_t (*hal_rx_mpdu_start_sw_peer_id_get)(uint8_t *buf); uint32_t (*hal_rx_mpdu_start_sw_peer_id_get)(uint8_t *buf);
uint32_t (*hal_rx_mpdu_get_to_ds)(uint8_t *buf); uint32_t (*hal_rx_mpdu_get_to_ds)(uint8_t *buf);
uint32_t (*hal_rx_mpdu_get_fr_ds)(uint8_t *buf); uint32_t (*hal_rx_mpdu_get_fr_ds)(uint8_t *buf);
uint8_t (*hal_rx_get_mpdu_frame_control_valid)(uint8_t *buf);
}; };
/** /**

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@@ -2822,28 +2822,20 @@ uint8_t hal_rx_get_mpdu_sequence_control_valid(uint8_t *buf)
return seq_ctrl_valid; return seq_ctrl_valid;
} }
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
/* /*
* hal_rx_get_mpdu_frame_control_valid(): Retrieves mpdu frame control valid * hal_rx_get_mpdu_frame_control_valid(): Retrieves mpdu frame control valid
* * @hal_soc_hdl: hal soc handle
* @nbuf: Network buffer * @nbuf: Network buffer
*
* Returns: value of frame control valid field * Returns: value of frame control valid field
*/ */
static inline static inline
uint8_t hal_rx_get_mpdu_frame_control_valid(uint8_t *buf) uint8_t hal_rx_get_mpdu_frame_control_valid(hal_soc_handle_t hal_soc_hdl,
uint8_t *buf)
{ {
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
uint8_t frm_ctrl_valid = 0;
frm_ctrl_valid = return hal_soc->ops->hal_rx_get_mpdu_frame_control_valid(buf);
HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
return frm_ctrl_valid;
} }
/** /**

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@@ -378,6 +378,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_6290(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info); return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
} }
/*
* hal_rx_get_mpdu_frame_control_valid_6290(): Retrieves mpdu frame
* control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_6290(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
hal_srng_dst_hw_init_generic, hal_srng_dst_hw_init_generic,
@@ -434,6 +449,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_6290, hal_rx_mpdu_start_sw_peer_id_get_6290,
hal_rx_mpdu_get_to_ds_6290, hal_rx_mpdu_get_to_ds_6290,
hal_rx_mpdu_get_fr_ds_6290, hal_rx_mpdu_get_fr_ds_6290,
hal_rx_get_mpdu_frame_control_valid_6290,
}; };
struct hal_hw_srng_config hw_srng_table_6290[] = { struct hal_hw_srng_config hw_srng_table_6290[] = {

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@@ -137,6 +137,12 @@
RX_MPDU_INFO_2_FR_DS_MASK, \ RX_MPDU_INFO_2_FR_DS_MASK, \
RX_MPDU_INFO_2_FR_DS_LSB)) RX_MPDU_INFO_2_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
#if defined(QCA_WIFI_QCA6290_11AX) #if defined(QCA_WIFI_QCA6290_11AX)
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\ #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\

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@@ -377,6 +377,20 @@ static uint32_t hal_rx_mpdu_get_fr_ds_6390(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info); return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
} }
/*
* hal_rx_get_mpdu_frame_control_valid_6390(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_6390(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
hal_srng_dst_hw_init_generic, hal_srng_dst_hw_init_generic,
@@ -433,6 +447,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_6390, hal_rx_mpdu_start_sw_peer_id_get_6390,
hal_rx_mpdu_get_to_ds_6390, hal_rx_mpdu_get_to_ds_6390,
hal_rx_mpdu_get_fr_ds_6390, hal_rx_mpdu_get_fr_ds_6390,
hal_rx_get_mpdu_frame_control_valid_6390,
}; };
struct hal_hw_srng_config hw_srng_table_6390[] = { struct hal_hw_srng_config hw_srng_table_6390[] = {

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@@ -137,6 +137,12 @@
RX_MPDU_INFO_2_FR_DS_MASK, \ RX_MPDU_INFO_2_FR_DS_MASK, \
RX_MPDU_INFO_2_FR_DS_LSB)) RX_MPDU_INFO_2_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\ #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \ RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \

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@@ -283,6 +283,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_6490(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info); return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
} }
/*
* hal_rx_get_mpdu_frame_control_valid_6490(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_6490(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
/* rx */ /* rx */
hal_rx_get_rx_fragment_number_6490, hal_rx_get_rx_fragment_number_6490,
@@ -299,4 +314,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_6490, hal_rx_mpdu_start_sw_peer_id_get_6490,
hal_rx_mpdu_get_to_ds_6490, hal_rx_mpdu_get_to_ds_6490,
hal_rx_mpdu_get_fr_ds_6490, hal_rx_mpdu_get_fr_ds_6490,
hal_rx_get_mpdu_frame_control_valid_6490,
}; };

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@@ -117,3 +117,9 @@
RX_MPDU_INFO_11_FR_DS_OFFSET)), \ RX_MPDU_INFO_11_FR_DS_OFFSET)), \
RX_MPDU_INFO_11_FR_DS_MASK, \ RX_MPDU_INFO_11_FR_DS_MASK, \
RX_MPDU_INFO_11_FR_DS_LSB)) RX_MPDU_INFO_11_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_LSB))

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@@ -373,6 +373,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_8074v1(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info); return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
} }
/*
* hal_rx_get_mpdu_frame_control_valid_8074v1(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_8074v1(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -430,6 +445,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_8074v1, hal_rx_mpdu_start_sw_peer_id_get_8074v1,
hal_rx_mpdu_get_to_ds_8074v1, hal_rx_mpdu_get_to_ds_8074v1,
hal_rx_mpdu_get_fr_ds_8074v1, hal_rx_mpdu_get_fr_ds_8074v1,
hal_rx_get_mpdu_frame_control_valid_8074v1,
}; };
struct hal_hw_srng_config hw_srng_table_8074[] = { struct hal_hw_srng_config hw_srng_table_8074[] = {

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@@ -125,6 +125,12 @@
RX_MPDU_INFO_2_FR_DS_OFFSET)), \ RX_MPDU_INFO_2_FR_DS_OFFSET)), \
RX_MPDU_INFO_2_FR_DS_MASK, \ RX_MPDU_INFO_2_FR_DS_MASK, \
RX_MPDU_INFO_2_FR_DS_LSB)) RX_MPDU_INFO_2_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
/* /*
* hal_rx_msdu_start_nss_get_8074(): API to get the NSS * hal_rx_msdu_start_nss_get_8074(): API to get the NSS
* Interval from rx_msdu_start * Interval from rx_msdu_start

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@@ -371,6 +371,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_8074v2(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info); return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
} }
/*
* hal_rx_get_mpdu_frame_control_valid_8074v2(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_8074v2(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -428,6 +443,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_8074v2, hal_rx_mpdu_start_sw_peer_id_get_8074v2,
hal_rx_mpdu_get_to_ds_8074v2, hal_rx_mpdu_get_to_ds_8074v2,
hal_rx_mpdu_get_fr_ds_8074v2, hal_rx_mpdu_get_fr_ds_8074v2,
hal_rx_get_mpdu_frame_control_valid_8074v2,
}; };
struct hal_hw_srng_config hw_srng_table_8074v2[] = { struct hal_hw_srng_config hw_srng_table_8074v2[] = {

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@@ -134,6 +134,12 @@
RX_MPDU_INFO_2_FR_DS_OFFSET)), \ RX_MPDU_INFO_2_FR_DS_OFFSET)), \
RX_MPDU_INFO_2_FR_DS_MASK, \ RX_MPDU_INFO_2_FR_DS_MASK, \
RX_MPDU_INFO_2_FR_DS_LSB)) RX_MPDU_INFO_2_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
/* /*
* hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS * hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS
* Interval from rx_msdu_start * Interval from rx_msdu_start

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@@ -381,6 +381,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_9000(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info); return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
} }
/*
* hal_rx_get_mpdu_frame_control_valid_9000(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_9000(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -438,6 +453,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_9000, hal_rx_mpdu_start_sw_peer_id_get_9000,
hal_rx_mpdu_get_to_ds_9000, hal_rx_mpdu_get_to_ds_9000,
hal_rx_mpdu_get_fr_ds_9000, hal_rx_mpdu_get_fr_ds_9000,
hal_rx_get_mpdu_frame_control_valid_9000,
}; };
struct hal_hw_srng_config hw_srng_table_9000[] = { struct hal_hw_srng_config hw_srng_table_9000[] = {