qcacmn: Add hal_rx_get_mpdu_frame_control_valid API

Implement hal_rx_get_mpdu_frame_control_valid API
based on the chipset as the macro to retrieve
frame control valid value is chipset dependent.

Change-Id: I49d16ae44b2e9567ff746d2088058f0c1025ea40
CRs-Fixed: 2522133
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-09-21 13:31:30 -07:00
committed by nshrivas
父節點 1e3a479fdf
當前提交 25ba7b8c4f
共有 14 個文件被更改,包括 143 次插入19 次删除

查看文件

@@ -395,6 +395,7 @@ struct hal_hw_txrx_ops {
uint32_t (*hal_rx_mpdu_start_sw_peer_id_get)(uint8_t *buf);
uint32_t (*hal_rx_mpdu_get_to_ds)(uint8_t *buf);
uint32_t (*hal_rx_mpdu_get_fr_ds)(uint8_t *buf);
uint8_t (*hal_rx_get_mpdu_frame_control_valid)(uint8_t *buf);
};
/**

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@@ -2822,28 +2822,20 @@ uint8_t hal_rx_get_mpdu_sequence_control_valid(uint8_t *buf)
return seq_ctrl_valid;
}
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
/*
* hal_rx_get_mpdu_frame_control_valid(): Retrieves mpdu frame control valid
*
* @hal_soc_hdl: hal soc handle
* @nbuf: Network buffer
*
* Returns: value of frame control valid field
*/
static inline
uint8_t hal_rx_get_mpdu_frame_control_valid(uint8_t *buf)
uint8_t hal_rx_get_mpdu_frame_control_valid(hal_soc_handle_t hal_soc_hdl,
uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
uint8_t frm_ctrl_valid = 0;
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
frm_ctrl_valid =
HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
return frm_ctrl_valid;
return hal_soc->ops->hal_rx_get_mpdu_frame_control_valid(buf);
}
/**

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@@ -378,6 +378,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_6290(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
}
/*
* hal_rx_get_mpdu_frame_control_valid_6290(): Retrieves mpdu frame
* control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_6290(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
/* init and setup */
hal_srng_dst_hw_init_generic,
@@ -434,6 +449,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_6290,
hal_rx_mpdu_get_to_ds_6290,
hal_rx_mpdu_get_fr_ds_6290,
hal_rx_get_mpdu_frame_control_valid_6290,
};
struct hal_hw_srng_config hw_srng_table_6290[] = {

查看文件

@@ -137,6 +137,12 @@
RX_MPDU_INFO_2_FR_DS_MASK, \
RX_MPDU_INFO_2_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
#if defined(QCA_WIFI_QCA6290_11AX)
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\

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@@ -377,6 +377,20 @@ static uint32_t hal_rx_mpdu_get_fr_ds_6390(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
}
/*
* hal_rx_get_mpdu_frame_control_valid_6390(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_6390(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
/* init and setup */
hal_srng_dst_hw_init_generic,
@@ -433,6 +447,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_6390,
hal_rx_mpdu_get_to_ds_6390,
hal_rx_mpdu_get_fr_ds_6390,
hal_rx_get_mpdu_frame_control_valid_6390,
};
struct hal_hw_srng_config hw_srng_table_6390[] = {

查看文件

@@ -137,6 +137,12 @@
RX_MPDU_INFO_2_FR_DS_MASK, \
RX_MPDU_INFO_2_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \

查看文件

@@ -283,6 +283,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_6490(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
}
/*
* hal_rx_get_mpdu_frame_control_valid_6490(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_6490(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
/* rx */
hal_rx_get_rx_fragment_number_6490,
@@ -299,4 +314,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_6490,
hal_rx_mpdu_get_to_ds_6490,
hal_rx_mpdu_get_fr_ds_6490,
hal_rx_get_mpdu_frame_control_valid_6490,
};

查看文件

@@ -117,3 +117,9 @@
RX_MPDU_INFO_11_FR_DS_OFFSET)), \
RX_MPDU_INFO_11_FR_DS_MASK, \
RX_MPDU_INFO_11_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_LSB))

查看文件

@@ -373,6 +373,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_8074v1(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
}
/*
* hal_rx_get_mpdu_frame_control_valid_8074v1(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_8074v1(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
/* init and setup */
@@ -430,6 +445,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_8074v1,
hal_rx_mpdu_get_to_ds_8074v1,
hal_rx_mpdu_get_fr_ds_8074v1,
hal_rx_get_mpdu_frame_control_valid_8074v1,
};
struct hal_hw_srng_config hw_srng_table_8074[] = {

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@@ -125,6 +125,12 @@
RX_MPDU_INFO_2_FR_DS_OFFSET)), \
RX_MPDU_INFO_2_FR_DS_MASK, \
RX_MPDU_INFO_2_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
/*
* hal_rx_msdu_start_nss_get_8074(): API to get the NSS
* Interval from rx_msdu_start

查看文件

@@ -371,6 +371,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_8074v2(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
}
/*
* hal_rx_get_mpdu_frame_control_valid_8074v2(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_8074v2(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
/* init and setup */
@@ -428,6 +443,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_8074v2,
hal_rx_mpdu_get_to_ds_8074v2,
hal_rx_mpdu_get_fr_ds_8074v2,
hal_rx_get_mpdu_frame_control_valid_8074v2,
};
struct hal_hw_srng_config hw_srng_table_8074v2[] = {

查看文件

@@ -134,6 +134,12 @@
RX_MPDU_INFO_2_FR_DS_OFFSET)), \
RX_MPDU_INFO_2_FR_DS_MASK, \
RX_MPDU_INFO_2_FR_DS_LSB))
#define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
/*
* hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS
* Interval from rx_msdu_start

查看文件

@@ -381,6 +381,21 @@ static uint32_t hal_rx_mpdu_get_fr_ds_9000(uint8_t *buf)
return HAL_RX_MPDU_GET_FROMDS(mpdu_info);
}
/*
* hal_rx_get_mpdu_frame_control_valid_9000(): Retrieves mpdu
* frame control valid
*
* @nbuf: Network buffer
* Returns: value of frame control valid field
*/
static uint8_t hal_rx_get_mpdu_frame_control_valid_9000(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
}
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
/* init and setup */
@@ -438,6 +453,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
hal_rx_mpdu_start_sw_peer_id_get_9000,
hal_rx_mpdu_get_to_ds_9000,
hal_rx_mpdu_get_fr_ds_9000,
hal_rx_get_mpdu_frame_control_valid_9000,
};
struct hal_hw_srng_config hw_srng_table_9000[] = {