qcacmn: Add HAL layer changes for full monitor mode

Add HAL layer changes for full monitor mode.

Define HAL API and Data structures to read sw_monitor_ring
descriptor.

CRs-Fixed: 2630982
Change-Id: I015fa106d9da74222bef092d50e96fc70a117a4a
This commit is contained in:
Amir
2020-03-14 14:16:51 +05:30
committed by nshrivas
parent 4e5b760643
commit 252b67e048
9 changed files with 143 additions and 25 deletions

View File

@@ -21,6 +21,9 @@
#include "target_type.h"
#include "wcss_version.h"
#include "qdf_module.h"
#include "hal_9000_rx.h"
#include "hal_api_mon.h"
#define UNIFIED_RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_OFFSET \
RXPCU_PPDU_END_INFO_9_RX_PPDU_DURATION_OFFSET
#define UNIFIED_RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_MASK \
@@ -116,6 +119,60 @@
#include <hal_generic_api.h>
#include <hal_wbm.h>
/**
* hal_rx_sw_mon_desc_info_get_9000(): API to read the
* sw monitor ring descriptor
*
* @rxdma_dst_ring_desc: sw monitor ring descriptor
* @desc_info_buf: Descriptor info buffer to which
* sw monitor ring descriptor is populated to
*
* Return: void
*/
static void
hal_rx_sw_mon_desc_info_get_9000(hal_ring_desc_t rxdma_dst_ring_desc,
hal_rx_mon_desc_info_t desc_info_buf)
{
struct sw_monitor_ring *sw_mon_ring =
(struct sw_monitor_ring *)rxdma_dst_ring_desc;
struct buffer_addr_info *buf_addr_info;
uint32_t *mpdu_info;
uint32_t loop_cnt;
struct hal_rx_mon_desc_info *desc_info;
desc_info = (struct hal_rx_mon_desc_info *)desc_info_buf;
mpdu_info = (uint32_t *)&sw_mon_ring->
reo_level_mpdu_frame_info.rx_mpdu_desc_info_details;
loop_cnt = HAL_RX_GET(sw_mon_ring, SW_MONITOR_RING_7, LOOPING_COUNT);
desc_info->msdu_count = HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info);
/* Get msdu link descriptor buf_addr_info */
buf_addr_info = &sw_mon_ring->
reo_level_mpdu_frame_info.msdu_link_desc_addr_info;
desc_info->link_desc.paddr = HAL_RX_BUFFER_ADDR_31_0_GET(buf_addr_info)
| ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
buf_addr_info)) << 32);
desc_info->link_desc.sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info);
buf_addr_info = &sw_mon_ring->status_buff_addr_info;
desc_info->status_buf.paddr = HAL_RX_BUFFER_ADDR_31_0_GET(buf_addr_info)
| ((uint64_t)
(HAL_RX_BUFFER_ADDR_39_32_GET(buf_addr_info)) << 32);
desc_info->status_buf.sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info);
desc_info->end_of_ppdu = HAL_RX_GET(sw_mon_ring,
SW_MONITOR_RING_6,
END_OF_PPDU);
desc_info->status_buf_count = HAL_RX_GET(sw_mon_ring,
SW_MONITOR_RING_6,
STATUS_BUF_COUNT);
desc_info->rxdma_push_reason = HAL_RX_GET(sw_mon_ring,
SW_MONITOR_RING_6,
RXDMA_PUSH_REASON);
desc_info->ppdu_id = HAL_RX_GET(sw_mon_ring,
SW_MONITOR_RING_7,
PHY_PPDU_ID);
}
/**
* hal_rx_msdu_start_nss_get_9000(): API to get the NSS
* Interval from rx_msdu_start
@@ -1490,6 +1547,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
NULL,
NULL,
hal_rx_mpdu_start_tlv_tag_valid_9000,
hal_rx_sw_mon_desc_info_get_9000,
};
struct hal_hw_srng_config hw_srng_table_9000[] = {
@@ -1852,7 +1910,7 @@ struct hal_hw_srng_config hw_srng_table_9000[] = {
{ /* RXDMA_MONITOR_DST */
.start_ring_id = HAL_SRNG_WMAC1_RXDMA2SW1,
.max_rings = 1,
.entry_size = sizeof(struct reo_entrance_ring) >> 2,
.entry_size = sizeof(struct sw_monitor_ring) >> 2,
.lmac_ring = TRUE,
.ring_dir = HAL_SRNG_DST_RING,
/* reg_start is not set because LMAC rings are not accessed