qcacmn: Get Phy address for HW CC exception case

Even if HW cookie conversion is enabled on KIWI, there is some
case HW cookie conversion might not be done by HW, check the cookie
conversion done bit and get Phy Address accordingly.

Change-Id: I4ee7ed9776086812774637f07da1e4504898c3c4
CRs-Fixed: 3153433
This commit is contained in:
Jinwei Chen
2022-03-21 01:52:04 -07:00
committed by Madan Koyyalamudi
parent df666b7116
commit 247d541b4f
3 changed files with 41 additions and 17 deletions

View File

@@ -2566,7 +2566,8 @@ static inline void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
/**
* dp_rx_wbm_desc_nbuf_sanity_check - Add sanity check to for WBM rx_desc paddr
* corruption
*
* @soc: core txrx main context
* @hal_ring_hdl: opaque pointer to the HAL Rx Error Ring
* @ring_desc: REO ring descriptor
* @rx_desc: Rx descriptor
*
@@ -2574,6 +2575,7 @@ static inline void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
*/
static
QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
hal_ring_handle_t hal_ring_hdl,
hal_ring_desc_t ring_desc,
struct dp_rx_desc *rx_desc)
{
@@ -2584,12 +2586,15 @@ QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
return QDF_STATUS_SUCCESS;
hal_srng_dump_ring_desc(soc->hal_soc, hal_ring_hdl, ring_desc);
return QDF_STATUS_E_FAILURE;
}
#else
static
QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
hal_ring_handle_t hal_ring_hdl,
hal_ring_desc_t ring_desc,
struct dp_rx_desc *rx_desc)
{
@@ -2710,11 +2715,12 @@ dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
nbuf = rx_desc->nbuf;
status = dp_rx_wbm_desc_nbuf_sanity_check(soc, ring_desc,
rx_desc);
if (qdf_likely(QDF_IS_STATUS_ERROR(status))) {
status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
ring_desc, rx_desc);
if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
dp_info_rl("Rx error Nbuf sanity check failure!");
dp_info_rl("Rx error Nbuf %pk sanity check failure!",
nbuf);
rx_desc->in_err_state = 1;
rx_desc->unmapped = 1;
rx_bufs_reaped[rx_desc->pool_id]++;

View File

@@ -999,19 +999,20 @@ uint8_t hal_get_idle_link_bm_id_be(uint8_t chip_id)
return (WBM_IDLE_DESC_LIST + chip_id);
}
#ifndef DP_FEATURE_HW_COOKIE_CONVERSION
#ifdef DP_FEATURE_HW_COOKIE_CONVERSION
#ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
static inline void
hal_rx_wbm_rel_buf_paddr_get_be(hal_ring_desc_t rx_desc,
struct hal_buf_info *buf_info)
{
struct wbm_release_ring_rx *wbm_rel_ring =
(struct wbm_release_ring_rx *)rx_desc;
if (hal_rx_wbm_get_cookie_convert_done(rx_desc))
buf_info->paddr =
(HAL_RX_WBM_BUF_ADDR_31_0_GET(wbm_rel_ring) |
((uint64_t)(HAL_RX_WBM_BUF_ADDR_39_32_GET(wbm_rel_ring)) << 32));
buf_info->sw_cookie = HAL_RX_WBM_BUF_COOKIE_GET(wbm_rel_ring);
(HAL_RX_WBM_COMP_BUF_ADDR_31_0_GET(rx_desc) |
((uint64_t)(HAL_RX_WBM_COMP_BUF_ADDR_39_32_GET(rx_desc)) << 32));
else
buf_info->paddr =
(HAL_RX_WBM_BUF_ADDR_31_0_GET(rx_desc) |
((uint64_t)(HAL_RX_WBM_BUF_ADDR_39_32_GET(rx_desc)) << 32));
}
#else
static inline void
@@ -1019,9 +1020,18 @@ hal_rx_wbm_rel_buf_paddr_get_be(hal_ring_desc_t rx_desc,
struct hal_buf_info *buf_info)
{
buf_info->paddr =
(HAL_RX_GET(rx_desc, WBM2SW_COMPLETION_RING_RX, BUFFER_PHYS_ADDR_31_0) |
(uint64_t)HAL_RX_GET(rx_desc, WBM2SW_COMPLETION_RING_RX,
BUFFER_PHYS_ADDR_39_32) << 32);
(HAL_RX_WBM_COMP_BUF_ADDR_31_0_GET(rx_desc) |
((uint64_t)(HAL_RX_WBM_COMP_BUF_ADDR_39_32_GET(rx_desc)) << 32));
}
#endif
#else /* !DP_FEATURE_HW_COOKIE_CONVERSION */
static inline void
hal_rx_wbm_rel_buf_paddr_get_be(hal_ring_desc_t rx_desc,
struct hal_buf_info *buf_info)
{
buf_info->paddr =
(HAL_RX_WBM_BUF_ADDR_31_0_GET(rx_desc) |
((uint64_t)(HAL_RX_WBM_BUF_ADDR_39_32_GET(rx_desc)) << 32));
}
#endif

View File

@@ -372,6 +372,14 @@ static inline uintptr_t hal_rx_wbm_get_desc_va(void *hal_desc)
HAL_RX_BUF_COOKIE_GET(&((struct wbm_release_ring_rx *) \
wbm_desc)->released_buff_or_desc_addr_info)
#define HAL_RX_WBM_COMP_BUF_ADDR_31_0_GET(wbm_desc) \
HAL_RX_GET(wbm_desc, WBM2SW_COMPLETION_RING_RX, BUFFER_PHYS_ADDR_31_0)
#define HAL_RX_WBM_COMP_BUF_ADDR_39_32_GET(wbm_desc) \
HAL_RX_GET(wbm_desc, WBM2SW_COMPLETION_RING_RX, BUFFER_PHYS_ADDR_39_32)
#define HAL_RX_WBM_COMP_BUF_COOKIE_GET(wbm_desc) \
HAL_RX_GET(wbm_desc, WBM2SW_COMPLETION_RING_RX, SW_BUFFER_COOKIE)
/**
* hal_rx_msdu_flags_get_be() - Get msdu flags from ring desc
* @msdu_desc_info_hdl: msdu desc info handle