qcacmn: Get Phy address for HW CC exception case
Even if HW cookie conversion is enabled on KIWI, there is some case HW cookie conversion might not be done by HW, check the cookie conversion done bit and get Phy Address accordingly. Change-Id: I4ee7ed9776086812774637f07da1e4504898c3c4 CRs-Fixed: 3153433
This commit is contained in:

committed by
Madan Koyyalamudi

parent
df666b7116
commit
247d541b4f
@@ -2566,7 +2566,8 @@ static inline void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
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/**
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* dp_rx_wbm_desc_nbuf_sanity_check - Add sanity check to for WBM rx_desc paddr
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* corruption
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*
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* @soc: core txrx main context
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* @hal_ring_hdl: opaque pointer to the HAL Rx Error Ring
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* @ring_desc: REO ring descriptor
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* @rx_desc: Rx descriptor
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*
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@@ -2574,6 +2575,7 @@ static inline void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
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*/
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static
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QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
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hal_ring_handle_t hal_ring_hdl,
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hal_ring_desc_t ring_desc,
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struct dp_rx_desc *rx_desc)
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{
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@@ -2584,12 +2586,15 @@ QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
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if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
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return QDF_STATUS_SUCCESS;
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hal_srng_dump_ring_desc(soc->hal_soc, hal_ring_hdl, ring_desc);
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return QDF_STATUS_E_FAILURE;
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}
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#else
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static
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QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
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hal_ring_handle_t hal_ring_hdl,
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hal_ring_desc_t ring_desc,
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struct dp_rx_desc *rx_desc)
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{
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@@ -2710,11 +2715,12 @@ dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
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hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
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nbuf = rx_desc->nbuf;
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status = dp_rx_wbm_desc_nbuf_sanity_check(soc, ring_desc,
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rx_desc);
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if (qdf_likely(QDF_IS_STATUS_ERROR(status))) {
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status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
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ring_desc, rx_desc);
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if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
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DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
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dp_info_rl("Rx error Nbuf sanity check failure!");
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dp_info_rl("Rx error Nbuf %pk sanity check failure!",
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nbuf);
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rx_desc->in_err_state = 1;
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rx_desc->unmapped = 1;
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rx_bufs_reaped[rx_desc->pool_id]++;
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@@ -999,19 +999,20 @@ uint8_t hal_get_idle_link_bm_id_be(uint8_t chip_id)
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return (WBM_IDLE_DESC_LIST + chip_id);
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}
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#ifndef DP_FEATURE_HW_COOKIE_CONVERSION
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#ifdef DP_FEATURE_HW_COOKIE_CONVERSION
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#ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
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static inline void
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hal_rx_wbm_rel_buf_paddr_get_be(hal_ring_desc_t rx_desc,
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struct hal_buf_info *buf_info)
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{
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struct wbm_release_ring_rx *wbm_rel_ring =
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(struct wbm_release_ring_rx *)rx_desc;
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if (hal_rx_wbm_get_cookie_convert_done(rx_desc))
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buf_info->paddr =
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(HAL_RX_WBM_BUF_ADDR_31_0_GET(wbm_rel_ring) |
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((uint64_t)(HAL_RX_WBM_BUF_ADDR_39_32_GET(wbm_rel_ring)) << 32));
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buf_info->sw_cookie = HAL_RX_WBM_BUF_COOKIE_GET(wbm_rel_ring);
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(HAL_RX_WBM_COMP_BUF_ADDR_31_0_GET(rx_desc) |
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((uint64_t)(HAL_RX_WBM_COMP_BUF_ADDR_39_32_GET(rx_desc)) << 32));
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else
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buf_info->paddr =
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(HAL_RX_WBM_BUF_ADDR_31_0_GET(rx_desc) |
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((uint64_t)(HAL_RX_WBM_BUF_ADDR_39_32_GET(rx_desc)) << 32));
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}
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#else
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static inline void
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@@ -1019,9 +1020,18 @@ hal_rx_wbm_rel_buf_paddr_get_be(hal_ring_desc_t rx_desc,
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struct hal_buf_info *buf_info)
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{
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buf_info->paddr =
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(HAL_RX_GET(rx_desc, WBM2SW_COMPLETION_RING_RX, BUFFER_PHYS_ADDR_31_0) |
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(uint64_t)HAL_RX_GET(rx_desc, WBM2SW_COMPLETION_RING_RX,
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BUFFER_PHYS_ADDR_39_32) << 32);
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(HAL_RX_WBM_COMP_BUF_ADDR_31_0_GET(rx_desc) |
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((uint64_t)(HAL_RX_WBM_COMP_BUF_ADDR_39_32_GET(rx_desc)) << 32));
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}
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#endif
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#else /* !DP_FEATURE_HW_COOKIE_CONVERSION */
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static inline void
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hal_rx_wbm_rel_buf_paddr_get_be(hal_ring_desc_t rx_desc,
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struct hal_buf_info *buf_info)
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{
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buf_info->paddr =
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(HAL_RX_WBM_BUF_ADDR_31_0_GET(rx_desc) |
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((uint64_t)(HAL_RX_WBM_BUF_ADDR_39_32_GET(rx_desc)) << 32));
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}
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#endif
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@@ -372,6 +372,14 @@ static inline uintptr_t hal_rx_wbm_get_desc_va(void *hal_desc)
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HAL_RX_BUF_COOKIE_GET(&((struct wbm_release_ring_rx *) \
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wbm_desc)->released_buff_or_desc_addr_info)
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#define HAL_RX_WBM_COMP_BUF_ADDR_31_0_GET(wbm_desc) \
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HAL_RX_GET(wbm_desc, WBM2SW_COMPLETION_RING_RX, BUFFER_PHYS_ADDR_31_0)
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#define HAL_RX_WBM_COMP_BUF_ADDR_39_32_GET(wbm_desc) \
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HAL_RX_GET(wbm_desc, WBM2SW_COMPLETION_RING_RX, BUFFER_PHYS_ADDR_39_32)
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#define HAL_RX_WBM_COMP_BUF_COOKIE_GET(wbm_desc) \
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HAL_RX_GET(wbm_desc, WBM2SW_COMPLETION_RING_RX, SW_BUFFER_COOKIE)
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/**
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* hal_rx_msdu_flags_get_be() - Get msdu flags from ring desc
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* @msdu_desc_info_hdl: msdu desc info handle
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