qcacmn: Add more HAL APIs in hal_api_mon.h

Add the following macros:
1. HAL_REO_CONFIG
2. HAL_RX_MSDU_DESC_INFO_GET
3. HAL_RX_LINK_DESC_MSDU0_PTR

Add the relevant function pointers to
retrieve the descriptor info from the
above mentioned macros based on a
given chipset.

Change-Id: If44ae3d91397f1b1b0c36a49ce56a2c5e719434e
CRs-Fixed: 2522133

hal/wifi3.0/hal_api.h

@@ -1288,21 +1288,6 @@ uint32_t hal_idle_list_num_scatter_bufs(hal_soc_handle_t hal_soc_hdl,
 	return num_scatter_bufs;
 }
 
-/* REO parameters to be passed to hal_reo_setup */
-struct hal_reo_params {
-	/** rx hash steering enabled or disabled */
-	bool rx_hash_enabled;
-	/** reo remap 1 register */
-	uint32_t remap1;
-	/** reo remap 2 register */
-	uint32_t remap2;
-	/** fragment destination ring */
-	uint8_t frag_dst_ring;
-	/** padding */
-	uint8_t padding[3];
-};
-
-
 enum hal_pn_type {
 	HAL_PN_NONE,
 	HAL_PN_WPA,

hal/wifi3.0/hal_generic_api.h

@@ -18,38 +18,6 @@
 #ifndef _HAL_GENERIC_API_H_
 #define _HAL_GENERIC_API_H_
 
-#define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
-	((struct rx_msdu_desc_info *) \
-	_OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
-UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
-/**
- * hal_rx_msdu_desc_info_get_ptr_generic() - Get msdu desc info ptr
- * @msdu_details_ptr - Pointer to msdu_details_ptr
- * Return - Pointer to rx_msdu_desc_info structure.
- *
- */
-static void *hal_rx_msdu_desc_info_get_ptr_generic(void *msdu_details_ptr)
-{
-	return HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr);
-}
-
-
-#define HAL_RX_LINK_DESC_MSDU0_PTR(link_desc)   \
-	((struct rx_msdu_details *) \
-	 _OFFSET_TO_BYTE_PTR((link_desc),\
-	UNIFIED_RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET))
-/**
- * hal_rx_link_desc_msdu0_ptr_generic - Get pointer to rx_msdu details
- * @link_desc - Pointer to link desc
- * Return - Pointer to rx_msdu_details structure
- *
- */
-
-static void *hal_rx_link_desc_msdu0_ptr_generic(void *link_desc)
-{
-	return HAL_RX_LINK_DESC_MSDU0_PTR(link_desc);
-}
-
 /**
  * hal_tx_comp_get_status() - TQM Release reason
  * @hal_desc: completion ring Tx status
@@ -1491,18 +1459,7 @@ static void hal_reo_setup_generic(struct hal_soc *soc,
 	reg_val = HAL_REG_READ(soc, HWIO_REO_R0_GENERAL_ENABLE_ADDR(
 		SEQ_WCSS_UMAC_REO_REG_OFFSET));
 
-	reg_val &= ~(HWIO_REO_R0_GENERAL_ENABLE_FRAGMENT_DEST_RING_BMSK |
-		HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK |
-		HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK);
-
-	reg_val |= HAL_SM(HWIO_REO_R0_GENERAL_ENABLE,
-		FRAGMENT_DEST_RING, reo_params->frag_dst_ring) |
-		HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, AGING_LIST_ENABLE, 1) |
-		HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, AGING_FLUSH_ENABLE, 1);
-
-	HAL_REG_WRITE(soc, HWIO_REO_R0_GENERAL_ENABLE_ADDR(
-		SEQ_WCSS_UMAC_REO_REG_OFFSET), reg_val);
-
+	hal_reo_config(soc, reg_val, reo_params);
 	/* Other ring enable bits and REO_ENABLE will be set by FW */
 
 	/* TODO: Setup destination ring mapping if enabled */

hal/wifi3.0/hal_internal.h

@@ -312,6 +312,20 @@ struct hal_hw_srng_config {
 
 #define MAX_SHADOW_REGISTERS 36
 
+/* REO parameters to be passed to hal_reo_setup */
+struct hal_reo_params {
+	/** rx hash steering enabled or disabled */
+	bool rx_hash_enabled;
+	/** reo remap 1 register */
+	uint32_t remap1;
+	/** reo remap 2 register */
+	uint32_t remap2;
+	/** fragment destination ring */
+	uint8_t frag_dst_ring;
+	/** padding */
+	uint8_t padding[3];
+};
+
 struct hal_hw_txrx_ops {
 
 	/* init and setup */
@@ -420,6 +434,9 @@ struct hal_hw_txrx_ops {
 	uint8_t (*hal_rx_get_mac_addr2_valid)(uint8_t *buf);
 	uint8_t (*hal_rx_get_filter_category)(uint8_t *buf);
 	uint32_t (*hal_rx_get_ppdu_id)(uint8_t *buf);
+	void (*hal_reo_config)(struct hal_soc *soc,
+			       uint32_t reg_val,
+			       struct hal_reo_params *reo_params);
 };
 
 /**

hal/wifi3.0/hal_rx.h

@@ -19,7 +19,7 @@
 #ifndef _HAL_RX_H_
 #define _HAL_RX_H_
 
-#include <hal_internal.h>
+#include <hal_api.h>
 
 #define HAL_RX_OFFSET(block, field) block##_##field##_OFFSET
 #define HAL_RX_LSB(block, field) block##_##field##_LSB
@@ -3414,4 +3414,22 @@ uint32_t hal_rx_get_ppdu_id(hal_soc_handle_t hal_soc_hdl,
 
 	return hal_soc->ops->hal_rx_get_ppdu_id(buf);
 }
+
+/**
+ * hal_reo_config(): Set reo config parameters
+ * @soc: hal soc handle
+ * @reg_val: value to be set
+ * @reo_params: reo parameters
+ *
+ * Return: void
+ */
+static inline
+void hal_reo_config(struct hal_soc *hal_soc,
+		    uint32_t reg_val,
+		    struct hal_reo_params *reo_params)
+{
+	hal_soc->ops->hal_reo_config(hal_soc,
+				     reg_val,
+				     reo_params);
+}
 #endif /* _HAL_RX_H */

hal/wifi3.0/qca6290/hal_6290.c

@@ -809,6 +809,46 @@ hal_rx_get_ppdu_id_6290(uint8_t *buf)
 {
 	return HAL_RX_GET_PPDU_ID(buf);
 }
+
+/**
+ * hal_reo_config_6290(): Set reo config parameters
+ * @soc: hal soc handle
+ * @reg_val: value to be set
+ * @reo_params: reo parameters
+ *
+ * Return: void
+ */
+static
+void hal_reo_config_6290(struct hal_soc *soc,
+			 uint32_t reg_val,
+			 struct hal_reo_params *reo_params)
+{
+	HAL_REO_R0_CONFIG(soc, reg_val, reo_params);
+}
+
+/**
+ * hal_rx_msdu_desc_info_get_ptr_6290() - Get msdu desc info ptr
+ * @msdu_details_ptr - Pointer to msdu_details_ptr
+ *
+ * Return - Pointer to rx_msdu_desc_info structure.
+ *
+ */
+static void *hal_rx_msdu_desc_info_get_ptr_6290(void *msdu_details_ptr)
+{
+	return HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr);
+}
+
+/**
+ * hal_rx_link_desc_msdu0_ptr_6290 - Get pointer to rx_msdu details
+ * @link_desc - Pointer to link desc
+ *
+ * Return - Pointer to rx_msdu_details structure
+ *
+ */
+static void *hal_rx_link_desc_msdu0_ptr_6290(void *link_desc)
+{
+	return HAL_RX_LINK_DESC_MSDU0_PTR(link_desc);
+}
 struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
 	/* init and setup */
 	hal_srng_dst_hw_init_generic,
@@ -840,8 +880,8 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
 	hal_rx_mpdu_start_tid_get_6290,
 	hal_rx_msdu_start_reception_type_get_6290,
 	hal_rx_msdu_end_da_idx_get_6290,
-	hal_rx_msdu_desc_info_get_ptr_generic,
-	hal_rx_link_desc_msdu0_ptr_generic,
+	hal_rx_msdu_desc_info_get_ptr_6290,
+	hal_rx_link_desc_msdu0_ptr_6290,
 	hal_reo_status_get_header_6290,
 	hal_rx_status_get_tlv_info_generic,
 	hal_rx_wbm_err_info_get_generic,
@@ -885,6 +925,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
 	hal_rx_get_mac_addr2_valid_6290,
 	hal_rx_get_filter_category_6290,
 	hal_rx_get_ppdu_id_6290,
+	hal_reo_config_6290,
 };
 
 struct hal_hw_srng_config hw_srng_table_6290[] = {

hal/wifi3.0/qca6290/hal_6290_rx.h

@@ -264,6 +264,36 @@
 #define HAL_RX_GET_PPDU_ID(rx_mpdu_start)	\
 	HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_0, PHY_PPDU_ID)
 
+#define HAL_REO_R0_CONFIG(soc, reg_val, reo_params)		\
+	do { \
+		(reg_val) &= \
+			~(HWIO_REO_R0_GENERAL_ENABLE_FRAGMENT_DEST_RING_BMSK |\
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK |\
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK);\
+		(reg_val) |= \
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       FRAGMENT_DEST_RING, \
+			       (reo_params)->frag_dst_ring) | \
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_LIST_ENABLE, 1) |\
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_FLUSH_ENABLE, 1);\
+		HAL_REG_WRITE((soc), \
+			      HWIO_REO_R0_GENERAL_ENABLE_ADDR(	\
+			      SEQ_WCSS_UMAC_REO_REG_OFFSET), \
+			      (reg_val)); \
+	} while (0)
+
+#define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
+	((struct rx_msdu_desc_info *) \
+	_OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
+UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
+
+#define HAL_RX_LINK_DESC_MSDU0_PTR(link_desc)   \
+	((struct rx_msdu_details *) \
+	 _OFFSET_TO_BYTE_PTR((link_desc),\
+	UNIFIED_RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET))
+
 #if defined(QCA_WIFI_QCA6290_11AX)
 #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
 	(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\

hal/wifi3.0/qca6390/hal_6390.c

@@ -808,6 +808,44 @@ hal_rx_get_ppdu_id_6390(uint8_t *buf)
 	return HAL_RX_GET_PPDU_ID(buf);
 }
 
+/**
+ * hal_reo_config_6390(): Set reo config parameters
+ * @soc: hal soc handle
+ * @reg_val: value to be set
+ * @reo_params: reo parameters
+ *
+ * Return: void
+ */
+static
+void hal_reo_config_6390(struct hal_soc *soc,
+			 uint32_t reg_val,
+			 struct hal_reo_params *reo_params)
+{
+	HAL_REO_R0_CONFIG(soc, reg_val, reo_params);
+}
+
+/**
+ * hal_rx_msdu_desc_info_get_ptr_6390() - Get msdu desc info ptr
+ * @msdu_details_ptr - Pointer to msdu_details_ptr
+ * Return - Pointer to rx_msdu_desc_info structure.
+ *
+ */
+static void *hal_rx_msdu_desc_info_get_ptr_6390(void *msdu_details_ptr)
+{
+	return HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr);
+}
+
+/**
+ * hal_rx_link_desc_msdu0_ptr_6390 - Get pointer to rx_msdu details
+ * @link_desc - Pointer to link desc
+ * Return - Pointer to rx_msdu_details structure
+ *
+ */
+static void *hal_rx_link_desc_msdu0_ptr_6390(void *link_desc)
+{
+	return HAL_RX_LINK_DESC_MSDU0_PTR(link_desc);
+}
+
 struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
 	/* init and setup */
 	hal_srng_dst_hw_init_generic,
@@ -839,8 +877,8 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
 	hal_rx_mpdu_start_tid_get_6390,
 	hal_rx_msdu_start_reception_type_get_6390,
 	hal_rx_msdu_end_da_idx_get_6390,
-	hal_rx_msdu_desc_info_get_ptr_generic,
-	hal_rx_link_desc_msdu0_ptr_generic,
+	hal_rx_msdu_desc_info_get_ptr_6390,
+	hal_rx_link_desc_msdu0_ptr_6390,
 	hal_reo_status_get_header_6390,
 	hal_rx_status_get_tlv_info_generic,
 	hal_rx_wbm_err_info_get_generic,
@@ -884,6 +922,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
 	hal_rx_get_mac_addr2_valid_6390,
 	hal_rx_get_filter_category_6390,
 	hal_rx_get_ppdu_id_6390,
+	hal_reo_config_6390,
 };
 
 struct hal_hw_srng_config hw_srng_table_6390[] = {

hal/wifi3.0/qca6390/hal_6390_rx.h

@@ -270,6 +270,35 @@
 #define HAL_RX_GET_PPDU_ID(rx_mpdu_start)	\
 	HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_0, PHY_PPDU_ID)
 
+#define HAL_REO_R0_CONFIG(soc, reg_val, reo_params)	\
+	do { \
+		reg_val &= \
+			~(HWIO_REO_R0_GENERAL_ENABLE_FRAGMENT_DEST_RING_BMSK |\
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK | \
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK); \
+		reg_val |= \
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       FRAGMENT_DEST_RING, \
+			       (reo_params)->frag_dst_ring) |	\
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_LIST_ENABLE, 1) |\
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_FLUSH_ENABLE, 1);\
+		HAL_REG_WRITE((soc), \
+			HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
+			SEQ_WCSS_UMAC_REO_REG_OFFSET), \
+			(reg_val)); \
+	} while (0)
+
+#define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
+	((struct rx_msdu_desc_info *) \
+	_OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
+UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
+
+#define HAL_RX_LINK_DESC_MSDU0_PTR(link_desc)   \
+	((struct rx_msdu_details *) \
+	 _OFFSET_TO_BYTE_PTR((link_desc),\
+	UNIFIED_RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET))
 /*
  * hal_rx_msdu_start_nss_get_6390(): API to get the NSS
  * Interval from rx_msdu_start

hal/wifi3.0/qca6490/hal_6490.c

@@ -680,6 +680,45 @@ hal_rx_get_ppdu_id_6490(uint8_t *buf)
 	return HAL_RX_GET_PPDU_ID(buf);
 }
 
+/**
+ * hal_reo_config_6490(): Set reo config parameters
+ * @soc: hal soc handle
+ * @reg_val: value to be set
+ * @reo_params: reo parameters
+ *
+ * Return: void
+ */
+static
+void hal_reo_config_6490(struct hal_soc *soc,
+			 uint32_t reg_val,
+			 struct hal_reo_params *reo_params)
+{
+	HAL_REO_R0_CONFIG(soc, reg_val, reo_params);
+}
+
+/**
+ * hal_rx_msdu_desc_info_get_ptr_6490() - Get msdu desc info ptr
+ * @msdu_details_ptr - Pointer to msdu_details_ptr
+ *
+ * Return - Pointer to rx_msdu_desc_info structure.
+ *
+ */
+static void *hal_rx_msdu_desc_info_get_ptr_6490(void *msdu_details_ptr)
+{
+	return HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr);
+}
+
+/**
+ * hal_rx_link_desc_msdu0_ptr_6490 - Get pointer to rx_msdu details
+ * @link_desc - Pointer to link desc
+ *
+ * Return - Pointer to rx_msdu_details structure
+ *
+ */
+static void *hal_rx_link_desc_msdu0_ptr_6490(void *link_desc)
+{
+	return HAL_RX_LINK_DESC_MSDU0_PTR(link_desc);
+}
 struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
 	/* tx */
 	hal_tx_desc_set_mesh_en_6490,
@@ -718,4 +757,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
 	hal_rx_get_mac_addr2_valid_6490,
 	hal_rx_get_filter_category_6490,
 	hal_rx_get_ppdu_id_6490,
+	hal_reo_config_6490,
 };

hal/wifi3.0/qca6490/hal_6490_rx.h

@@ -244,3 +244,43 @@
 
 #define HAL_RX_GET_PPDU_ID(rx_mpdu_start)	\
 	HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_9, PHY_PPDU_ID)
+
+#define HAL_REO_R0_CONFIG(soc, reg_val, reo_params)		\
+	do { \
+		reg_val &= \
+			~(HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK |\
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK); \
+		reg_val |= \
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_LIST_ENABLE, 1) |\
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_FLUSH_ENABLE, 1);\
+		HAL_REG_WRITE((soc), \
+			      HWIO_REO_R0_GENERAL_ENABLE_ADDR(	\
+			      SEQ_WCSS_UMAC_REO_REG_OFFSET), \
+			      (reg_val));		\
+		reg_val = \
+			HAL_REG_READ((soc), \
+				     HWIO_REO_R0_MISC_CTL_ADDR(	\
+				     SEQ_WCSS_UMAC_REO_REG_OFFSET)); \
+		reg_val &= \
+			~(HWIO_REO_R0_MISC_CTL_FRAGMENT_DEST_RING_BMSK); \
+		reg_val |= \
+			HAL_SM(HWIO_REO_R0_MISC_CTL,	\
+			       FRAGMENT_DEST_RING, \
+			       (reo_params)->frag_dst_ring); \
+		HAL_REG_WRITE((soc), \
+			      HWIO_REO_R0_MISC_CTL_ADDR( \
+			      SEQ_WCSS_UMAC_REO_REG_OFFSET), \
+			      (reg_val)); \
+	} while (0)
+
+#define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
+	((struct rx_msdu_desc_info *) \
+	_OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
+RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
+
+#define HAL_RX_LINK_DESC_MSDU0_PTR(link_desc)   \
+	((struct rx_msdu_details *) \
+	 _OFFSET_TO_BYTE_PTR((link_desc),\
+	RX_MSDU_LINK_8_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET))

hal/wifi3.0/qca8074v1/hal_8074v1.c

@@ -806,6 +806,46 @@ hal_rx_get_ppdu_id_8074v1(uint8_t *buf)
 	return HAL_RX_GET_PPDU_ID(buf);
 }
 
+/**
+ * hal_reo_config_8074v1(): Set reo config parameters
+ * @soc: hal soc handle
+ * @reg_val: value to be set
+ * @reo_params: reo parameters
+ *
+ * Return: void
+ */
+static void
+hal_reo_config_8074v1(struct hal_soc *soc,
+		      uint32_t reg_val,
+		      struct hal_reo_params *reo_params)
+{
+	HAL_REO_R0_CONFIG(soc, reg_val, reo_params);
+}
+
+/**
+ * hal_rx_msdu_desc_info_get_ptr_8074v1() - Get msdu desc info ptr
+ * @msdu_details_ptr - Pointer to msdu_details_ptr
+ *
+ * Return - Pointer to rx_msdu_desc_info structure.
+ *
+ */
+static void *hal_rx_msdu_desc_info_get_ptr_8074v1(void *msdu_details_ptr)
+{
+	return HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr);
+}
+
+/**
+ * hal_rx_link_desc_msdu0_ptr_8074v1 - Get pointer to rx_msdu details
+ * @link_desc - Pointer to link desc
+ *
+ * Return - Pointer to rx_msdu_details structure
+ *
+ */
+static void *hal_rx_link_desc_msdu0_ptr_8074v1(void *link_desc)
+{
+	return HAL_RX_LINK_DESC_MSDU0_PTR(link_desc);
+}
+
 struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
 
 	/* init and setup */
@@ -838,8 +878,8 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
 	hal_rx_mpdu_start_tid_get_8074,
 	hal_rx_msdu_start_reception_type_get_8074,
 	hal_rx_msdu_end_da_idx_get_8074,
-	hal_rx_msdu_desc_info_get_ptr_generic,
-	hal_rx_link_desc_msdu0_ptr_generic,
+	hal_rx_msdu_desc_info_get_ptr_8074v1,
+	hal_rx_link_desc_msdu0_ptr_8074v1,
 	hal_reo_status_get_header_8074v1,
 	hal_rx_status_get_tlv_info_generic,
 	hal_rx_wbm_err_info_get_generic,
@@ -883,6 +923,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
 	hal_rx_get_mac_addr2_valid_8074v1,
 	hal_rx_get_filter_category_8074v1,
 	hal_rx_get_ppdu_id_8074v1,
+	hal_reo_config_8074v1,
 };
 
 struct hal_hw_srng_config hw_srng_table_8074[] = {

hal/wifi3.0/qca8074v1/hal_8074v1_rx.h

@@ -253,6 +253,36 @@
 #define HAL_RX_GET_PPDU_ID(rx_mpdu_start)	\
 	HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_0, PHY_PPDU_ID)
 
+#define HAL_REO_R0_CONFIG(soc, reg_val, reo_params)		\
+	do { \
+		reg_val &= \
+			~(HWIO_REO_R0_GENERAL_ENABLE_FRAGMENT_DEST_RING_BMSK |\
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK | \
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK); \
+		reg_val |= \
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       FRAGMENT_DEST_RING, \
+			       (reo_params)->frag_dst_ring) |	\
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_LIST_ENABLE, 1) |\
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_FLUSH_ENABLE, 1);\
+		HAL_REG_WRITE((soc), \
+			      HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
+			      SEQ_WCSS_UMAC_REO_REG_OFFSET),\
+			      (reg_val)); \
+	} while (0)
+
+#define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
+	((struct rx_msdu_desc_info *) \
+	_OFFSET_TO_BYTE_PTR((msdu_details_ptr), \
+UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
+
+#define HAL_RX_LINK_DESC_MSDU0_PTR(link_desc)   \
+	((struct rx_msdu_details *) \
+	 _OFFSET_TO_BYTE_PTR((link_desc),\
+	UNIFIED_RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET))
+
 /*
  * hal_rx_msdu_start_nss_get_8074(): API to get the NSS
  * Interval from rx_msdu_start

hal/wifi3.0/qca8074v2/hal_8074v2.c

@@ -803,6 +803,46 @@ hal_rx_get_ppdu_id_8074v2(uint8_t *buf)
 	return HAL_RX_GET_PPDU_ID(buf);
 }
 
+/**
+ * hal_reo_config_8074v2(): Set reo config parameters
+ * @soc: hal soc handle
+ * @reg_val: value to be set
+ * @reo_params: reo parameters
+ *
+ * Return: void
+ */
+static void
+hal_reo_config_8074v2(struct hal_soc *soc,
+		      uint32_t reg_val,
+		      struct hal_reo_params *reo_params)
+{
+	HAL_REO_R0_CONFIG(soc, reg_val, reo_params);
+}
+
+/**
+ * hal_rx_msdu_desc_info_get_ptr_8074v2() - Get msdu desc info ptr
+ * @msdu_details_ptr - Pointer to msdu_details_ptr
+ *
+ * Return - Pointer to rx_msdu_desc_info structure.
+ *
+ */
+static void *hal_rx_msdu_desc_info_get_ptr_8074v2(void *msdu_details_ptr)
+{
+	return HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr);
+}
+
+/**
+ * hal_rx_link_desc_msdu0_ptr_8074v2 - Get pointer to rx_msdu details
+ * @link_desc - Pointer to link desc
+ *
+ * Return - Pointer to rx_msdu_details structure
+ *
+ */
+static void *hal_rx_link_desc_msdu0_ptr_8074v2(void *link_desc)
+{
+	return HAL_RX_LINK_DESC_MSDU0_PTR(link_desc);
+}
+
 struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
 
 	/* init and setup */
@@ -836,8 +876,8 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
 	hal_rx_mpdu_start_tid_get_8074v2,
 	hal_rx_msdu_start_reception_type_get_8074v2,
 	hal_rx_msdu_end_da_idx_get_8074v2,
-	hal_rx_msdu_desc_info_get_ptr_generic,
-	hal_rx_link_desc_msdu0_ptr_generic,
+	hal_rx_msdu_desc_info_get_ptr_8074v2,
+	hal_rx_link_desc_msdu0_ptr_8074v2,
 	hal_reo_status_get_header_8074v2,
 	hal_rx_status_get_tlv_info_generic,
 	hal_rx_wbm_err_info_get_generic,
@@ -881,6 +921,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
 	hal_rx_get_mac_addr2_valid_8074v2,
 	hal_rx_get_filter_category_8074v2,
 	hal_rx_get_ppdu_id_8074v2,
+	hal_reo_config_8074v2,
 };
 
 struct hal_hw_srng_config hw_srng_table_8074v2[] = {

hal/wifi3.0/qca8074v2/hal_8074v2_rx.h

@@ -262,6 +262,36 @@
 #define HAL_RX_GET_PPDU_ID(rx_mpdu_start)	\
 	HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_0, PHY_PPDU_ID)
 
+#define HAL_REO_R0_CONFIG(soc, reg_val, reo_params)		\
+	do { \
+		reg_val &= \
+			~(HWIO_REO_R0_GENERAL_ENABLE_FRAGMENT_DEST_RING_BMSK |\
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK | \
+			HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK); \
+		reg_val |= \
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       FRAGMENT_DEST_RING, \
+			       (reo_params)->frag_dst_ring) |	\
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_LIST_ENABLE, 1) |\
+			HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
+			       AGING_FLUSH_ENABLE, 1);\
+		HAL_REG_WRITE((soc), \
+			      HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
+			      SEQ_WCSS_UMAC_REO_REG_OFFSET), \
+			      (reg_val)); \
+	} while (0)
+
+#define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
+	((struct rx_msdu_desc_info *) \
+	_OFFSET_TO_BYTE_PTR((msdu_details_ptr), \
+UNIFIED_RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET))
+
+#define HAL_RX_LINK_DESC_MSDU0_PTR(link_desc)   \
+	((struct rx_msdu_details *) \
+	 _OFFSET_TO_BYTE_PTR((link_desc),\
+	UNIFIED_RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET))
+
 /*
  * hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS
  * Interval from rx_msdu_start

hal/wifi3.0/qcn9000/hal_9000.c

@@ -812,6 +812,46 @@ hal_rx_get_ppdu_id_9000(uint8_t *buf)
 	return HAL_RX_GET_PPDU_ID(buf);
 }
 
+/**
+ * hal_reo_config_9000(): Set reo config parameters
+ * @soc: hal soc handle
+ * @reg_val: value to be set
+ * @reo_params: reo parameters
+ *
+ * Return: void
+ */
+static void
+hal_reo_config_9000(struct hal_soc *soc,
+		    uint32_t reg_val,
+		    struct hal_reo_params *reo_params)
+{
+	HAL_REO_R0_CONFIG(soc, reg_val, reo_params);
+}
+
+/**
+ * hal_rx_msdu_desc_info_get_ptr_9000() - Get msdu desc info ptr
+ * @msdu_details_ptr - Pointer to msdu_details_ptr
+ *
+ * Return - Pointer to rx_msdu_desc_info structure.
+ *
+ */
+static void *hal_rx_msdu_desc_info_get_ptr_9000(void *msdu_details_ptr)
+{
+	return HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr);
+}
+
+/**
+ * hal_rx_link_desc_msdu0_ptr_9000 - Get pointer to rx_msdu details
+ * @link_desc - Pointer to link desc
+ *
+ * Return - Pointer to rx_msdu_details structure
+ *
+ */
+static void *hal_rx_link_desc_msdu0_ptr_9000(void *link_desc)
+{
+	return HAL_RX_LINK_DESC_MSDU0_PTR(link_desc);
+}
+
 struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
 
 	/* init and setup */
@@ -845,8 +885,8 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
 	hal_rx_mpdu_start_tid_get_8074v2,
 	hal_rx_msdu_start_reception_type_get_8074v2,
 	hal_rx_msdu_end_da_idx_get_8074v2,
-	hal_rx_msdu_desc_info_get_ptr_generic,
-	hal_rx_link_desc_msdu0_ptr_generic,
+	hal_rx_msdu_desc_info_get_ptr_9000,
+	hal_rx_link_desc_msdu0_ptr_9000,
 	hal_reo_status_get_header_9000,
 	hal_rx_status_get_tlv_info_generic,
 	hal_rx_wbm_err_info_get_generic,
@@ -890,6 +930,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
 	hal_rx_get_mac_addr2_valid_9000,
 	hal_rx_get_filter_category_9000,
 	hal_rx_get_ppdu_id_9000,
+	hal_reo_config_9000,
 };
 
 struct hal_hw_srng_config hw_srng_table_9000[] = {