msm: camera: isp: Add UBWC compression disable support

Adding UBWC compression disable support.

CRs-Fixed: 2789618
Change-Id: I994e6698ce945b7bed2a1207d4b52e4f10b99df1
Signed-off-by: Wyes Karny <[email protected]>

drivers/cam_icp/icp_hw/a5_hw/a5_core.c

@@ -645,6 +645,7 @@ int cam_a5_process_cmd(void *device_priv, uint32_t cmd_type,
 		break;
 	case CAM_ICP_CMD_UBWC_CFG: {
 		struct a5_ubwc_cfg_ext *ubwc_cfg_ext = NULL;
+		uint32_t *disable_ubwc_comp;
 
 		a5_soc = soc_info->soc_private;
 		if (!a5_soc) {
@@ -652,6 +653,13 @@ int cam_a5_process_cmd(void *device_priv, uint32_t cmd_type,
 			return -EINVAL;
 		}
 
+		if (!cmd_args) {
+			CAM_ERR(CAM_ICP, "Invalid args");
+			return -EINVAL;
+		}
+
+		disable_ubwc_comp = (uint32_t *)cmd_args;
+
 		if (a5_soc->ubwc_config_ext) {
 			/* Invoke kernel API to determine DDR type */
 			ddr_type = of_fdt_get_ddrtype();
@@ -668,6 +676,10 @@ int cam_a5_process_cmd(void *device_priv, uint32_t cmd_type,
 				ubwc_cfg_ext->ubwc_bps_fetch_cfg[index];
 			ubwc_bps_cfg[1] =
 				ubwc_cfg_ext->ubwc_bps_write_cfg[index];
+			if (*disable_ubwc_comp) {
+				ubwc_ipe_cfg[1] &= ~CAM_ICP_UBWC_COMP_EN;
+				ubwc_bps_cfg[1] &= ~CAM_ICP_UBWC_COMP_EN;
+			}
 			rc = hfi_cmd_ubwc_config_ext(&ubwc_ipe_cfg[0],
 					&ubwc_bps_cfg[0]);
 		} else {

drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c

@@ -113,14 +113,19 @@ static int cam_icp_send_ubwc_cfg(struct cam_icp_hw_mgr *hw_mgr)
 {
 	struct cam_hw_intf *icp_dev_intf = hw_mgr->icp_dev_intf;
 	int rc;
+	uint32_t disable_ubwc_comp = 0;
 
 	if (!icp_dev_intf) {
 		CAM_ERR(CAM_ICP, "ICP device interface is NULL");
 		return -EINVAL;
 	}
 
-	rc = icp_dev_intf->hw_ops.process_cmd(icp_dev_intf->hw_priv,
-			CAM_ICP_CMD_UBWC_CFG, NULL, 0);
+	disable_ubwc_comp = hw_mgr->disable_ubwc_comp;
+
+	rc = icp_dev_intf->hw_ops.process_cmd(
+		icp_dev_intf->hw_priv,
+		CAM_ICP_CMD_UBWC_CFG, (void *)&disable_ubwc_comp,
+		sizeof(disable_ubwc_comp));
 	if (rc)
 		CAM_ERR(CAM_ICP, "CAM_ICP_CMD_UBWC_CFG is failed");
 
@@ -1918,6 +1923,10 @@ static int cam_icp_hw_mgr_create_debugfs_entry(void)
 
 	dbgfileptr = debugfs_create_file("icp_fw_dump_lvl", 0644,
 		icp_hw_mgr.dentry, NULL, &cam_icp_debug_fw_dump);
+
+	dbgfileptr = debugfs_create_bool("disable_ubwc_comp", 0644,
+		icp_hw_mgr.dentry, &icp_hw_mgr.disable_ubwc_comp);
+
 	if (IS_ERR(dbgfileptr)) {
 		if (PTR_ERR(dbgfileptr) == -ENODEV)
 			CAM_WARN(CAM_ICP, "DebugFS not enabled in kernel!");

drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h

@@ -352,6 +352,7 @@ struct cam_icp_clk_info {
  * @bps_dev_intf: Device interface for BPS
  * @ipe_clk_state: IPE clock state flag
  * @bps_clk_state: BPS clock state flag
+ * @disable_ubwc_comp: Disable UBWC compression
  * @recovery: Flag to validate if in previous session FW
  *            reported a fatal error or wdt. If set FW is
  *            re-downloaded for new camera session.
@@ -400,6 +401,7 @@ struct cam_icp_hw_mgr {
 	struct cam_hw_intf *bps_dev_intf;
 	bool ipe_clk_state;
 	bool bps_clk_state;
+	bool disable_ubwc_comp;
 	atomic_t recovery;
 };
 

drivers/cam_icp/icp_hw/icp_hw_mgr/include/cam_icp_hw_intf.h

@@ -13,6 +13,8 @@
 #define CAM_ICP_BW_CONFIG_V1      1
 #define CAM_ICP_BW_CONFIG_V2      2
 
+#define CAM_ICP_UBWC_COMP_EN      BIT(1)
+
 enum cam_icp_hw_type {
 	CAM_ICP_DEV_A5,
 	CAM_ICP_DEV_IPE,

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

@@ -4299,7 +4299,7 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
 	struct cam_ife_hw_mgr_ctx        *ctx;
 	struct cam_isp_hw_mgr_res        *hw_mgr_res;
 	struct cam_isp_resource_node     *rsrc_node = NULL;
-	uint32_t                          i, camif_debug;
+	uint32_t                          i, j, camif_debug, disable_ubwc_comp;
 	bool                              res_rdi_context_set = false;
 	uint32_t                          primary_rdi_src_res;
 	uint32_t                          primary_rdi_out_res;
@@ -4373,6 +4373,27 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
 		}
 	}
 
+	if (g_ife_hw_mgr.debug_cfg.disable_ubwc_comp) {
+		disable_ubwc_comp = 1;
+		for (i = 0; i < CAM_IFE_HW_OUT_RES_MAX; i++) {
+			hw_mgr_res = &ctx->res_list_ife_out[i];
+			for (j = 0; j < CAM_ISP_HW_SPLIT_MAX; j++) {
+				if (!hw_mgr_res->hw_res[i])
+					continue;
+
+				rsrc_node = hw_mgr_res->hw_res[i];
+				if (rsrc_node->hw_intf->hw_ops.process_cmd) {
+					rc = rsrc_node->hw_intf->hw_ops.process_cmd(
+						rsrc_node->hw_intf->hw_priv,
+						CAM_ISP_HW_CMD_DISABLE_UBWC_COMP,
+						&disable_ubwc_comp,
+						sizeof(disable_ubwc_comp));
+				}
+			}
+			break;
+		}
+	}
+
 	rc = cam_ife_hw_mgr_init_hw(ctx);
 	if (rc) {
 		CAM_ERR(CAM_ISP, "Init failed");
@@ -7960,6 +7981,10 @@ static int cam_ife_hw_mgr_debug_register(void)
 	dbgfileptr = debugfs_create_bool("per_req_reg_dump", 0644,
 		g_ife_hw_mgr.debug_cfg.dentry,
 		&g_ife_hw_mgr.debug_cfg.per_req_reg_dump);
+	dbgfileptr = debugfs_create_bool("disable_ubwc_comp", 0644,
+		g_ife_hw_mgr.debug_cfg.dentry,
+		&g_ife_hw_mgr.debug_cfg.disable_ubwc_comp);
+
 	if (IS_ERR(dbgfileptr)) {
 		if (PTR_ERR(dbgfileptr) == -ENODEV)
 			CAM_WARN(CAM_ISP, "DebugFS not enabled in kernel!");

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.h

@@ -24,6 +24,8 @@
 #define CAM_IFE_CUSTOM_CFG_FRAME_HEADER_TS   BIT(0)
 #define CAM_IFE_CUSTOM_CFG_SW_SYNC_ON        BIT(1)
 
+#define CAM_IFE_UBWC_COMP_EN                 BIT(1)
+
 /**
  * struct cam_ife_hw_mgr_debug - contain the debug information
  *
@@ -34,6 +36,7 @@
  * @enable_diag_sensor_status: enable sensor diagnosis status
  * @enable_req_dump:           Enable request dump on HW errors
  * @per_req_reg_dump:          Enable per request reg dump
+ * @disable_ubwc_comp:         Disable UBWC compression
  *
  */
 struct cam_ife_hw_mgr_debug {
@@ -44,6 +47,7 @@ struct cam_ife_hw_mgr_debug {
 	uint32_t       camif_debug;
 	bool           enable_req_dump;
 	bool           per_req_reg_dump;
+	bool           disable_ubwc_comp;
 };
 
 /**

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

@@ -130,6 +130,7 @@ enum cam_isp_hw_cmd_type {
 	CAM_ISP_HW_CMD_CSID_CLOCK_DUMP,
 	CAM_ISP_HW_CMD_TPG_CORE_CFG_CMD,
 	CAM_ISP_HW_CMD_CSID_CHANGE_HALT_MODE,
+	CAM_ISP_HW_CMD_DISABLE_UBWC_COMP,
 	CAM_ISP_HW_CMD_MAX,
 };
 

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_core.c

@@ -618,6 +618,7 @@ int cam_vfe_process_cmd(void *hw_priv, uint32_t cmd_type,
 	case CAM_ISP_HW_CMD_DUMP_BUS_INFO:
 	case CAM_ISP_HW_CMD_IS_CONSUMED_ADDR_SUPPORT:
 	case CAM_ISP_HW_CMD_GET_RES_FOR_MID:
+	case CAM_ISP_HW_CMD_DISABLE_UBWC_COMP:
 		rc = core_info->vfe_bus->hw_ops.process_cmd(
 			core_info->vfe_bus->bus_priv, cmd_type, cmd_args,
 			arg_size);

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver2.c

@@ -101,6 +101,7 @@ struct cam_vfe_bus_ver2_common_data {
 	cam_hw_mgr_event_cb_func                    event_cb;
 	bool                                        hw_init;
 	bool                                        support_consumed_addr;
+	bool                                        disable_ubwc_comp;
 };
 
 struct cam_vfe_bus_ver2_wm_resource_data {
@@ -1223,6 +1224,7 @@ static int cam_vfe_bus_start_wm(
 	struct cam_vfe_bus_ver2_common_data        *common_data =
 		rsrc_data->common_data;
 	uint32_t camera_hw_version;
+	uint32_t disable_ubwc_comp = rsrc_data->common_data->disable_ubwc_comp;
 
 	cam_io_w(0xf, common_data->mem_base + rsrc_data->hw_regs->burst_limit);
 
@@ -1259,6 +1261,8 @@ static int cam_vfe_bus_start_wm(
 			val = cam_io_r_mb(common_data->mem_base +
 				ubwc_regs->mode_cfg_0);
 			val |= 0x1;
+			if (disable_ubwc_comp)
+				val &= ~CAM_IFE_UBWC_COMP_EN;
 			cam_io_w_mb(val, common_data->mem_base +
 				ubwc_regs->mode_cfg_0);
 		} else if ((camera_hw_version == CAM_CPAS_TITAN_175_V100) ||
@@ -1275,6 +1279,8 @@ static int cam_vfe_bus_start_wm(
 			val = cam_io_r_mb(common_data->mem_base +
 				ubwc_regs->mode_cfg_0);
 			val |= 0x1;
+			if (disable_ubwc_comp)
+				val &= ~CAM_IFE_UBWC_COMP_EN;
 			cam_io_w_mb(val, common_data->mem_base +
 				ubwc_regs->mode_cfg_0);
 		} else {
@@ -3688,6 +3694,10 @@ static int cam_vfe_bus_process_cmd(
 		bus_priv = (struct cam_vfe_bus_ver2_priv *) priv;
 		rc = cam_vfe_bus_get_res_for_mid(bus_priv, cmd_args, arg_size);
 		break;
+	case CAM_ISP_HW_CMD_DISABLE_UBWC_COMP:
+		bus_priv = (struct cam_vfe_bus_ver2_priv *) priv;
+		bus_priv->common_data.disable_ubwc_comp = true;
+		break;
 	default:
 		CAM_ERR_RATE_LIMIT(CAM_ISP, "Invalid camif process command:%d",
 			cmd_type);
@@ -3752,6 +3762,7 @@ int cam_vfe_bus_ver2_init(
 	bus_priv->common_data.hw_init            = false;
 	bus_priv->common_data.support_consumed_addr =
 		ver2_hw_info->support_consumed_addr;
+	bus_priv->common_data.disable_ubwc_comp  = false;
 
 	mutex_init(&bus_priv->common_data.bus_mutex);
 

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver3.c

@@ -91,6 +91,7 @@ struct cam_vfe_bus_ver3_common_data {
 	bool                                        is_lite;
 	bool                                        hw_init;
 	bool                                        support_consumed_addr;
+	bool                                        disable_ubwc_comp;
 	cam_hw_mgr_event_cb_func                    event_cb;
 	int                        rup_irq_handle[CAM_VFE_BUS_VER3_SRC_GRP_MAX];
 };
@@ -1625,6 +1626,7 @@ static int cam_vfe_bus_ver3_start_wm(struct cam_isp_resource_node *wm_res)
 	struct cam_vfe_bus_ver3_common_data        *common_data =
 		rsrc_data->common_data;
 	struct cam_vfe_bus_ver3_reg_offset_ubwc_client *ubwc_regs;
+	bool disable_ubwc_comp = rsrc_data->common_data->disable_ubwc_comp;
 
 	ubwc_regs = (struct cam_vfe_bus_ver3_reg_offset_ubwc_client *)
 		rsrc_data->hw_regs->ubwc_regs;
@@ -1640,6 +1642,8 @@ static int cam_vfe_bus_ver3_start_wm(struct cam_isp_resource_node *wm_res)
 	if (rsrc_data->en_ubwc) {
 		val = cam_io_r_mb(common_data->mem_base + ubwc_regs->mode_cfg);
 		val |= 0x1;
+		if (disable_ubwc_comp)
+			val &= ~(0x1<<1);
 		cam_io_w_mb(val, common_data->mem_base + ubwc_regs->mode_cfg);
 	}
 
@@ -2985,6 +2989,9 @@ static int cam_vfe_bus_ver3_update_ubwc_regs(
 	CAM_DBG(CAM_ISP, "WM:%d meta stride 0x%X",
 		wm_data->index, reg_val_pair[*j-1]);
 
+	if (wm_data->common_data->disable_ubwc_comp)
+		wm_data->ubwc_mode_cfg &= ~(0x1<<1);
+
 	CAM_VFE_ADD_REG_VAL_PAIR(reg_val_pair, *j,
 		ubwc_regs->mode_cfg, wm_data->ubwc_mode_cfg);
 	CAM_DBG(CAM_ISP, "WM:%d ubwc_mode_cfg 0x%X",
@@ -3839,6 +3846,10 @@ static int cam_vfe_bus_ver3_process_cmd(
 		bus_priv = (struct cam_vfe_bus_ver3_priv *) priv;
 		rc = cam_vfe_bus_get_res_for_mid(bus_priv, cmd_args, arg_size);
 		break;
+	case CAM_ISP_HW_CMD_DISABLE_UBWC_COMP:
+		bus_priv = (struct cam_vfe_bus_ver3_priv *) priv;
+		bus_priv->common_data.disable_ubwc_comp = true;
+		break;
 	default:
 		CAM_ERR_RATE_LIMIT(CAM_ISP, "Invalid camif process command:%d",
 			cmd_type);
@@ -3913,6 +3924,7 @@ int cam_vfe_bus_ver3_init(
 	bus_priv->common_data.is_lite = soc_private->is_ife_lite;
 	bus_priv->common_data.support_consumed_addr =
 		ver3_hw_info->support_consumed_addr;
+	bus_priv->common_data.disable_ubwc_comp = false;
 
 	for (i = 0; i < CAM_VFE_BUS_VER3_SRC_GRP_MAX; i++)
 		bus_priv->common_data.rup_irq_handle[i] = 0;