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@@ -71,7 +71,7 @@ struct cam_tfe_bus_common_data {
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uint32_t num_sec_out;
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uint32_t comp_done_shift;
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uint32_t rdi_width;
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- uint32_t en_cfg_shift;
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+ uint32_t mode_cfg_shift;
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uint32_t height_shift;
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bool is_lite;
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bool support_consumed_addr;
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@@ -652,7 +652,7 @@ static int cam_tfe_bus_acquire_rdi_wm(
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{
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int pack_fmt = 0;
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int rdi_width = rsrc_data->common_data->rdi_width;
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- int en_cfg_shift = rsrc_data->common_data->en_cfg_shift;
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+ int mode_cfg_shift = rsrc_data->common_data->mode_cfg_shift;
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if (rdi_width == 64)
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pack_fmt = 0xa;
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else if (rdi_width == 128)
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@@ -672,7 +672,7 @@ static int cam_tfe_bus_acquire_rdi_wm(
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rsrc_data->height = 0;
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rsrc_data->stride =
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CAM_TFE_RDI_BUS_DEFAULT_STRIDE;
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- rsrc_data->en_cfg = (0x1 << en_cfg_shift) | 0x1;
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+ rsrc_data->en_cfg = (0x1 << mode_cfg_shift) | 0x1;
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}
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break;
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case CAM_FORMAT_MIPI_RAW_8:
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@@ -689,7 +689,7 @@ static int cam_tfe_bus_acquire_rdi_wm(
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rsrc_data->height = 0;
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rsrc_data->stride =
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CAM_TFE_RDI_BUS_DEFAULT_STRIDE;
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- rsrc_data->en_cfg = (0x1 << en_cfg_shift) | 0x1;
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+ rsrc_data->en_cfg = (0x1 << mode_cfg_shift) | 0x1;
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}
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break;
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case CAM_FORMAT_MIPI_RAW_10:
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@@ -705,7 +705,7 @@ static int cam_tfe_bus_acquire_rdi_wm(
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rsrc_data->height = 0;
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rsrc_data->stride =
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CAM_TFE_RDI_BUS_DEFAULT_STRIDE;
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- rsrc_data->en_cfg = (0x1 << en_cfg_shift) | 0x1;
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+ rsrc_data->en_cfg = (0x1 << mode_cfg_shift) | 0x1;
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}
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break;
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case CAM_FORMAT_MIPI_RAW_12:
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@@ -721,7 +721,7 @@ static int cam_tfe_bus_acquire_rdi_wm(
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rsrc_data->height = 0;
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rsrc_data->stride =
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CAM_TFE_RDI_BUS_DEFAULT_STRIDE;
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- rsrc_data->en_cfg = (0x1 << en_cfg_shift) | 0x1;
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+ rsrc_data->en_cfg = (0x1 << mode_cfg_shift) | 0x1;
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}
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break;
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case CAM_FORMAT_MIPI_RAW_14:
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@@ -737,7 +737,7 @@ static int cam_tfe_bus_acquire_rdi_wm(
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rsrc_data->height = 0;
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rsrc_data->stride =
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CAM_TFE_RDI_BUS_DEFAULT_STRIDE;
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- rsrc_data->en_cfg = (0x1 << en_cfg_shift) | 0x1;
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+ rsrc_data->en_cfg = (0x1 << mode_cfg_shift) | 0x1;
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}
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break;
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case CAM_FORMAT_PLAIN16_10:
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@@ -757,7 +757,7 @@ static int cam_tfe_bus_acquire_rdi_wm(
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rsrc_data->height = 0;
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rsrc_data->stride =
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CAM_TFE_RDI_BUS_DEFAULT_STRIDE;
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- rsrc_data->en_cfg = (0x1 << en_cfg_shift) | 0x1;
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+ rsrc_data->en_cfg = (0x1 << mode_cfg_shift) | 0x1;
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}
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break;
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@@ -775,7 +775,7 @@ static int cam_tfe_bus_acquire_rdi_wm(
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rsrc_data->height = 0;
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rsrc_data->stride =
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CAM_TFE_RDI_BUS_DEFAULT_STRIDE;
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- rsrc_data->en_cfg = (0x1 << en_cfg_shift) | 0x1;
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+ rsrc_data->en_cfg = (0x1 << mode_cfg_shift) | 0x1;
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}
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break;
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default:
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@@ -911,7 +911,7 @@ static int cam_tfe_bus_acquire_wm(
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rsrc_data->width = 0;
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rsrc_data->height = 0;
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rsrc_data->stride = 1;
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- rsrc_data->en_cfg = (0x1 << rsrc_data->common_data->en_cfg_shift) | 0x1;
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+ rsrc_data->en_cfg = (0x1 << rsrc_data->common_data->mode_cfg_shift) | 0x1;
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/*RS state packet format*/
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if (rsrc_data->index == 15)
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@@ -923,7 +923,7 @@ static int cam_tfe_bus_acquire_wm(
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rsrc_data->width = 0;
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rsrc_data->height = 0;
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rsrc_data->stride = 1;
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- rsrc_data->en_cfg = 0x1;
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+ rsrc_data->en_cfg = (0x1 << rsrc_data->common_data->mode_cfg_shift) | 0x1;
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break;
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default:
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CAM_ERR(CAM_ISP, "Invalid format %d out_type:%d index: %d",
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@@ -2823,7 +2823,7 @@ int cam_tfe_bus_init(
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bus_priv->common_data.max_bw_counter_limit = hw_info->max_bw_counter_limit;
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bus_priv->common_data.counter_limit_shift = hw_info->counter_limit_shift;
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bus_priv->common_data.counter_limit_mask = hw_info->counter_limit_mask;
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- bus_priv->common_data.en_cfg_shift = hw_info->en_cfg_shift;
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+ bus_priv->common_data.mode_cfg_shift = hw_info->mode_cfg_shift;
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bus_priv->common_data.height_shift = hw_info->height_shift;
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bus_priv->common_data.pack_align_shift = hw_info->pack_align_shift;
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