disp: msm: sde: add support for hwfence profiling
This change adds hwfence input and output fence profiling registers and debugfs to enable them. To enable input hw fences timestamps: echo 0x1 > /d/dri/0/debug/hw_fence_status To enable output hw fences timestamps: echo 0x2 > /d/dri/0/debug/hw_fence_status To enable both, input and output hw fences timestamps: echo 0x3 > /d/dri/0/debug/hw_fence_status. Change-Id: I269a38f3843a01ec8c0816890e50bb7d847a4ed9 Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
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@@ -251,7 +251,7 @@ int sde_fence_register_hw_fences_wait(struct sde_hw_ctl *hw_ctl, struct dma_fenc
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return ret;
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}
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static int _arm_output_hw_fence(struct sde_hw_ctl *hw_ctl, u32 line_count)
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static int _arm_output_hw_fence(struct sde_hw_ctl *hw_ctl, u32 line_count, u32 debugfs_hw_fence)
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{
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struct sde_hw_fence_data *data;
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u32 ipcc_out_signal;
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@@ -279,6 +279,10 @@ static int _arm_output_hw_fence(struct sde_hw_ctl *hw_ctl, u32 line_count)
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SDE_DEBUG("out-fence ctl_id:%d out_signal:%d hw_fence_client:%s\n",
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ctl_id, ipcc_out_signal, _get_client_id_name(data->hw_fence_client_id));
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if ((debugfs_hw_fence & SDE_OUTPUT_HW_FENCE_TIMESTAMP) &&
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hw_ctl->ops.hw_fence_output_timestamp_ctrl)
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hw_ctl->ops.hw_fence_output_timestamp_ctrl(hw_ctl, true, false);
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/* update client/signal output fence */
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hw_ctl->ops.hw_fence_update_output_fence(hw_ctl, data->ipcc_out_client, ipcc_out_signal);
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SDE_EVT32_VERBOSE(ctl_id, ipcc_out_signal);
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@@ -293,7 +297,8 @@ static int _arm_output_hw_fence(struct sde_hw_ctl *hw_ctl, u32 line_count)
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return 0;
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}
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static int _sde_fence_arm_output_hw_fence(struct sde_fence_context *ctx, u32 line_count)
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static int _sde_fence_arm_output_hw_fence(struct sde_fence_context *ctx, u32 line_count,
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u32 debugfs_hw_fence)
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{
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struct sde_hw_ctl *hw_ctl = NULL;
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struct sde_fence *fc, *next;
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@@ -330,13 +335,14 @@ static int _sde_fence_arm_output_hw_fence(struct sde_fence_context *ctx, u32 lin
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/* arm dpu to trigger output hw-fence ipcc signal upon completion */
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if (hw_ctl)
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_arm_output_hw_fence(hw_ctl, line_count);
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_arm_output_hw_fence(hw_ctl, line_count, debugfs_hw_fence);
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return 0;
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}
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/* update output hw_fences txq */
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int sde_fence_update_hw_fences_txq(struct sde_fence_context *ctx, bool vid_mode, u32 line_count)
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int sde_fence_update_hw_fences_txq(struct sde_fence_context *ctx, bool vid_mode, u32 line_count,
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u32 debugfs_hw_fence)
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{
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int ret = 0;
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struct sde_hw_fence_data *data;
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@@ -409,7 +415,7 @@ exit:
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/* arm dpu to trigger output hw-fence ipcc signal upon completion in vid-mode */
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if ((txq_updated && hw_ctl) || line_count)
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_sde_fence_arm_output_hw_fence(ctx, line_count);
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_sde_fence_arm_output_hw_fence(ctx, line_count, debugfs_hw_fence);
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return ret;
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}
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@@ -462,7 +468,8 @@ static int _reset_hw_fence_timeline(struct sde_hw_ctl *hw_ctl, u32 flags)
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return ret;
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}
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int sde_fence_update_input_hw_fence_signal(struct sde_hw_ctl *hw_ctl)
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int sde_fence_update_input_hw_fence_signal(struct sde_hw_ctl *hw_ctl, u32 debugfs_hw_fence,
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struct sde_hw_mdp *hw_mdp)
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{
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struct sde_hw_fence_data *data;
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u32 ipcc_signal_id;
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@@ -470,7 +477,7 @@ int sde_fence_update_input_hw_fence_signal(struct sde_hw_ctl *hw_ctl)
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int ctl_id;
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/* we must support sw_override as well, so check both functions */
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if (!hw_ctl || !hw_ctl->ops.hw_fence_update_input_fence ||
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if (!hw_mdp || !hw_ctl || !hw_ctl->ops.hw_fence_update_input_fence ||
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!hw_ctl->ops.hw_fence_trigger_sw_override) {
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SDE_ERROR("missing ctl/override/update fence %d\n", !hw_ctl);
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return -EINVAL;
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@@ -479,6 +486,10 @@ int sde_fence_update_input_hw_fence_signal(struct sde_hw_ctl *hw_ctl)
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ctl_id = hw_ctl->idx - CTL_0;
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data = &hw_ctl->hwfence_data;
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if ((debugfs_hw_fence & SDE_INPUT_HW_FENCE_TIMESTAMP)
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&& hw_mdp->ops.hw_fence_input_timestamp_ctrl)
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hw_mdp->ops.hw_fence_input_timestamp_ctrl(hw_mdp, true, false);
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ipcc_signal_id = data->ipcc_in_signal;
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ipcc_client_id = data->ipcc_in_client;
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