dataipa: FR80474 Mem pool optimization

Added changes to optimize ipa

Change-Id: I83e71e6e6e9fe906d1c8e57c8e8bc16bb4a424bf
This commit is contained in:
Abhishek Raghuvanshi
2023-01-18 16:47:33 -08:00
parent 213523bb85
commit 217f295c23
3 changed files with 39 additions and 6 deletions

View File

@@ -9095,6 +9095,15 @@ static u32 get_ipa_gen_rx_cmn_temp_pool_size(u32 rx_cmn_temp_pool_size)
return IPA_GENERIC_RX_CMN_TEMP_POOL_SZ_FACTOR;
}
static u32 get_ipa_gen_rx_ll_pool_size(u32 rx_ll_pool_sz_factor)
{
if (!rx_ll_pool_sz_factor)
return IPA_GENERIC_RX_PAGE_POOL_SZ_FACTOR;
if (rx_ll_pool_sz_factor <= IPA_GENERIC_RX_PAGE_POOL_SZ_FACTOR)
return rx_ll_pool_sz_factor;
return IPA_GENERIC_RX_PAGE_POOL_SZ_FACTOR;
}
/**
* ipa3_pre_init() - Initialize the IPA Driver.
* This part contains all initialization which doesn't require IPA HW, such
@@ -9250,8 +9259,10 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p,
resource_p->tx_wrapper_cache_max_size);
ipa3_ctx->ipa_gen_rx_cmn_page_pool_sz_factor = get_ipa_gen_rx_cmn_page_pool_size(
resource_p->ipa_gen_rx_cmn_page_pool_sz_factor);
ipa3_ctx->ipa_gen_rx_cmn_temp_pool_sz_factor = get_ipa_gen_rx_cmn_temp_pool_size(
ipa3_ctx->ipa_gen_rx_cmn_temp_pool_sz_factor = get_ipa_gen_rx_cmn_temp_pool_size(
resource_p->ipa_gen_rx_cmn_temp_pool_sz_factor);
ipa3_ctx->ipa_gen_rx_ll_pool_sz_factor = get_ipa_gen_rx_ll_pool_size(
resource_p->ipa_gen_rx_ll_pool_sz_factor);
ipa3_ctx->ipa_config_is_auto = resource_p->ipa_config_is_auto;
ipa3_ctx->ipa_mhi_proxy = resource_p->ipa_mhi_proxy;
ipa3_ctx->max_num_smmu_cb = resource_p->max_num_smmu_cb;
@@ -10100,7 +10111,6 @@ static void get_dts_tx_wrapper_cache_size(struct platform_device *pdev,
ipa_drv_res->tx_wrapper_cache_max_size);
}
static void get_dts_ipa_gen_rx_cmn_page_pool_sz_factor(struct platform_device *pdev,
struct ipa3_plat_drv_res *ipa_drv_res)
{
@@ -10117,7 +10127,6 @@ static void get_dts_ipa_gen_rx_cmn_page_pool_sz_factor(struct platform_device *p
ipa_drv_res->ipa_gen_rx_cmn_page_pool_sz_factor);
}
static void get_dts_ipa_gen_rx_cmn_temp_pool_sz_factor(struct platform_device *pdev,
struct ipa3_plat_drv_res *ipa_drv_res)
{
@@ -10134,6 +10143,22 @@ static void get_dts_ipa_gen_rx_cmn_temp_pool_sz_factor(struct platform_device *p
ipa_drv_res->ipa_gen_rx_cmn_temp_pool_sz_factor);
}
static void get_dts_ipa_gen_rx_ll_page_pool_sz_factor(struct platform_device *pdev,
struct ipa3_plat_drv_res *ipa_drv_res)
{
int result;
result = of_property_read_u32 (
pdev->dev.of_node,
"qcom,ipa-gen-rx-ll-pool-sz-factor",
&ipa_drv_res->ipa_gen_rx_ll_pool_sz_factor);
if (result)
ipa_drv_res->ipa_gen_rx_ll_pool_sz_factor = 0;
IPADBG("ipa_gen_rx_ll_pool_sz_factor is set to %d",
ipa_drv_res->ipa_gen_rx_ll_pool_sz_factor);
}
static void ipa_dts_get_ulso_data(struct platform_device *pdev,
struct ipa3_plat_drv_res *ipa_drv_res)
{
@@ -10876,7 +10901,9 @@ static int get_ipa_dts_configuration(struct platform_device *pdev,
get_dts_ipa_gen_rx_cmn_page_pool_sz_factor(pdev, ipa_drv_res);
get_dts_ipa_gen_rx_cmn_temp_pool_sz_factor(pdev, ipa_drv_res);
get_dts_ipa_gen_rx_cmn_temp_pool_sz_factor(pdev, ipa_drv_res);
get_dts_ipa_gen_rx_ll_page_pool_sz_factor(pdev, ipa_drv_res);
ipa_dts_get_ulso_data(pdev, ipa_drv_res);

View File

@@ -1751,6 +1751,10 @@ int ipa_setup_sys_pipe(struct ipa_sys_connect_params *sys_in, u32 *clnt_hdl)
ep->sys->page_recycle_repl->capacity =
(ep->sys->rx_pool_sz + 1) *
ipa3_ctx->ipa_gen_rx_cmn_page_pool_sz_factor;
else if (sys_in->client == IPA_CLIENT_APPS_WAN_LOW_LAT_DATA_CONS)
ep->sys->page_recycle_repl->capacity =
(ep->sys->rx_pool_sz + 1) *
ipa3_ctx->ipa_gen_rx_ll_pool_sz_factor;
else
ep->sys->page_recycle_repl->capacity =
(ep->sys->rx_pool_sz + 1) *

View File

@@ -2534,7 +2534,8 @@ struct ipa3_context {
struct ipa_mem_buffer ulso_wa_cmd;
u32 tx_wrapper_cache_max_size;
u32 ipa_gen_rx_cmn_page_pool_sz_factor;
u32 ipa_gen_rx_cmn_temp_pool_sz_factor;
u32 ipa_gen_rx_cmn_temp_pool_sz_factor;
u32 ipa_gen_rx_ll_pool_sz_factor;
struct ipa3_app_clock_vote app_clock_vote;
bool clients_registered;
bool ipa_gpi_event_rp_ddr;
@@ -2670,7 +2671,8 @@ struct ipa3_plat_drv_res {
const char *uc_fw_file_name;
u32 tx_wrapper_cache_max_size;
u32 ipa_gen_rx_cmn_page_pool_sz_factor;
u32 ipa_gen_rx_cmn_temp_pool_sz_factor;
u32 ipa_gen_rx_cmn_temp_pool_sz_factor;
u32 ipa_gen_rx_ll_pool_sz_factor;
u32 ipa_wan_aggr_pkt_cnt;
bool ipa_mhi_proxy;
u32 max_num_smmu_cb;