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msm: camera: isp: Add SFE core idx in CSID error notify

It's possible that for a given use-case the pipeline is
CSID2->SFE0->IFE2, in the event of an overflow we need to log
the right SFE's debug registers. Unlike IFE we cannot use
CSID hw_idx to find the SFE core in the pipeline. The change
ensures we log the connected SFE core's debug registers.

CRs-Fixed: 2841729
Change-Id: I2beda7496b95a2b7c1aafc8cfcfcdde662c31898
Signed-off-by: Karthik Anantha Ram <[email protected]>
Karthik Anantha Ram před 4 roky
rodič
revize
2053cf1569

+ 4 - 1
drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

@@ -495,7 +495,10 @@ static int cam_ife_hw_mgr_notify_overflow(
 			hw_if = g_ife_hw_mgr.ife_devices[evt->hw_idx]->hw_intf;
 			res_id = ife_res_id;
 		} else if (hw_mgr_ctx->base[i].hw_type == CAM_ISP_HW_TYPE_SFE) {
-			hw_if = g_ife_hw_mgr.sfe_devices[evt->hw_idx];
+			if (evt->in_core_type >= CAM_SFE_HW_NUM_MAX)
+				continue;
+
+			hw_if = g_ife_hw_mgr.sfe_devices[evt->in_core_type];
 			res_id = sfe_res_id;
 		} else {
 			continue;

+ 5 - 0
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.c

@@ -1013,6 +1013,11 @@ static int cam_ife_csid_ver2_handle_event_err(
 			csid_hw->hw_intf->hw_idx, err_type, irq_status);
 	}
 
+	if (csid_hw->top_cfg.input_core_type == CAM_IFE_CSID_INPUT_CORE_SEL_SFE_0)
+		evt.in_core_type = 0;
+	else if (csid_hw->top_cfg.input_core_type == CAM_IFE_CSID_INPUT_CORE_SEL_SFE_1)
+		evt.in_core_type = 1;
+
 	csid_hw->event_cb(csid_hw->token,
 		CAM_ISP_HW_EVENT_ERROR, (void *)&evt);
 

+ 2 - 0
drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

@@ -241,6 +241,7 @@ struct cam_isp_blanking_config {
  * @err_type:       Error type if any
  * @reg_val:        Any critical register value captured during irq handling
  * @hw_type:        Hw Type sending the event
+ * @in_core_type:   Input core type if CSID error evt
  *
  */
 struct cam_isp_hw_event_info {
@@ -250,6 +251,7 @@ struct cam_isp_hw_event_info {
 	uint32_t                       err_type;
 	uint32_t                       reg_val;
 	uint32_t                       hw_type;
+	uint32_t                       in_core_type;
 };
 
 /*