qcacmn: Fix hal/wifi3.0 documentation

The kernel-doc script identified a number of kernel-doc issues in the
hal/wifi3.0 folder, so fix them.

Note that there are a number of instances where public functions have
their implementation documented in addition to having their interface
documented, so remove the duplicate documentation since only the
interfaces should be documented.

Change-Id: Ic238c0f53658e8754882c83204ffae5ad713ec6b
CRs-Fixed: 3410624

hal/wifi3.0/hal_hw_headers.h

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -168,7 +168,7 @@
 
 #define WBM_IDLE_DESC_LIST 1
 
-/**
+/*
  * Common SRNG register access macros:
  * The SRNG registers are distributed across various UMAC and LMAC HW blocks,
  * but the register group and format is exactly same for all rings, with some
@@ -219,7 +219,7 @@
 #define HP_GROUP R2
 #define TP_GROUP R2
 
-/**
+/*
  * Register definitions for all SRNG based rings are same, except few
  * differences between source (HW consumer) and destination (HW producer)
  * registers. Following macros definitions provide generic access to all
@@ -319,7 +319,7 @@
 #define SRNG_MAX_SIZE_DWORDS \
 	(SRNG_MS(SRNG_SRC_FLD(BASE_MSB, RING_SIZE), 0xffffffff))
 
-/**
+/*
  * HW ring configuration table to identify hardware ring attributes like
  * register addresses, number of rings, ring entry size etc., for each type
  * of SRNG ring.
@@ -332,14 +332,13 @@
 			(&_hal_soc->hw_srng_table[_ring_type])
 
 /**
- * hal_set_link_desc_addr - Setup link descriptor in a buffer_addr_info
- * HW structure
- *
+ * hal_set_link_desc_addr() - Setup link descriptor in a buffer_addr_info
+ *                            HW structure
  * @hal_soc_hdl: HAL soc handle
  * @desc: Descriptor entry (from WBM_IDLE_LINK ring)
  * @cookie: SW cookie for the buffer/descriptor
  * @link_desc_paddr: Physical address of link descriptor entry
- *
+ * @bm_id: idle link BM id
  */
 static inline void hal_set_link_desc_addr(hal_soc_handle_t hal_soc_hdl,
 					  void *desc, uint32_t cookie,
@@ -362,7 +361,7 @@ static inline void hal_set_link_desc_addr(hal_soc_handle_t hal_soc_hdl,
 /**
  * hal_get_reo_qdesc_size - Get size of reo queue descriptor
  *
- * @hal_soc: Opaque HAL SOC handle
+ * @hal_soc_hdl: Opaque HAL SOC handle
  * @ba_window_size: BlockAck window size
  * @tid: TID number
  *
@@ -382,7 +381,7 @@ uint32_t hal_get_reo_qdesc_size(hal_soc_handle_t hal_soc_hdl,
 
 /**
  * hal_get_rx_max_ba_window - Get RX max BA window size per target
- * @hal_soc: Opaque HAL SOC handle
+ * @hal_soc_hdl: Opaque HAL SOC handle
  * @tid: TID number
  *
  * Return: Max RX BA window size
@@ -398,6 +397,7 @@ uint16_t hal_get_rx_max_ba_window(hal_soc_handle_t hal_soc_hdl,
 
 /**
  * hal_get_idle_link_bm_id() - Get idle link BM id from chid_id
+ * @hal_soc_hdl: Opaque HAL SOC handle
  * @chip_id: mlo chip_id
  *
  * Returns: RBM ID