qcacmn: Add support for cfgtool ba aging timeout cmd
Adds dp handlers for cfgtool80211 cmd to get/set block ack aging timeout. Change-Id: I74bb6e9e25c01f1e712066cb1e41e9adb6619662 CRs-fixed: 2193128
This commit is contained in:
@@ -1782,4 +1782,56 @@ static inline void cdp_deregister_rx_offld_flush_cb(ol_txrx_soc_handle soc)
|
||||
return soc->ops->rx_offld_ops->deregister_rx_offld_flush_cb();
|
||||
}
|
||||
#endif /* RECEIVE_OFFLOAD */
|
||||
|
||||
/**
|
||||
* @cdp_set_ba_timeout() - set ba aging timeout per AC
|
||||
*
|
||||
* @soc - pointer to the soc
|
||||
* @value - timeout value in millisec
|
||||
* @ac - Access category
|
||||
*
|
||||
* @return - void
|
||||
*/
|
||||
static inline void cdp_set_ba_timeout(ol_txrx_soc_handle soc,
|
||||
uint8_t ac, uint32_t value)
|
||||
{
|
||||
if (!soc || !soc->ops) {
|
||||
QDF_TRACE(QDF_MODULE_ID_CDP, QDF_TRACE_LEVEL_DEBUG,
|
||||
"%s: Invalid Instance", __func__);
|
||||
QDF_BUG(0);
|
||||
return;
|
||||
}
|
||||
|
||||
if (!soc->ops->cmn_drv_ops ||
|
||||
!soc->ops->cmn_drv_ops->txrx_set_ba_aging_timeout)
|
||||
return;
|
||||
|
||||
soc->ops->cmn_drv_ops->txrx_set_ba_aging_timeout(soc, ac, value);
|
||||
}
|
||||
|
||||
/**
|
||||
* @cdp_get_ba_timeout() - return ba aging timeout per AC
|
||||
*
|
||||
* @soc - pointer to the soc
|
||||
* @ac - access category
|
||||
* @value - timeout value in millisec
|
||||
*
|
||||
* @return - void
|
||||
*/
|
||||
static inline void cdp_get_ba_timeout(ol_txrx_soc_handle soc,
|
||||
uint8_t ac, uint32_t *value)
|
||||
{
|
||||
if (!soc || !soc->ops) {
|
||||
QDF_TRACE(QDF_MODULE_ID_CDP, QDF_TRACE_LEVEL_DEBUG,
|
||||
"%s: Invalid Instance", __func__);
|
||||
QDF_BUG(0);
|
||||
return;
|
||||
}
|
||||
|
||||
if (!soc->ops->cmn_drv_ops ||
|
||||
!soc->ops->cmn_drv_ops->txrx_get_ba_aging_timeout)
|
||||
return;
|
||||
|
||||
soc->ops->cmn_drv_ops->txrx_get_ba_aging_timeout(soc, ac, value);
|
||||
}
|
||||
#endif /* _CDP_TXRX_CMN_H_ */
|
||||
|
@@ -325,6 +325,10 @@ struct cdp_cmn_ops {
|
||||
void *vdev_hdl);
|
||||
|
||||
void (*txrx_peer_flush_ast_table)(ol_txrx_soc_handle soc);
|
||||
void (*txrx_set_ba_aging_timeout)(struct cdp_soc_t *soc_handle,
|
||||
uint8_t ac, uint32_t value);
|
||||
void (*txrx_get_ba_aging_timeout)(struct cdp_soc_t *soc_handle,
|
||||
uint8_t ac, uint32_t *value);
|
||||
|
||||
QDF_STATUS (*txrx_peer_map_attach)(ol_txrx_soc_handle soc,
|
||||
uint32_t num_peers);
|
||||
|
@@ -4075,6 +4075,38 @@ static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
|
||||
vdev->rx_decap_type = val;
|
||||
}
|
||||
|
||||
/*
|
||||
* dp_set_ba_aging_timeout() - set ba aging timeout per AC
|
||||
* @txrx_soc: cdp soc handle
|
||||
* @ac: Access category
|
||||
* @value: timeout value in millisec
|
||||
*
|
||||
* Return: void
|
||||
*/
|
||||
static void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
|
||||
uint8_t ac, uint32_t value)
|
||||
{
|
||||
struct dp_soc *soc = (struct dp_soc *)txrx_soc;
|
||||
|
||||
hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
|
||||
}
|
||||
|
||||
/*
|
||||
* dp_get_ba_aging_timeout() - get ba aging timeout per AC
|
||||
* @txrx_soc: cdp soc handle
|
||||
* @ac: access category
|
||||
* @value: timeout value in millisec
|
||||
*
|
||||
* Return: void
|
||||
*/
|
||||
static void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
|
||||
uint8_t ac, uint32_t *value)
|
||||
{
|
||||
struct dp_soc *soc = (struct dp_soc *)txrx_soc;
|
||||
|
||||
hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
|
||||
}
|
||||
|
||||
/*
|
||||
* dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
|
||||
* @pdev_handle: physical device object
|
||||
@@ -7635,6 +7667,8 @@ static struct cdp_cmn_ops dp_ops_cmn = {
|
||||
.set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
|
||||
.get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
|
||||
.set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
|
||||
.txrx_set_ba_aging_timeout = dp_set_ba_aging_timeout,
|
||||
.txrx_get_ba_aging_timeout = dp_get_ba_aging_timeout,
|
||||
.tx_send = dp_tx_send,
|
||||
.txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
|
||||
.txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
|
||||
|
@@ -1118,4 +1118,25 @@ extern void hal_get_meminfo(void *hal_soc,struct hal_mem_info *mem );
|
||||
* @hal_soc: Opaque HAL SOC handle
|
||||
*/
|
||||
uint32_t hal_get_target_type(struct hal_soc *hal);
|
||||
|
||||
/**
|
||||
* hal_get_ba_aging_timeout - Retrieve BA aging timeout
|
||||
*
|
||||
* @hal_soc: Opaque HAL SOC handle
|
||||
* @ac: Access category
|
||||
* @value: timeout duration in millisec
|
||||
*/
|
||||
void hal_get_ba_aging_timeout(void *hal_soc, uint8_t ac,
|
||||
uint32_t *value);
|
||||
|
||||
/**
|
||||
* hal_set_aging_timeout - Set BA aging timeout
|
||||
*
|
||||
* @hal_soc: Opaque HAL SOC handle
|
||||
* @ac: Access category in millisec
|
||||
* @value: timeout duration value
|
||||
*/
|
||||
void hal_set_ba_aging_timeout(void *hal_soc, uint8_t ac,
|
||||
uint32_t value);
|
||||
|
||||
#endif /* _HAL_APIH_ */
|
||||
|
@@ -341,3 +341,87 @@ void hal_reo_setup(void *hal_soc,
|
||||
}
|
||||
qdf_export_symbol(hal_reo_setup);
|
||||
|
||||
/**
|
||||
* hal_get_ba_aging_timeout - Get BA Aging timeout
|
||||
*
|
||||
* @hal_soc: Opaque HAL SOC handle
|
||||
* @ac: Access category
|
||||
* @value: window size to get
|
||||
*/
|
||||
void hal_get_ba_aging_timeout(void *hal_soc, uint8_t ac,
|
||||
uint32_t *value)
|
||||
{
|
||||
struct hal_soc *soc = (struct hal_soc *)hal_soc;
|
||||
|
||||
switch (ac) {
|
||||
case WME_AC_BE:
|
||||
*value = HAL_REG_READ(soc,
|
||||
HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(
|
||||
SEQ_WCSS_UMAC_REO_REG_OFFSET)) / 1000;
|
||||
break;
|
||||
case WME_AC_BK:
|
||||
*value = HAL_REG_READ(soc,
|
||||
HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(
|
||||
SEQ_WCSS_UMAC_REO_REG_OFFSET)) / 1000;
|
||||
break;
|
||||
case WME_AC_VI:
|
||||
*value = HAL_REG_READ(soc,
|
||||
HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(
|
||||
SEQ_WCSS_UMAC_REO_REG_OFFSET)) / 1000;
|
||||
break;
|
||||
case WME_AC_VO:
|
||||
*value = HAL_REG_READ(soc,
|
||||
HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(
|
||||
SEQ_WCSS_UMAC_REO_REG_OFFSET)) / 1000;
|
||||
break;
|
||||
default:
|
||||
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
|
||||
"Invalid AC: %d\n", ac);
|
||||
}
|
||||
}
|
||||
qdf_export_symbol(hal_get_ba_aging_timeout);
|
||||
|
||||
/**
|
||||
* hal_set_ba_aging_timeout - Set BA Aging timeout
|
||||
*
|
||||
* @hal_soc: Opaque HAL SOC handle
|
||||
* @ac: Access category
|
||||
* ac: 0 - Background, 1 - Best Effort, 2 - Video, 3 - Voice
|
||||
* @value: Input value to set
|
||||
*/
|
||||
void hal_set_ba_aging_timeout(void *hal_soc, uint8_t ac,
|
||||
uint32_t value)
|
||||
{
|
||||
struct hal_soc *soc = (struct hal_soc *)hal_soc;
|
||||
|
||||
switch (ac) {
|
||||
case WME_AC_BE:
|
||||
HAL_REG_WRITE(soc,
|
||||
HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(
|
||||
SEQ_WCSS_UMAC_REO_REG_OFFSET),
|
||||
value * 1000);
|
||||
break;
|
||||
case WME_AC_BK:
|
||||
HAL_REG_WRITE(soc,
|
||||
HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(
|
||||
SEQ_WCSS_UMAC_REO_REG_OFFSET),
|
||||
value * 1000);
|
||||
break;
|
||||
case WME_AC_VI:
|
||||
HAL_REG_WRITE(soc,
|
||||
HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(
|
||||
SEQ_WCSS_UMAC_REO_REG_OFFSET),
|
||||
value * 1000);
|
||||
break;
|
||||
case WME_AC_VO:
|
||||
HAL_REG_WRITE(soc,
|
||||
HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(
|
||||
SEQ_WCSS_UMAC_REO_REG_OFFSET),
|
||||
value * 1000);
|
||||
break;
|
||||
default:
|
||||
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
|
||||
"Invalid AC: %d\n", ac);
|
||||
}
|
||||
}
|
||||
qdf_export_symbol(hal_set_ba_aging_timeout);
|
||||
|
Reference in New Issue
Block a user