Merge 8679cc483044a211ed98babec02dbb98b4924aca on remote branch

Change-Id: I3220b483b8c58dc73b502cf9eb349ab5405f3e71

ubwcp/Android.mk

@@ -1,6 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+ifneq ($(TARGET_KERNEL_DLKM_DISABLE), true)
 LOCAL_PATH := $(call my-dir)
+LOCAL_MODULE_DDK_BUILD := true
 
 include $(CLEAR_VARS)
 # For incremental compilation
@@ -10,3 +12,4 @@ LOCAL_EXPORT_KO_INCLUDE_DIRS    += $(LOCAL_PATH)/include/kernel
 LOCAL_MODULE      := ubwcp.ko
 LOCAL_MODULE_PATH := $(KERNEL_MODULES_OUT)
 include $(DLKM_DIR)/Build_external_kernelmodule.mk
+endif

ubwcp/define_modules.bzl

@@ -12,6 +12,7 @@ def define_modules(target, variant):
             "ubwcp_main.c",
             "ubwcp_hw.c",
             "ubwcp_hw.h",
+            "ubwcp_trace.h",
         ],
         hdrs=["include/uapi/ubwcp_ioctl.h", "include/kernel/ubwcp.h"],
         deps = ["//msm-kernel:all_headers"],

ubwcp/include/kernel/ubwcp.h

@@ -31,6 +31,11 @@ int ubwcp_get_hw_version(struct ubwcp_ioctl_hw_version *ver);
  * ubwcp_lock(). Attributes can be configured multiple times,
  * but only during unlocked state.
  *
+ * Upon error, buffer will be in undefined state.
+ * There is no guarantee that previously set attributes will be retained.
+ * Caller could retry set attributes, but must not reuse buffer
+ * until a successful set attribute call is done.
+ *
  * @param dmabuf : ptr to the dma buf
  * @param attr   : buffer attributes to set
  *

ubwcp/ubwcp_hw.c

@@ -1,8 +1,10 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
+#define pr_fmt(fmt) "%s: hw: %s(): " fmt, KBUILD_MODNAME, __func__
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/dma-buf.h>
@@ -13,18 +15,14 @@
 
 #include "ubwcp_hw.h"
 
-extern u32 ubwcp_debug_trace_enable;
+static bool ubwcp_hw_trace_en;
 //#define DBG(fmt, args...)
 #define DBG(fmt, args...) \
 	do { \
-		if (ubwcp_debug_trace_enable) \
-			pr_err("ubwcp: hw: %s(): " fmt "\n", __func__, ##args); \
-	} while (0)
-#define ERR(fmt, args...) \
-	do { \
-		if (ubwcp_debug_trace_enable) \
-			pr_err("ubwcp: hw: %s(): ~~~ERROR~~~: " fmt "\n", __func__, ##args); \
+		if (unlikely(ubwcp_hw_trace_en)) \
+			pr_err(fmt "\n", ##args); \
 	} while (0)
+#define ERR(fmt, args...) pr_err_ratelimited(": %d: ~~~ERROR~~~: " fmt "\n", __LINE__, ##args)
 
 MODULE_LICENSE("GPL");
 
@@ -65,26 +63,10 @@ MODULE_LICENSE("GPL");
 #define SPARE				0x1188
 
 
-/* read/write register */
-#if defined(UBWCP_USE_SMC)
-#define UBWCP_REG_READ(_base, _offset) \
-			({u32 _reg = 0; int _ret; \
-			_ret = qcom_scm_io_readl((phys_addr_t)(_base + _offset), &_reg); \
-			if (_ret) \
-				DBG("scm_read() failed: %d", _ret); \
-			else \
-				DBG("scm_read() : %p + 0x%x -> 0x%08x", _base, _offset, _reg); \
-			_reg; })
+#define UBWCP_DEBUG_REG_RW
 
-#define UBWCP_REG_WRITE(_base, _offset, _value) \
-			{int _ret;\
-			_ret = qcom_scm_io_writel((phys_addr_t)(_base + _offset), _value); \
-			if (_ret) \
-				DBG("scm_write() failed: %d", _ret); \
-			else \
-				DBG("scm_write(): %p + 0x%x <- 0x%08x", _base, _offset, _value); \
-			}
-#elif defined(UBWCP_DEBUG_REG_RW)
+/* read/write register */
+#if defined(UBWCP_DEBUG_REG_RW)
 #define UBWCP_REG_READ(_base, _offset) \
 			({u32 _reg; \
 			_reg = ioread32(_base + _offset); \
@@ -96,16 +78,9 @@ MODULE_LICENSE("GPL");
 			DBG("WRITE: 0x%x <- 0x%08x", _offset, _value); \
 			iowrite32(_value, _base + _offset); \
 			}
-#elif defined(UBWCP_DUMMY_REG_RW)
-/* do nothing */
-#define UBWCP_REG_READ(_base, _offset)           ((_base + _offset) ? 0x0 : 0x0)
-#define UBWCP_REG_WRITE(_base, _offset, _value)  ((_base + _offset + _value) ? 0x0 : 0x0)
-
 #else
-
 #define UBWCP_REG_READ(_base, _offset)           ioread32(_base + _offset)
 #define UBWCP_REG_WRITE(_base, _offset, _value)  iowrite32(_value, _base + _offset)
-
 #endif
 
 #define UBWCP_REG_READ_NO_DBG(_base, _offset)           ioread32(_base + _offset)
@@ -166,20 +141,20 @@ u64 ubwcp_hw_interrupt_src_address(void __iomem *base, u16 interrupt)
 
 	switch (interrupt) {
 	case INTERRUPT_READ_ERROR:
-		addr_low  = UBWCP_REG_READ(base, INTERRUPT_READ_SRC_LOW);
-		addr_high = UBWCP_REG_READ(base, INTERRUPT_READ_SRC_HIGH) & 0xF;
+		addr_low  = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_READ_SRC_LOW);
+		addr_high = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_READ_SRC_HIGH) & 0xF;
 		break;
 	case INTERRUPT_WRITE_ERROR:
-		addr_low  = UBWCP_REG_READ(base, INTERRUPT_WRITE_SRC_LOW);
-		addr_high = UBWCP_REG_READ(base, INTERRUPT_WRITE_SRC_HIGH) & 0xF;
+		addr_low  = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_WRITE_SRC_LOW);
+		addr_high = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_WRITE_SRC_HIGH) & 0xF;
 		break;
 	case INTERRUPT_DECODE_ERROR:
-		addr_low  = UBWCP_REG_READ(base, INTERRUPT_DECODE_SRC_LOW);
-		addr_high = UBWCP_REG_READ(base, INTERRUPT_DECODE_SRC_HIGH) & 0xF;
+		addr_low  = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_DECODE_SRC_LOW);
+		addr_high = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_DECODE_SRC_HIGH) & 0xF;
 		break;
 	case INTERRUPT_ENCODE_ERROR:
-		addr_low  = UBWCP_REG_READ(base, INTERRUPT_ENCODE_SRC_LOW);
-		addr_high = UBWCP_REG_READ(base, INTERRUPT_ENCODE_SRC_HIGH) & 0xF;
+		addr_low  = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_ENCODE_SRC_LOW);
+		addr_high = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_ENCODE_SRC_HIGH) & 0xF;
 		break;
 	default:
 		/* TBD: fatal error? */
@@ -356,16 +331,12 @@ void ubwcp_hw_power_vote_status(void __iomem *pwr_ctrl, u8 *vote, u8 *status)
 	reg = UBWCP_REG_READ(pwr_ctrl, 0);
 	*vote =   (reg & BIT(0)) >> 0;
 	*status = (reg & BIT(31)) >> 31;
-	DBG("pwr_ctrl reg: 0x%x (vote = %d status = %d)", reg, *vote, *status);
 }
 
 void ubwcp_hw_one_time_init(void __iomem *base)
 {
 	u32 reg;
 
-	/* hack: set dataless hazard override bit */
-	UBWCP_REG_WRITE(base, OVERRIDE, 0x2000);
-
 	/* Spare reg config: set bit-9: SCC & bit-1: padding */
 	reg = UBWCP_REG_READ(base, SPARE);
 	reg |= BIT(9) | BIT(1);
@@ -383,3 +354,15 @@ void ubwcp_hw_one_time_init(void __iomem *base)
 	ubwcp_hw_macro_tile_config(base);
 }
 EXPORT_SYMBOL(ubwcp_hw_one_time_init);
+
+void ubwcp_hw_trace_set(bool value)
+{
+	ubwcp_hw_trace_en = value;
+}
+EXPORT_SYMBOL(ubwcp_hw_trace_set);
+
+void ubwcp_hw_trace_get(bool *value)
+{
+	*value = ubwcp_hw_trace_en;
+}
+EXPORT_SYMBOL(ubwcp_hw_trace_get);

ubwcp/ubwcp_hw.h

@@ -66,8 +66,7 @@ void ubwcp_hw_interrupt_enable(void __iomem *base, u16 interrupt, bool enable);
 void ubwcp_hw_power_on(void __iomem *pwr_ctrl, bool power_on);
 void ubwcp_hw_one_time_init(void __iomem *base);
 int ubwcp_hw_flush(void __iomem *base);
-
-//#define UBWCP_USE_SMC
-#define UBWCP_DEBUG_REG_RW
+void ubwcp_hw_trace_set(bool value);
+void ubwcp_hw_trace_get(bool *value);
 
 #endif /* __UBWCP_HW_H_ */

ubwcp/ubwcp_trace.h

@@ -89,6 +89,26 @@ DECLARE_EVENT_CLASS(ubwcp_size_event,
 	TP_printk("size:%zu", __entry->size)
 );
 
+DECLARE_EVENT_CLASS(ubwcp_sync_event,
+
+	TP_PROTO(size_t size,
+		 int dir),
+
+	TP_ARGS(size, dir),
+
+	TP_STRUCT__entry(
+		__field(size_t, size)
+		__field(int, dir)
+	),
+
+	TP_fast_assign(
+		__entry->size = size;
+		__entry->dir = dir;
+	),
+
+	TP_printk("size:%zu, dir:%d", __entry->size, __entry->dir)
+);
+
 DEFINE_EVENT(ubwcp_dmabuf_event, ubwcp_init_buffer_start,
 
 	TP_PROTO(struct dma_buf *dbuf_addr),
@@ -103,14 +123,14 @@ DEFINE_EVENT(ubwcp_dmabuf_event, ubwcp_init_buffer_end,
 	TP_ARGS(dbuf_addr)
 );
 
-DEFINE_EVENT(ubwcp_size_event, ubwcp_add_memory_start,
+DEFINE_EVENT(ubwcp_size_event, ubwcp_memremap_pages_start,
 
 	TP_PROTO(size_t size),
 
 	TP_ARGS(size)
 );
 
-DEFINE_EVENT(ubwcp_size_event, ubwcp_add_memory_end,
+DEFINE_EVENT(ubwcp_size_event, ubwcp_memremap_pages_end,
 
 	TP_PROTO(size_t size),
 
@@ -173,32 +193,32 @@ DEFINE_EVENT(ubwcp_size_event, ubwcp_offline_sync_end,
 	TP_ARGS(size)
 );
 
-DEFINE_EVENT(ubwcp_size_event, ubwcp_dma_sync_single_for_device_start,
+DEFINE_EVENT(ubwcp_sync_event, ubwcp_dma_sync_single_for_device_start,
 
-	TP_PROTO(size_t size),
+	TP_PROTO(size_t size, int dir),
 
-	TP_ARGS(size)
+	TP_ARGS(size, dir)
 );
 
-DEFINE_EVENT(ubwcp_size_event, ubwcp_dma_sync_single_for_device_end,
+DEFINE_EVENT(ubwcp_sync_event, ubwcp_dma_sync_single_for_device_end,
 
-	TP_PROTO(size_t size),
+	TP_PROTO(size_t size, int dir),
 
-	TP_ARGS(size)
+	TP_ARGS(size, dir)
 );
 
-DEFINE_EVENT(ubwcp_size_event, ubwcp_dma_sync_single_for_cpu_start,
+DEFINE_EVENT(ubwcp_sync_event, ubwcp_dma_sync_single_for_cpu_start,
 
-	TP_PROTO(size_t size),
+	TP_PROTO(size_t size, int dir),
 
-	TP_ARGS(size)
+	TP_ARGS(size, dir)
 );
 
-DEFINE_EVENT(ubwcp_size_event, ubwcp_dma_sync_single_for_cpu_end,
+DEFINE_EVENT(ubwcp_sync_event, ubwcp_dma_sync_single_for_cpu_end,
 
-	TP_PROTO(size_t size),
+	TP_PROTO(size_t size, int dir),
 
-	TP_ARGS(size)
+	TP_ARGS(size, dir)
 );
 
 DEFINE_EVENT(ubwcp_size_event, ubwcp_hw_flush_start,
@@ -215,14 +235,14 @@ DEFINE_EVENT(ubwcp_size_event, ubwcp_hw_flush_end,
 	TP_ARGS(size)
 );
 
-DEFINE_EVENT(ubwcp_size_event, ubwcp_offline_and_remove_memory_start,
+DEFINE_EVENT(ubwcp_size_event, ubwcp_memunmap_pages_start,
 
 	TP_PROTO(size_t size),
 
 	TP_ARGS(size)
 );
 
-DEFINE_EVENT(ubwcp_size_event, ubwcp_offline_and_remove_memory_end,
+DEFINE_EVENT(ubwcp_size_event, ubwcp_memunmap_pages_end,
 
 	TP_PROTO(size_t size),
 

ubwcp_kernel_product_board.mk

@@ -1,2 +1,3 @@
+ifneq ($(TARGET_KERNEL_DLKM_DISABLE), true)
 PRODUCT_PACKAGES += ubwcp.ko
-
+endif

ubwcp_kernel_vendor_board.mk

@@ -1,2 +1,3 @@
+ifneq ($(TARGET_KERNEL_DLKM_DISABLE), true)
 BOARD_VENDOR_KERNEL_MODULES += $(KERNEL_MODULES_OUT)/ubwcp.ko
-
+endif