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asoc: wcd938x: Add WCD ADC Mode mask to control modes

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To set correct swr clk rate in concurrency,
use WCD ADC modes as status mask bit to confirm
ADC paths active and control set clock rate.

Change-Id: Id3401d6ed59bd617e0751e7c704268346b36dac4
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam
2020-06-05 20:36:44 +05:30
parent d187ddf230
commit 1e558673c6
1 changed files with 24 additions and 4 deletions
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28
asoc/codecs/wcd938x/wcd938x.c
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@@ -73,6 +73,10 @@ enum {
HPH_PA_DELAY, HPH_PA_DELAY,
AMIC2_BCS_ENABLE, AMIC2_BCS_ENABLE,
WCD_SUPPLIES_LPM_MODE, WCD_SUPPLIES_LPM_MODE,
WCD_ADC1_MODE,
WCD_ADC2_MODE,
WCD_ADC3_MODE,
WCD_ADC4_MODE,
}; };
enum { enum {
@@ -1541,13 +1545,17 @@ static int wcd938x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
switch (event) { switch (event) {
case SND_SOC_DAPM_PRE_PMU: case SND_SOC_DAPM_PRE_PMU:
if (strnstr(w->name, "ADC", sizeof("ADC"))) { if (strnstr(w->name, "ADC", sizeof("ADC"))) {
if (test_bit(WCD_ADC1, &wcd938x->status_mask)) if (test_bit(WCD_ADC1, &wcd938x->status_mask) ||
test_bit(WCD_ADC1_MODE, &wcd938x->status_mask))
mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC1]]; mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC1]];
if (test_bit(WCD_ADC2, &wcd938x->status_mask)) if (test_bit(WCD_ADC2, &wcd938x->status_mask) ||
test_bit(WCD_ADC2_MODE, &wcd938x->status_mask))
mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC2]]; mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC2]];
if (test_bit(WCD_ADC3, &wcd938x->status_mask)) if (test_bit(WCD_ADC3, &wcd938x->status_mask) ||
test_bit(WCD_ADC3_MODE, &wcd938x->status_mask))
mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC3]]; mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC3]];
if (test_bit(WCD_ADC4, &wcd938x->status_mask)) if (test_bit(WCD_ADC4, &wcd938x->status_mask) ||
test_bit(WCD_ADC4_MODE, &wcd938x->status_mask))
mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC4]]; mode |= tx_mode_bit[wcd938x->tx_mode[WCD_ADC4]];
if (mode != 0) { if (mode != 0) {
@@ -1594,6 +1602,14 @@ static int wcd938x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
if (strnstr(w->name, "ADC", sizeof("ADC"))) if (strnstr(w->name, "ADC", sizeof("ADC")))
wcd938x_set_swr_clk_rate(component, rate, bank); wcd938x_set_swr_clk_rate(component, rate, bank);
if (strnstr(w->name, "ADC1", sizeof("ADC1")))
clear_bit(WCD_ADC1_MODE, &wcd938x->status_mask);
else if (strnstr(w->name, "ADC2", sizeof("ADC2")))
clear_bit(WCD_ADC2_MODE, &wcd938x->status_mask);
else if (strnstr(w->name, "ADC3", sizeof("ADC3")))
clear_bit(WCD_ADC3_MODE, &wcd938x->status_mask);
else if (strnstr(w->name, "ADC4", sizeof("ADC4")))
clear_bit(WCD_ADC4_MODE, &wcd938x->status_mask);
break; break;
}; };
@@ -2031,21 +2047,25 @@ static int wcd938x_event_notify(struct notifier_block *block,
if (test_bit(WCD_ADC1, &wcd938x->status_mask)) { if (test_bit(WCD_ADC1, &wcd938x->status_mask)) {
snd_soc_component_update_bits(component, snd_soc_component_update_bits(component,
WCD938X_ANA_TX_CH2, 0x40, 0x00); WCD938X_ANA_TX_CH2, 0x40, 0x00);
set_bit(WCD_ADC1_MODE, &wcd938x->status_mask);
clear_bit(WCD_ADC1, &wcd938x->status_mask); clear_bit(WCD_ADC1, &wcd938x->status_mask);
} }
if (test_bit(WCD_ADC2, &wcd938x->status_mask)) { if (test_bit(WCD_ADC2, &wcd938x->status_mask)) {
snd_soc_component_update_bits(component, snd_soc_component_update_bits(component,
WCD938X_ANA_TX_CH2, 0x20, 0x00); WCD938X_ANA_TX_CH2, 0x20, 0x00);
set_bit(WCD_ADC2_MODE, &wcd938x->status_mask);
clear_bit(WCD_ADC2, &wcd938x->status_mask); clear_bit(WCD_ADC2, &wcd938x->status_mask);
} }
if (test_bit(WCD_ADC3, &wcd938x->status_mask)) { if (test_bit(WCD_ADC3, &wcd938x->status_mask)) {
snd_soc_component_update_bits(component, snd_soc_component_update_bits(component,
WCD938X_ANA_TX_CH4, 0x40, 0x00); WCD938X_ANA_TX_CH4, 0x40, 0x00);
set_bit(WCD_ADC3_MODE, &wcd938x->status_mask);
clear_bit(WCD_ADC3, &wcd938x->status_mask); clear_bit(WCD_ADC3, &wcd938x->status_mask);
} }
if (test_bit(WCD_ADC4, &wcd938x->status_mask)) { if (test_bit(WCD_ADC4, &wcd938x->status_mask)) {
snd_soc_component_update_bits(component, snd_soc_component_update_bits(component,
WCD938X_ANA_TX_CH4, 0x20, 0x00); WCD938X_ANA_TX_CH4, 0x20, 0x00);
set_bit(WCD_ADC4_MODE, &wcd938x->status_mask);
clear_bit(WCD_ADC4, &wcd938x->status_mask); clear_bit(WCD_ADC4, &wcd938x->status_mask);
} }
break; break;