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@@ -1665,7 +1665,9 @@ static int rx_macro_config_compander(struct snd_soc_component *component,
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int interp_n, int event)
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{
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int comp = 0;
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- u16 comp_ctl0_reg = 0, rx_path_cfg0_reg = 0;
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+ u16 comp_ctl0_reg = 0, rx_path_cfg0_reg = 0, rx_path_cfg3_reg = 0;
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+ u16 rx0_path_ctl_reg = 0;
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+ u8 pcm_rate = 0, val = 0;
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/* AUX does not have compander */
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if (interp_n == INTERP_AUX)
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@@ -1682,6 +1684,20 @@ static int rx_macro_config_compander(struct snd_soc_component *component,
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(comp * RX_MACRO_COMP_OFFSET);
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rx_path_cfg0_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG0 +
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(comp * RX_MACRO_RX_PATH_OFFSET);
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+ rx_path_cfg3_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG3 +
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+ (comp * RX_MACRO_RX_PATH_OFFSET);
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+ rx0_path_ctl_reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL +
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+ (comp * RX_MACRO_RX_PATH_OFFSET);
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+ pcm_rate = (snd_soc_component_read32(component, rx0_path_ctl_reg)
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+ & 0x0F);
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+ if (pcm_rate < 0x06)
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+ val = 0x03;
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+ else if (pcm_rate < 0x08)
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+ val = 0x01;
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+ else if (pcm_rate < 0x0B)
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+ val = 0x02;
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+ else
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+ val = 0x00;
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if (SND_SOC_DAPM_EVENT_ON(event)) {
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/* Enable Compander Clock */
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@@ -1693,6 +1709,8 @@ static int rx_macro_config_compander(struct snd_soc_component *component,
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0x02, 0x00);
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snd_soc_component_update_bits(component, rx_path_cfg0_reg,
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0x02, 0x02);
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+ snd_soc_component_update_bits(component, rx_path_cfg3_reg,
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+ 0x03, val);
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}
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if (SND_SOC_DAPM_EVENT_OFF(event)) {
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@@ -1704,6 +1722,8 @@ static int rx_macro_config_compander(struct snd_soc_component *component,
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0x01, 0x00);
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snd_soc_component_update_bits(component, comp_ctl0_reg,
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0x04, 0x00);
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+ snd_soc_component_update_bits(component, rx_path_cfg3_reg,
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+ 0x03, 0x03);
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}
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return 0;
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